Abstract: A method of etching metals and/or metal-containing compounds using a plasma comprising a bromine-containing gas. In one embodiment, the method is used during fabrication of a gate structure of a field effect transistor having a titanium nitride gate electrode, an ultra-thin (about 10 to 20 Angstroms) silicon dioxide gate dielectric, and a polysilicon upper contact. In a further embodiment, the gate electrode is selectively notched to a pre-determined width.

Abstract: Disclosed herein is a method of pattern etching a layer of a silicon-containing dielectric material. The method employs a plasma source gas including CF4 to CHF3, where the volumetric ratio of CF4 to CHF3 is within the range of about 2:3 to about 3:1; more typically, about 1:1 to about 2:1. Etching is performed at a process chamber pressure within the range of about 4 mTorr to about 60 mTorr. The method provides a selectivity for etching a silicon-containing dielectric layer relative to photoresist of 1.5:1 or better. The method also provides an etch profile sidewall angle ranging from 88° to 92° between said etched silicon-containing dielectric layer and an underlying horizontal layer. in the semiconductor structure. The method provides a smooth sidewall when used in combination with certain photoresists which are sensitive to 193 nm radiation.

Abstract: Disclosed herein is a method of pattern etching a layer of a silicon-containing dielectric material. The method employs a plasma source gas comprising CH2F2, CF4, and O2, where a volumetric ratio of CH2F2 to CF4 is within the range of about 1:2 to about 3:1, and where O2 comprises about 2 to about 20 volume % of the plasma source gas. Etching is performed at a process chamber pressure within the range of about 4 mTorr to about 10 mTorr. The method provides a selectivity for etching a silicon-containing dielectric layer relative to photoresist of at least 2:1. The method also provides an etch profile sidewall angle ranging from about 84° to about 90° between the etched silicon-containing dielectric layer and an underlying horizontal layer in a semiconductor structure.

Abstract: Processes for forming trenches within silicon substrates are described. According to an embodiment of the invention, a masked substrate is initially provided that comprises (a) a silicon substrate and (b) a patterned resist layer over the silicon substrate. The patterned resist layer has one or more apertures formed therein. Subsequently, a trench is formed in the substrate through the apertures in the resist layer by an inductive plasma-etching step, which is conducted using plasma source gases that comprise SF6, at least one fluorocarbon gas, and N2. If desired, Cl2 can also be provided in addition to the above source gases. The process of the present invention produces chamber deposits in low amounts, while providing high etching rates, high silicon:resist selectivities, and good trench sidewall profile control.

Abstract: Processes for forming trenches within silicon substrates are described. According to an embodiment of the invention, a masked substrate is initially provided that comprises (a) a silicon substrate and (b) a patterned resist layer over the silicon substrate. The patterned resist layer has one or more apertures formed therein. Subsequently, a trench is formed in the substrate through the apertures in the resist layer by an inductive plasma-etching step, which is conducted using plasma source gases that comprise SF6, at least one fluorocarbon gas, and N2. If desired, Cl2 can also be provided in addition to the above source gases. The process of the present invention produces chamber deposits in low amounts, while providing high etching rates, high silicon:resist selectivities, and good trench sidewall profile control.

Abstract: In accordance with the present invention, during a polysilicon etch back, a controlled amount of oxygen (O2) is added to the plasma generation feed gases, to reduce pitting of the etched back polysilicon surface. The plasma etchant is generated from a plasma source gas comprising: (i) at least one fluorine-containing gas, and (ii) oxygen. The invention may be practiced in any of a number of apparatus adapted to expose polysilicon to a plasma etchant. One preferred apparatus is a decoupled plasma source (DPS™, Applied Materials, Santa Clara, Calif.) etching system. Another preferred apparatus is a magnetically enhanced plasma (MXP™, Applied Materials, Santa Clara, Calif.) etching system.

Abstract: A method of etching silicon using a gas mixture comprising fluorine (F) and oxygen (O). A fluoro-hydrocarbon gas is also used to provide added flexibility for profile and dimension control in the silicon trench. The method is applied to trench etching in a silicon substrate, and results in an etch rate exceeding about 1 &mgr;m/min. with a photoresist selectivity as high as about 9:1. The method can also be applied to etching doped or undoped polysilicon or amorphous silicon.