Patents by Inventor Shawna Liff
Shawna Liff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200065263Abstract: Microelectronic package communication is described using radio interfaces connected through wiring. One example includes a system board, an integrated circuit chip, and a package substrate mounted to the system board to carry the integrated circuit chip, the package substrate having conductive connectors to connect the integrated circuit chip to external components. A radio on the package substrate is coupled to the integrated circuit chip to modulate the data onto a carrier and to transmit the modulated data. A radio on the system board receives the transmitted modulated data and demodulates the received data, and a cable interface is coupled to the system board radio to couple the received demodulated data to a cable.Type: ApplicationFiled: September 25, 2015Publication date: February 27, 2020Inventors: Shawna LIFF, Adel A. ELSHERBINI, Telesphor KAMGAING, Sasha N. OSTER, Gaurav CHAWLA
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Publication number: 20200051899Abstract: Embodiments include an electronics package and methods of forming such packages. In an embodiment, the electronics package comprises a first package substrate. In an embodiment, the first package substrate comprises, a die embedded in a mold layer, a thermal interface pad over a surface of the die, and a plurality of solder balls over the thermal interface pad. In an embodiment, the thermal interface pad and the solder balls are electrically isolated from circuitry of the electronics package. In an embodiment, the electronics package further comprises a second package substrate over the first package substrate.Type: ApplicationFiled: August 9, 2018Publication date: February 13, 2020Inventors: Debendra MALLIK, Sanka GANESAN, Pilin LIU, Shawna LIFF, Sri Chaitra CHAVALI, Sandeep GAAN, Jimin YAO, Aastha UPPAL
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Publication number: 20190377392Abstract: Embodiments of the invention include a mmWave transceiver and methods of forming such devices. In an embodiment, the mmWave transceiver includes an RF module. The RF module may include a package substrate, a plurality of antennas formed on the package substrate, and a die attached to a surface of the package substrate. In an embodiment, the mmWave transceiver may also include a mainboard mounted to the RF module with one or more solder balls. In an embodiment, a thermal feature is embedded within the mainboard, and the thermal feature is separated from the die by a thermal interface material (TIM) layer. According to an embodiment, the thermal features are slugs and/or vias. In an embodiment, the die compresses the TIM layer resulting in a TIM layer with minimal thickness.Type: ApplicationFiled: April 1, 2017Publication date: December 12, 2019Inventors: Divya MANI, William J. LAMBERT, Shawna LIFF, Sergio A. CHAN ARGUEDAS, Robert L. SANKMAN
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Publication number: 20190304931Abstract: Electronic device shape configuration technology is disclosed. In an example, an electronic device substrate is provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. An electronic device die is also provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. In addition, an electronic device package is provided that can comprise a substrate having a top surface configured to receive a die and a bottom surface opposing the top surface. The package can also include a die having a top surface and a bottom surface opposing the top surface. The die can be coupled to the top surface of the substrate. The top surface and/or the bottom surface of either the substrate, or the die, or both can have a non-rectangular shaped perimeter.Type: ApplicationFiled: October 2, 2018Publication date: October 3, 2019Applicant: Intel CorporationInventors: Pramod Malatkar, Sairam Agraharam, Shawna Liff
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Publication number: 20190273197Abstract: One superconducting qubit device package disclosed herein includes a die having a first face and an opposing second face, and a package substrate having a first face and an opposing second face. The die includes a quantum device including a plurality of superconducting qubits and a plurality of resonators on the first face of the die, and a plurality of conductive pathways coupled between conductive contacts at the first face of the die and associated ones of the plurality of superconducting qubits or of the plurality of resonators. The second face of the package substrate also includes conductive contacts. The device package further includes first level interconnects disposed between the first face of the die and the second face of the package substrate, coupling the conductive contacts at the first face of the die with associated conductive contacts at the second face of the package substrate.Type: ApplicationFiled: December 27, 2016Publication date: September 5, 2019Applicant: Intel CorporationInventors: Jeanette M. Roberts, Adel A. Elsherbini, Shawna Liff, Johanna M. Swan, Roman Caudillo, Zachary R. Yoscovits, Nicole K. Thomas, Ravi Pillarisetty, Hubert C. George, James S. Clarke
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Publication number: 20190228988Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a substrate, an electronic component disposed on the substrate and electrically coupled to the substrate, and an underfill material disposed at least partially between the electronic component and the substrate. A lateral portion of the underfill material can comprises a lateral surface extending away from the substrate and a meniscus surface extending between the lateral surface and the electronic component.Type: ApplicationFiled: April 2, 2019Publication date: July 25, 2019Applicant: Intel CorporationInventors: Jimin Yao, Eric Li, Shawna Liff
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Publication number: 20190200451Abstract: A millimeter wave (mm-wave) communication interface includes a first semiconductor package coupled to a first substrate and a second semiconductor package coupled to a second substrate. The second substrate may be coupled at approximately a 90° angle to the first substrate. The second semiconductor package may include a mm-wave die that modulates digital data on a high frequency microwave signal and a mm-wave launcher that launches the modulated high-frequency microwave signal into a waveguide member operably coupled to the second substrate. In such an implementation, the waveguide member may beneficially exit the second substrate along a longitudinal axis parallel to the principal plane of the first substrate. Advantageously, all high-frequency components are close coupled to the second substrate without the use of an intervening interface.Type: ApplicationFiled: September 29, 2016Publication date: June 27, 2019Applicant: Intel CorporationInventors: SASHA OSTER, Georgios Dogiamis, TELESPHOR KAMGAING, Adel Elsherbini, Shawna Liff, Aleksandar Aleksov, JOHANNA SWAN
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Publication number: 20190190119Abstract: A waveguide coupling system may include at least one waveguide member retention structure disposed on an exterior surface of a semiconductor package. The waveguide member retention structure may be disposed a defined distance or at a defined location with respect to an antenna carried by the semiconductor package. The waveguide member retention structure may engage and guide a waveguide member slidably inserted into the respective waveguide member retention structure. The waveguide member retention structure may position the waveguide member at a defined location with respect to the antenna to maximize the power transfer from the antenna to the waveguide member.Type: ApplicationFiled: September 23, 2016Publication date: June 20, 2019Applicant: INTEL CORPORATIONInventors: SASHA OSTER, GEORGIOS DOGIAMIS, TELESPHOR KAMGAING, ADEL ELSHERBINI, SHAWNA LIFF, ALEKSANDAR ALEKSOV, JOHANNA SWAN
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Publication number: 20190190106Abstract: Generally, this disclosure provides apparatus and systems for coupling waveguides to a server package with a modular connector system, as well as methods for fabricating such a connector system. Such a system may be formed with connecting waveguides that turn a desired amount, which in turn may allow a server package to send a signal through a waveguide bundle in any given direction without bending waveguides.Type: ApplicationFiled: September 30, 2016Publication date: June 20, 2019Inventors: TELESPHOR KAMGAING, SASHA OSTER, Georgios Dogiamis, Adel Elsherbini, Shawna Liff, Aleksandar Aleksov, JOHANNA SWAN, Brandon Rawlings
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Patent number: 10249515Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a substrate, an electronic component disposed on the substrate and electrically coupled to the substrate, and an underfill material disposed at least partially between the electronic component and the substrate. A lateral portion of the underfill material can comprises a lateral surface extending away from the substrate and a meniscus surface extending between the lateral surface and the electronic component.Type: GrantFiled: April 1, 2016Date of Patent: April 2, 2019Assignee: Intel CorporationInventors: Jimin Yao, Eric Li, Shawna Liff
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Patent number: 10090259Abstract: Electronic device shape configuration technology is disclosed. In an example, an electronic device substrate is provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. An electronic device die is also provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. In addition, an electronic device package is provided that can comprise a substrate having a top surface configured to receive a die and a bottom surface opposing the top surface. The package can also include a die having a top surface and a bottom surface opposing the top surface. The die can be coupled to the top surface of the substrate. The top surface and/or the bottom surface of either the substrate, or the die, or both can have a non-rectangular shaped perimeter.Type: GrantFiled: December 26, 2015Date of Patent: October 2, 2018Assignee: Intel CorporationInventors: Pramod Malatkar, Sairam Agraharam, Shawna Liff
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Publication number: 20180263117Abstract: This disclosure relates generally to devices, systems, and methods for making a flexible microelectronic assembly. In an example, a polymer is molded over a microelectronic component, the polymer mold assuming a substantially rigid state following the molding. A routing layer is formed with respect to the microelectronic component and the polymer mold, the routing layer including traces electrically coupled to the microelectronic component. An input is applied to the polymer mold, the polymer mold transitioning from the substantially rigid state to a substantially flexible state upon application of the input.Type: ApplicationFiled: November 13, 2017Publication date: September 13, 2018Inventors: Sasha N. Oster, Robert L. Sankman, Charles Gealer, Omkar Karhade, John S. Guzek, Ravindranath V. Mahajan, James C. Matayabas, JR., Johanna M. Swan, Feras Eid, Shawna Liff, Timothy McIntosh, Telesphor Kamgaing, Adel A. Elsherbini, Kemal Aygun
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Patent number: 9942980Abstract: Embodiments of the present disclosure describe a wavy interconnect for bendable and stretchable devices and associated techniques and configurations. In one embodiment, an interconnect assembly includes a flexible substrate defining a plane and a wavy interconnect disposed on the flexible substrate and configured to route electrical signals of an integrated circuit (IC) device in a first direction that is coplanar with the plane, the wavy interconnect having a wavy profile from a second direction that is perpendicular to the first direction and coplanar with the plane. Other embodiments may be described and/or claimed.Type: GrantFiled: May 28, 2014Date of Patent: April 10, 2018Assignee: INTEL CORPORATIONInventors: Chuan Hu, Adel A. Elsherbini, Yoshihiro Tomita, Shawna Liff
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Publication number: 20180049309Abstract: Some forms relate to a stretchable computing device that includes a stretchable body; a first electronic component embedded within the stretchable body; a second electronic component embedded within the stretchable body; and wherein the first electronic component and the second electronic component are connected by stretchable electrical connectors that include vias. The stretchable electrical connectors are non-planar and/or may have a partial zig-zag shape and/or a partial coil shape. In some forms, the stretchable computing device further includes a textile attached to the stretchable body.Type: ApplicationFiled: October 25, 2017Publication date: February 15, 2018Inventors: Adel A. Elsherbini, Aleksandar Aleksov, Shawna Liff
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Patent number: 9832863Abstract: Some forms relate to a stretchable computing device that includes a stretchable body; a first electronic component embedded within the stretchable body; a second electronic component embedded within the stretchable body; and wherein the first electronic component and the second electronic component are connected by stretchable electrical connectors that include vias. The stretchable electrical connectors are non-planar and/or may have a partial zig-zag shape and/or a partial coil shape. In some forms, the stretchable computing device further includes a textile attached to the stretchable body.Type: GrantFiled: September 25, 2015Date of Patent: November 28, 2017Assignee: Intel CorporationInventors: Adel Elsherbini, Aleksandar Aleksov, Shawna Liff
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Patent number: 9820384Abstract: This disclosure relates generally to devices, systems, and methods for making a flexible microelectronic assembly. In an example, a polymer is molded over a microelectronic component, the polymer mold assuming a substantially rigid state following the molding. A routing layer is formed with respect to the microelectronic component and the polymer mold, the routing layer including traces electrically coupled to the microelectronic component. An input is applied to the polymer mold, the polymer mold transitioning from the substantially rigid state to a substantially flexible state upon application of the input.Type: GrantFiled: December 11, 2013Date of Patent: November 14, 2017Assignee: Intel CorporationInventors: Sasha Oster, Robert L. Sankman, Charles Gealer, Omkar Karhade, John S. Guzek, Ravi V. Mahajan, James C. Matayabas, Jr., Johanna Swan, Feras Eid, Shawna Liff, Timothy McIntosh, Telesphor Kamgaing, Adel Elsherbini, Kemal Aygun
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Publication number: 20170287735Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a substrate, an electronic component disposed on the substrate and electrically coupled to the substrate, and an underfill material disposed at least partially between the electronic component and the substrate. A lateral portion of the underfill material can comprises a lateral surface extending away from the substrate and a meniscus surface extending between the lateral surface and the electronic component.Type: ApplicationFiled: April 1, 2016Publication date: October 5, 2017Applicant: Intel CorporationInventors: Jimin Yao, Eric Li, Shawna Liff
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Publication number: 20170186705Abstract: Electronic device shape configuration technology is disclosed. In an example, an electronic device substrate is provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. An electronic device die is also provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. In addition, an electronic device package is provided that can comprise a substrate having a top surface configured to receive a die and a bottom surface opposing the top surface. The package can also include a die having a top surface and a bottom surface opposing the top surface. The die can be coupled to the top surface of the substrate. The top surface and/or the bottom surface of either the substrate, or the die, or both can have a non-rectangular shaped perimeter.Type: ApplicationFiled: December 26, 2015Publication date: June 29, 2017Applicant: Intel CorporationInventors: Pramod Malatkar, Sairam Agraharam, Shawna Liff
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Patent number: 9635764Abstract: An integrated circuit that includes a substrate having a shape memory material (SMM), the SMM is in a first deformed state and has a first crystallography structure and a first configuration, the SMM is able to be deformed from a first configuration to a second configuration, the SMM changes to a second crystallography structure and deforms back to the first configuration upon receiving energy, the SMM returns to the first crystallography structure upon receiving a different amount of energy; and an electronic component attached to substrate. In other forms, the SMM is in a first deformed state and has a first polymeric conformation and a first configuration, the SMM changes from a first polymeric conformation to a second polymeric conformation and be deformed from a first configuration to a second configuration, the SMM changes returns to the first polymeric conformation and deforms back to the first configuration upon receiving energy.Type: GrantFiled: September 25, 2015Date of Patent: April 25, 2017Assignee: Intel CorporationInventors: Shipeng Qiu, Shawna Liff, Kayleen L Helms, Joshua D Heppner, Adel Elsherbini, Johanna Swan, Gary M. Barnes
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Publication number: 20170094799Abstract: An integrated circuit that includes a substrate having a shape memory material (SMM), the SMM is in a first deformed state and has a first crystallography structure and a first configuration, the SMM is able to be deformed from a first configuration to a second configuration, the SMM changes to a second crystallography structure and deforms back to the first configuration upon receiving energy, the SMM returns to the first crystallography structure upon receiving a different amount of energy; and an electronic component attached to substrate. In other forms, the SMM is in a first deformed state and has a first polymeric conformation and a first configuration, the SMM changes from a first polymeric conformation to a second polymeric conformation and be deformed from a first configuration to a second configuration, the SMM changes returns to the first polymeric conformation and deforms back to the first configuration upon receiving energy.Type: ApplicationFiled: September 25, 2015Publication date: March 30, 2017Inventors: Shipeng Qiu, Shawna Liff, Kayleen L. Helms, Joshua D. Heppner, Adel Elsherbini, Johanna Swan, Gary M. Barnes