Patents by Inventor Shaz Qadeer

Shaz Qadeer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090178044
    Abstract: Techniques for providing a fair stateless model checker are disclosed. In some aspects, a schedule is generated to allocate resources for threads of a multi-thread program in lieu of having an operating system allocate resources for the threads. The generated schedule is both fair and exhaustive. In an embodiment, a priority graph may be implemented to reschedule a thread when a different thread is determined not to be making progress. A model checker may then implement one of the generated schedules in the program in order to determine if a bug or a livelock occurs during the particular execution of the program. An output by the model checker may facilitate identifying bugs and/or livelocks, or authenticate a program as operating correctly.
    Type: Application
    Filed: January 9, 2008
    Publication date: July 9, 2009
    Applicant: MICROSOFT CORPORATION
    Inventors: Madanlal Musuvathi, Shaz Qadeer
  • Patent number: 7555418
    Abstract: Procedure summaries can be generated and used for multithreaded software. A set of actions for a software procedure can be identified as atomically modelable with respect to multithreaded execution of the software. Such actions can be considered a transaction and deemed to have occurred one after another without interruption by other threads. Thus, multithreaded execution of the software can be modeled to detect programming flaws. For example, reachability analysis can be used in concert with the procedure summaries to determine if specified invariants fail.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: June 30, 2009
    Assignee: Microsoft Corporation
    Inventors: Shaz Qadeer, Niels Jakob Rehof, Sriram K. Rajamani
  • Patent number: 7526750
    Abstract: The state space of modeled software can be explored using an object-based systematic state explorer. The object-based model can perform well even in light of the complexities of concurrent software. During state space exploration, differences between states can be stored instead of storing a complete copy of the state.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: April 28, 2009
    Assignee: Microsoft Corporation
    Inventors: Anthony D. Andrews, Shaz Qadeer, Niels Jakob Rehof, Sriram K. Rajamani, Yichen Xie
  • Publication number: 20080271042
    Abstract: Testing multithreaded application programs for errors can be carried out in an efficient and productive manner at least in part by prioritizing thread schedules based on numbers of context switches between threads therein. In particular, each thread schedule in a multithreaded application program can be prioritized based on whether a given thread schedule has the same as or less than some maximum value. A model checker module can then iteratively execute thread schedules that fit within a given context switch maximum value, or a progressively higher value up to some limit. In one implementation, for example, the model checker module executes all thread schedules that have zero preempting context switches, then all thread schedules that have only one preempting context switch, etc. Most errors in an application program can be identified by executing only those thread schedule with relatively few preempting context switches.
    Type: Application
    Filed: April 24, 2007
    Publication date: October 30, 2008
    Applicant: MICROSOFT CORPORATION
    Inventors: Madanlal S. Musuvathi, Shaz Qadeer
  • Patent number: 7316005
    Abstract: A concurrent program is analyzed for the presence of data races by the creation of a sequential program from the concurrent program. The sequential program contains assertions which can be verified by a sequential program analysis tool, and which, when violated, indicate the presence of a data race. The sequential program emulates multiple executions of the concurrent program by nondeterministically scheduling asynchronous threads of the concurrent program on a single runtime stack and nondeterministically removing the currently-executing thread from the stack before instructions of the program. Checking functions are used to provide assertions for data races, along with a global access variable, which indicates if a variable being analyzed for data races is currently being accessed by any threads.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: January 1, 2008
    Assignee: Microsoft Corporation
    Inventors: Shaz Qadeer, Dinghao Wu
  • Publication number: 20070245312
    Abstract: A data race detection system is described which precisely identifies data races in concurrent programs. The system and techniques described utilize locksets to maintain information while searching through executions of a concurrent program. The locksets are updated according to program statements in the concurrent program. The dynamic updating of the locksets, combined with a less conservative approach then used in existing lockset data race detection techniques, allows the technique to be precise; that is, the technique does not report false positives when searching a program.
    Type: Application
    Filed: April 12, 2006
    Publication date: October 18, 2007
    Applicant: Microsoft Corporation
    Inventors: Shaz Qadeer, Tayfun Elmas
  • Publication number: 20060247907
    Abstract: Described techniques and tools facilitate model checking for program models that effectively model pointer behavior while avoiding complexity in the model itself, thereby allowing rigorous and accurate testing of the model. A model checking algorithm for deciding assertions in programs with references terminates and yields precise results even on programs that allocate an unbounded amount of memory.
    Type: Application
    Filed: April 29, 2005
    Publication date: November 2, 2006
    Applicant: Microsoft Corporation
    Inventors: Shaz Qadeer, Sriram Rajamani
  • Publication number: 20060248515
    Abstract: Described techniques and tools help model checking scale to large programs while reducing missed errors. In particular, described techniques and tools help reduce the state space of concurrent programs without depending on cycle detection and without scheduling execution of postponed threads at all cycles. For example, described techniques and tools use a type of partial-order reduction called transaction-based reduction to reduce program state space. Analysis is performed at commit points to determine whether to schedule delayed threads.
    Type: Application
    Filed: April 29, 2005
    Publication date: November 2, 2006
    Applicant: Microsoft Corporation
    Inventors: Shaz Qadeer, Sriram Rajamani, Vladimir Levin, Robert Palmer
  • Publication number: 20060130010
    Abstract: Validity of one or more assertions for any concurrent execution of a plurality of software instructions with at most k?1 context switches can be determined. Validity checking can account for execution of the software instructions in an unbounded stack depth scenario. A finite data domain representation can be used. The software instructions can be represented by a pushdown system. Validity checking can account for thread creation during execution of the plurality of software instructions.
    Type: Application
    Filed: December 10, 2004
    Publication date: June 15, 2006
    Applicant: Microsoft Corporation
    Inventors: Niels Rehof, Shaz Qadeer
  • Publication number: 20050177775
    Abstract: A concurrent program is analyzed for the presence of data races by the creation of a sequential program from the concurrent program. The sequential program contains assertions which can be verified by a sequential program analysis tool, and which, when violated, indicate the presence of a data race. The sequential program emulates multiple executions of the concurrent program by nondeterministically scheduling asynchronous threads of the concurrent program on a single runtime stack and nondeterministically removing the currently-executing thread from the stack before instructions of the program. Checking functions are used to provide assertions for data races, along with a global access variable, which indicates if a variable being analyzed for data races is currently being accessed by any threads.
    Type: Application
    Filed: January 26, 2004
    Publication date: August 11, 2005
    Inventors: Shaz Qadeer, Dinghao Wu
  • Patent number: 6892319
    Abstract: A method of verifying a protocol for a shared-memory multiprocessor system for sequential consistency. In the system there are n processors and m memory locations that are shared by the processors. A protocol automaton, such as a cache coherence protocol automaton, is developed. The protocol automaton and a plurality of checker automata are provided to a model checker which exhaustively searches the state space of the protocol automaton. During the search, the plurality of checker automata check for the presence of cycles in a graph that is the union of the total orders of the processor references and the partial orders at each memory location. If the plurality of checker automata detect the presence of a cycle, then the protocol does not meet the sequential consistency requirement.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: May 10, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Shaz Qadeer
  • Publication number: 20050086648
    Abstract: The state space of modeled software can be explored using an object-based systematic state explorer. The object-based model can perform well even in light of the complexities of concurrent software. During state space exploration, differences between states can be stored instead of storing a complete copy of the state.
    Type: Application
    Filed: February 13, 2004
    Publication date: April 21, 2005
    Inventors: Anthony Andrews, Shaz Qadeer, Niels Rehof, Sriram Rajamani, Yichen Xie
  • Publication number: 20020166032
    Abstract: A method of verifying a protocol for a shared-memory multiprocessor system for sequential consistency. In the system there are n processors and m memory locations that are shared by the processors. A protocol automaton, such as a cache coherence protocol automaton, is developed. The protocol automaton and a plurality of checker automata are provided to a model checker which exhaustively searches the state space of the protocol automaton. During the search, the plurality of checker automata check for the presence of cycles in a graph that is the union of the total orders of the processor references and the partial orders at each memory location. If the plurality of checker automata detect the presence of a cycle, then the protocol does not meet the sequential consistency requirement.
    Type: Application
    Filed: September 7, 2001
    Publication date: November 7, 2002
    Inventor: Shaz Qadeer