Abstract: A molding device and an injection molding method thereof are provided. The molding device includes a first mold, a second mold and a sealing ring. The first mold includes a first body and at least one slide. The at least one slide is movably and detachably disposed on the first body, and has an undercut. The injection molding method includes operations of: engaging the first mold with the second mold of the molding device; filling a mold cavity defined by the first mold and the second mold with a gas, wherein the gas is blocked by the sealing ring disposed between the first mold and the second mold; injecting a molding material into the mold cavity; and opening the first mold and the second mold of the molding device.

Abstract: An inverter parallel system and a zero feed-in control method for the inverter parallel system are provided. The system includes at least one first inverter, at least one second inverter, a load, an electrical grid, a controller, and an electrical parameter measuring device. The controller includes a system control module, and the first inverter includes an inverter control module. The system control module is configured to determine a battery power reference value of an energy storage battery according to an electrical grid current reference value and an electrical grid current sampling value. The inverter control module is configured to control the first inverter, such that a feed-in current flowing into the electrical grid side is zero, and the second inverter operates in a maximum power point tracking state. Therefore, in the system, zero feed-in control may be achieved without energy management and without communication between inverters.

Abstract: Apparatus and methods are provided for RRM measurement in the NR network. In one novel aspect, the RRM measurement is configured with one measurement gap for SS block and CSI-RS. In one embodiment, an extended MGL (eMGL) is configured such that the SS block and CSI-RS is measurement within one measurement gap. In another embodiment, the shorter MGL (sMGL) that is shorter than the standard MGL is configured. In another novel aspect, the CSI-RS is allocated adjacent to the SS blocks such that one measurement gap is configured for both the SS block and CSI-RS measurement. In another novel aspect, the CSI-RS measurement is conditionally configured. In yet another novel aspect, the UE decodes the time index of the SS block conditionally.

Abstract: A charging system utilizing energy storage multiplication is provided. An energy storage battery pack of the charging system is directly connected to a DC power transmission bus. When the charging request is initiated by the charging device, the charging device takes the power from the DC bus, the AC-DC converter and DC-DC converter connected to the energy generation device work as the energy source to deliver power to the DC bus, the power goes through the DC bus to the charging device, and the rest of the power goes to the energy storage device or goes out form the energy storage device when the charring power is higher than total energy from all other converters. The high C rate discharging of the energy storage device means high power capacity during discharging, this can provide much high power than AC-DC converter to fulfill the requirement of charging device.

Abstract: A method for manufacturing an embedded component structure includes providing a circuit board having a through hole and a heat dissipation layer; disposing a chip in the through hole; forming a dielectric layer on a first surface and a second surface of the circuit board to seal the chip and cover a lower surface of the heat dissipation layer; removing a first part of the dielectric layer to form a first opening from which a upper surface of the heat dissipation layer is exposed and a second opening from which the lower surface of the heat dissipation layer is exposed; and forming a thermal conductive material layer in the first and the second opening to form a heat dissipation element surrounding the chip. The upper surface of the heat dissipation layer is exposed from the through hole. The chip, the circuit board, and the heat dissipation element are electrically connected.

Abstract: An embedded component structure includes a circuit board, an electronic component, a first conductive terminal, and a second conductive terminal. The circuit board includes a first electrical connection layer and a second electrical connection layer. The electronic component is embedded in the circuit board and includes a first contact and a second contact. The first conductive terminal and the second conductive terminal respectively at least cover a part of top surfaces and side walls of the first contact and the second contact, and the first electrical connection layer and the second electrical connection layer are respectively electrically connected to the first contact and the second contact through the first conductive terminal and the second conductive terminal. A method for manufacturing an embedded component structure is also provided.

Abstract: A drug injection device contains a needle holder, an ejector, a needle member, and an actuation assembly. The needle holder defines a drug delivery direction extending toward the injection end. The ejector contains a fixing segment that is fixed to the needle holder and located in the drug delivery direction, and the abutting segment extending toward the injection end and protruding beyond the needle holder. The needle member is movably arranged relative to the needle holder and contains a needle shaft connected to a needle hub coaxially arranged with the ejector for the abutting segment inserting into the needle shaft. The actuator assembly connects the needle holder and the needle shaft for driving the needle member between a first position and a second position with respect to the needle holder.

Abstract: Provided are a non-volatile memory device and a manufacturing method thereof. The non-volatile memory device includes a substrate having a memory region and a dummy region surrounding the memory region, an interconnect structure, memory cells, conductive vias and dummy vias. The interconnect structure is disposed on the substrate and in the memory region. The memory cells are disposed on the interconnect structure and arranged in an array when viewed from a top view. The memory cells include first memory cells in the memory region and second memory cells in the dummy region. The conductive vias are disposed in the memory region and between the first memory cells and the interconnection structure to electrically connect each of the first memory cells to the interconnect structure. The dummy vias are disposed in the dummy region and surround the memory region.

Abstract: A semiconductor memory device includes a substrate having a conductor region thereon, an interlayer dielectric layer on the substrate, and a conductive via electrically connected to the conductor region. The conductive via has a lower portion embedded in the interlayer dielectric layer and an upper portion protruding from a top surface of the interlayer dielectric layer. The upper portion has a rounded top surface. A storage structure conformally covers the rounded top surface.

Abstract: A fan includes a fan hub and a plurality of blades. At least one of the blades includes an axial blade portion and a centrifugal blade portion. The axial blade portion has an axial arc surface. The axial arc surface extends between opposite two edges of the at least one blade, and connects with one of the two edges. The centrifugal blade portion has a guide trench. The guide trench extends away from the centrifugal blade portion. A width of the guide trench increases as it extends away from the centrifugal blade portion.

Abstract: An embedded component structure includes a circuit board, a chip, and a heat dissipation element. The chip is embedded in the circuit board. The heat dissipation element surrounds the chip. The chip, the circuit board, and the heat dissipation element are electrically connected. The heat dissipation element includes a first part, a second part, and a third part located between the first part and the second part. The first part is in direct contact with a side wall of the chip. The second part is a ground terminal. A method for manufacturing an embedded component structure is also provided.

Abstract: The embodiment of the invention is to enable universal non-classical MHC I peptide vaccines restricted to HLA-E, HLA-F and HLA-G. An algorithm was develop to predict HLA-E binding immunogenic or suppressorgenic peptides of the autologous origins, e.g., autoantigens, inflammatory antigens, IgE and cancer antigens, and of the microbial origins. Thus, the embodiment of the invention is to load the antigenic peptides of medical and therapeutic importance onto the non-polymorphic HLA-E, HLA-F, and HLA-G culminating in universal vaccines, bypassing highly polymorphic classical MHC I, e.g., HLA-A, HLA-B and HLA-C pathways, in order to treat autoimmune diseases, allergy, inflammatory diseases, cancers, and infectious diseases for all human population. Derlin-1 and UL40 pathways are utilized to enable antigen presentation and vaccine efficacies in the non-classical MHC I pathways.

Abstract: Apparatus and methods are provided for RRM measurement in the NR network. In one novel aspect, the RRM measurement is configured with one measurement gap for SS block and CSI-RS. In one embodiment, an extended MGL (eMGL) is configured such that the SS block and CSI-RS is measurement within one measurement gap. In another embodiment, the shorter MGL (sMGL) that is shorter than the standard MGL is configured. In another novel aspect, the CSI-RS is allocated adjacent to the SS blocks such that one measurement gap is configured for both the SS block and CSI-RS measurement. In another novel aspect, the CSI-RS measurement is conditionally configured. In yet another novel aspect, the UE decodes the time index of the SS block conditionally.

Abstract: In some examples a computing device, comprising a battery, a processing resource and a memory resource storing non-transitory machine-readable instructions can cause the processing resource to determine a battery charge capacity of the battery, in response to the battery charge capacity being less than a threshold capacity, cause the battery to charge, and in response to the battery charge capacity being greater than the threshold capacity, compare the battery charge capacity of the computing device with a different battery charge capacity associated with a different computing device, and based on the comparison, cause a charge determination event to occur.

Abstract: A photovoltaic energy storage system and a control method for the photovoltaic energy storage system are provided. The photovoltaic energy storage system includes an energy storage unit, a photovoltaic array assembly, an inverter and a rapid shutdown switch. The inverter is electrically coupled to the energy storage unit and the photovoltaic array assembly. The rapid shutdown switch is electrically coupled to the inverter, a power grid and a load. A detecting and controlling circuit of the inverter detects at least two of a first voltage, a second voltage and a third voltage, and determines whether the rapid shutdown switch is turned off according to the detected voltages and a reference value. When it is determined that the rapid shutdown switch is turned off, a connection between the inverter and the energy storage unit and a connection between the inverter and the photovoltaic array assembly are cut off.

Abstract: A reconfigurable metamaterial is used to enhance the reception field of a radio frequency (“RF”) coil for use in magnetic resonance imaging (“MRI”). In general, the metamaterial can be a metasurface, which may be flexible, having a periodic array of resonators. Each resonator in the periodic array can be defined as a unit cell of the metamaterial and/or metasurface. The unit cells include a first conductor and a second conductor separated by an insulator layer. The first conductor can be a solid conductor and the second conductor can be a conductive fluid (e.g., a liquid metal, a liquid metal alloy) contained within a microfluidic channel. Varying the volume of conductive fluid in each unit cell adjust the signal enhancement ratio of the metamaterial.

Abstract: An islanding detection system and method for multiple inverters operating in parallel, wherein the multiple inverters at least comprises a first inverter and a second inverter connected in parallel. The islanding detection system comprises a current detection circuit arranged on a grid side or an AC side of the second inverter; and a controller connected to the current detection circuit and the first inverter. The controller determines whether to perform distributed islanding detection or centralized islanding detection on the first inverter and the second inverter according to a grid voltage signal and a current detection signal of the current detection circuit. By recognizing the islanding detection mode of the second inverter, matching it with typical islanding detection modes preset in a library, and determining to perform a distributed or centralized islanding detection according to matching results, the application improves the success ratio of islanding detection.

Abstract: A voltage balance circuit includes a battery module connected to an external power source, a voltage dividing module, a detection module and a control module. The battery module includes a plurality of batteries connected in series. The voltage dividing module includes a plurality of bleeder resistors. Each bleeder resistor is connected with one battery in parallel. The detection module includes a plurality of thermistors, fixation resistances and micro-controllers. Each thermistor is arranged beside one bleeder resistor. Each thermistor is connected with one fixation resistance in series. Each micro-controller is connected with one thermistor and the one fixation resistance. The control module includes a plurality of switches and an analog front end component. Each switch is connected with the one bleeder resistor in series. Each switch is connected to the analog front end component, and the analog front end component is connected to the one micro-controller.