Abstract: The present disclosure relates to an image sensor integrated chip having a deep trench isolation (DTI) structure having a reflective element. In some embodiments, the image sensor integrated chip includes an image sensing element arranged within a substrate. A plurality of protrusions are arranged along a first side of the substrate over the image sensing element and one or more absorption enhancement layers are arranged over and between the plurality of protrusions. A plurality of DTI structures are arranged within trenches disposed on opposing sides of the image sensing element and extend from the first side of the substrate to within the substrate. The plurality of DTI structures respectively include a reflective element having one or more reflective regions configured to reflect electromagnetic radiation. By reflecting electromagnetic radiation using the reflective elements, cross-talk between adjacent pixel regions is reduced, thereby improving performance of the image sensor integrated chip.

Abstract: An image sensor device is provided. The image sensor device includes a substrate having a first surface, a second surface, and a light-sensing region. The image sensor device includes a first isolation structure in the substrate and adjacent to the first surface. The first isolation structure surrounds the light-sensing region. The image sensor device includes a second isolation structure passing through the first isolation structure and the substrate under the first isolation structure. The second isolation structure surrounds the light-sensing region and a portion of the first isolation structure.

Abstract: The present disclosure relates to an integrated circuit, and an associated method of formation. In some embodiments, the integrated circuit comprises a deep trench grid disposed at a back side of a substrate. A passivation layer lines the deep trench grid within the substrate. The passivation layer includes a first high-k dielectric layer and a second high-k dielectric layer disposed over the first high-k dielectric layer. A first dielectric layer is disposed over the passivation layer, lining the deep trench grid and extending over an upper surface of the substrate. A second dielectric layer is disposed over the first dielectric layer and enclosing remaining spaces of the deep trench grid to form air-gaps at lower portions of the deep trench grid. The air-gaps are sealed by the first dielectric layer or the second dielectric layer below the upper surface of the substrate.

Abstract: A semiconductor device includes a substrate, a dielectric structure, a top metal layer and a bonding structure. The dielectric structure is disposed on the substrate. The top metal layer is disposed in the dielectric structure. The bonding structure is disposed on the dielectric structure and the top metal layer. The bonding structure includes a silicon oxide layer, a silicon oxy-nitride layer, a conductive bonding layer and a barrier layer. The silicon oxide layer is disposed on the dielectric structure. The silicon oxy-nitride layer covers the silicon oxide layer. The conductive bonding layer is disposed in the silicon oxide layer and the silicon oxy-nitride layer. The barrier layer covers a sidewall and a bottom of the conductive bonding layer.

Abstract: A method for forming an image sensor device is provided. The method includes providing a substrate having a front surface and a back surface. The method includes removing a first portion of the substrate to form a first trench. The method includes forming a first isolation structure in the first trench. The first isolation structure has a top surface. The method includes removing a second portion of the first isolation structure and a third portion of the substrate to form a second trench passing through the first isolation structure and extending into the substrate. The method includes forming a second isolation structure in the second trench. The method includes forming a light-sensing region in the substrate. The method includes removing a fourth portion of the substrate to expose a first bottom portion of the second isolation structure and a backside of the light-sensing region.

Abstract: The present application relates to a method to simplify the scribe line opening filling processes, and to further improve the surface uniformity of the conductive pad fabrication process. A passivation layer is formed over a semiconductor substrate, and a scribe line opening is formed through the passivation layer and the semiconductor substrate. To fill the scribe line opening, a first dielectric layer is formed within the scribe line opening over the conductive pad and extending over the passivation layer. The first dielectric layer is formed by a selective deposition process such that the first dielectric layer is formed on the conductive pad at a deposition rate greater than that formed on the passivation layer.

Abstract: The present application relates to a method to simplify the scribe line opening filling processes, and to further improve the surface uniformity of the conductive pad fabrication process. A passivation layer is formed over a semiconductor substrate, and a scribe line opening is formed through the passivation layer and the semiconductor substrate. To fill the scribe line opening, a first dielectric layer is formed within the scribe line opening over the conductive pad and extending over the passivation layer. The first dielectric layer is formed by a selective deposition process such that the first dielectric layer is formed on the conductive pad at a deposition rate greater than that formed on the passivation layer.

Abstract: A semiconductor device includes a substrate, a dielectric structure, a top metal layer and a bonding structure. The dielectric structure is disposed on the substrate. The top metal layer is disposed in the dielectric structure. The bonding structure is disposed on the dielectric structure and the top metal layer. The bonding structure includes a silicon oxide layer, a silicon oxy-nitride layer, a conductive bonding layer and a barrier layer. The silicon oxide layer is disposed on the dielectric structure. The silicon oxy-nitride layer covers the silicon oxide layer. The conductive bonding layer is disposed in the silicon oxide layer and the silicon oxy-nitride layer. The barrier layer covers a sidewall and a bottom of the conductive bonding layer.

Abstract: A complementary metal-oxide-semiconductor (CMOS) image sensor having a passivation layer is provided. The CMOS image sensor includes a sensing device substrate. Isolation structures are positioned within trenches of the sensing device substrate. The isolation structures are arranged along opposing sides of a plurality of image sensing devices. The CMOS image sensor also includes a passivation layer. The passivation layer includes passivation sidewalls arranged along the sidewalls of the isolation structures. A metallic grid overlies the passivation layer. The metallic grid includes a metal framework surrounding openings overlying the plurality of image sensing devices. The passivation layer further includes passivation section underlying the openings.

Abstract: A complementary metal-oxide-semiconductor (CMOS) image sensor having a passivation layer is provided. The CMOS image sensor includes a sensing device substrate. Isolation structures are positioned within trenches of the sensing device substrate. The isolation structures are arranged along opposing sides of a plurality of image sensing devices. The CMOS image sensor also includes a passivation layer. The passivation layer includes passivation sidewalls arranged along the sidewalls of the isolation structures. A metallic grid overlies the passivation layer. The metallic grid includes a metal framework surrounding openings overlying the plurality of image sensing devices. The passivation layer further includes passivation section underlying the openings.

Abstract: A method of fabricating a semiconductor device includes forming a first film having a first film stress type and a first film stress intensity over a substrate and forming a second film having a second film stress type and a second film stress intensity over the first film. The second film stress type is different than the first film stress type. The second film stress intensity is about same as the first film stress intensity. The second film compensates stress induced effect of non-flatness of the substrate by the first film.

Abstract: The present disclosure relates to an integrated circuit, and an associated method of formation. In some embodiments, the integrated circuit comprises a deep trench grid disposed at a back side of a substrate. A passivation layer lines the deep trench grid within the substrate. The passivation layer includes a first high-k dielectric layer and a second high-k dielectric layer disposed over the first high-k dielectric layer. A first dielectric layer is disposed over the passivation layer, lining the deep trench grid and extending over an upper surface of the substrate. A second dielectric layer is disposed over the first dielectric layer and enclosing remaining spaces of the deep trench grid to form air-gaps at lower portions of the deep trench grid. The air-gaps are sealed by the first dielectric layer or the second dielectric layer below the upper surface of the substrate.

Abstract: Semiconductor image sensor devices and manufacturing method of the same are disclosed. The semiconductor image sensor device includes a substrate, a first pixel and a second pixel, and an isolation structure. The first pixel and second pixel are disposed in the substrate, wherein the first and second pixels are neighboring pixels. The isolation structure is disposed in the substrate and between the first and second pixels, wherein the isolation structure includes a dielectric layer, and the dielectric layer includes silicon oxycarbonitride (SiOCN).

Abstract: The present disclosure relates to a BSI image sensor with improved DTI structures, and an associated method of formation. In some embodiments, the BSI image sensor comprises a plurality of image sensing elements disposed within a substrate corresponding to a plurality of pixel regions. A deep trench isolation (DTI) grid is disposed between adjacent image sensing elements and extending from an upper surface of the substrate to positions within the substrate. The DTI grid comprises air-gaps disposed under the upper surface of the substrate, the air-gaps having lower portions surrounded by a first dielectric layer and some upper portions sealed by a second dielectric layer.

Abstract: The present disclosure relates to a BSI image sensor with improved DTI structures, and an associated method of formation. In some embodiments, the BSI image sensor comprises a plurality of image sensing elements disposed within a substrate corresponding to a plurality of pixel regions. A deep trench isolation (DTI) grid is disposed between adjacent image sensing elements and extending from an upper surface of the substrate to positions within the substrate. The DTI grid comprises air-gaps disposed under the upper surface of the substrate, the air-gaps having lower portions surrounded by a first dielectric layer and some upper portions sealed by a second dielectric layer.

Abstract: Some embodiments of the present disclosure provide a semiconductor structure comprising: a substrate, a radiation-sensing region in the substrate, and a trench in the substrate including a liner over an inner wall of the trench, a FSG layer over the line, an oxide layer over the FSG layer, and a reflective material over the oxide layer. The radiation-sensing region of the semiconductor structure comprises a plurality of radiation-sensing units. The trench of the semiconductor structure separates at least two of the radiation-sensing units. The FSG layer of the semiconductor structure comprises at least 2 atomic percent free fluorine and a thickness of from about 500 to about 1300 angstroms.