Abstract: The present disclosure, in some embodiments, relates to a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A first dielectric layer is over the lower dielectric structure and includes sidewalls defining a plurality of openings extending through the first dielectric layer. A lower electrode is arranged along the sidewalls and over an upper surface of the first dielectric layer, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is along opposing outermost sidewalls of the upper electrode. The spacer has an outermost surface extending from a lowermost surface of the spacer to a top of the spacer. The outermost surface is substantially aligned with an outermost sidewall of the lower electrode.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC includes a first dielectric structure having first inner sidewalls over an interlayer dielectric (ILD) structure. A second dielectric structure is over the first dielectric structure, where the first inner sidewalls are between second inner sidewalls of the second dielectric structure. A sidewall barrier structure is over the first dielectric structure and extends vertically along the second inner sidewalls. A lower bumping structure is between the second inner sidewalls and extends vertically along the first inner sidewalls and vertically along third inner sidewalls of the sidewall barrier structure. An upper bumping structure is over both the lower bumping structure and the sidewall barrier structure and between the second inner sidewalls, where an uppermost point of the upper bumping structure is at or below an uppermost point of the second dielectric structure.

Abstract: The present disclosure, in some embodiments, relates to a method of forming a capacitor structure. The method includes forming a capacitor dielectric layer over a lower electrode layer, and forming an upper electrode layer over the capacitor dielectric layer. The upper electrode layer is etched to define an upper electrode and to expose a part of the capacitor dielectric layer. A spacer structure is formed over horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and also along sidewalls of the upper electrode. The spacer structure is etched to remove the spacer structure from over the horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and to define a spacer. The capacitor dielectric layer and the lower electrode layer are etched according to the spacer to define a capacitor dielectric and a lower electrode.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor structure including a bond bump disposed on an upper surface of an upper conductive structure. The upper conductive structure overlies a substrate. A buffer layer is disposed along the upper surface of the upper conductive structure. The bond bump comprises a sidewall having a straight sidewall segment overlying a curved sidewall segment.

Abstract: A method and an apparatus for migrating virtual machine includes monitoring a status of a compute node; determining whether the compute node meets a trigger condition; wherein the trigger condition comprising a time period of lost connection of the compute node reaches a predetermined time period, or an unstable status of the compute node; and if the compute node meets the trigger condition, transmitting a message to a control node to migrate the VM.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC includes a first dielectric structure having first inner sidewalls over an interlayer dielectric (ILD) structure. A second dielectric structure is over the first dielectric structure, where the first inner sidewalls are between second inner sidewalls of the second dielectric structure. A sidewall barrier structure is over the first dielectric structure and extends vertically along the second inner sidewalls. A lower bumping structure is between the second inner sidewalls and extends vertically along the first inner sidewalls and vertically along third inner sidewalls of the sidewall barrier structure. An upper bumping structure is over both the lower bumping structure and the sidewall barrier structure and between the second inner sidewalls, where an uppermost point of the upper bumping structure is at or below an uppermost point of the second dielectric structure.

Abstract: The present disclosure provides improved methods for learning a generative model with limited training data, by leveraging a pre-trained GAN model from a related domain and adapting it to the new domain given a set of target examples from the new or target domain.

Abstract: A method may include obtaining an infrared image of an object and determining a difference of Gaussian image that represents features of the infrared image that have spatial frequencies within a spatial frequency range defined by a first Gaussian operator and a second Gaussian operator. The method may also include identifying one or more blob regions within the difference of Gaussian image. Each blob region of the one or more blob regions includes a region of connected pixels in the difference of Gaussian image. The method may further include, based on identifying the one or more blob regions within the difference of Gaussian image, determining that the infrared image represents the object illuminated by a pattern projected onto the object by an infrared projector.

Abstract: A method of checking connection states of source nodes in a cluster is carried out by host computer, collecting information of a source node of each monitored computer, and generating a checking list. Each source corresponds to a plurality of network interface, and each network interface corresponds to a plurality of target nodes. At least one source node is selected as a to-be-checked source node. Each to-be-checked source node confirms the corresponding target nodes based on an instruction to detect network. Connection states between each to-be-checked source node and the target nodes are detected. A reason for detection failure is confirmed based on the result of detection and the checking list. An electronic device and a computer readable storage medium applying the method are also disclosed.

Abstract: A method of checking connection states of source nodes in a cluster is carried out by host computer, collecting information of a source node of each monitored computer, and generating a checking list. Each source corresponds to a plurality of network interface, and each network interface corresponds to a plurality of target nodes. At least one source node is selected as a to-be-checked source node. Each to-be-checked source node confirms the corresponding target nodes based on an instruction to detect network. Connection states between each to-be-checked source node and the target nodes are detected. A reason for detection failure is confirmed based on the result of detection and the checking list. An electronic device and a computer readable storage medium applying the method are also disclosed.

Abstract: A microscope apparatus includes light source configured to generate an illuminating beam. The microscope apparatus further includes a first beam splitter configured to split the illuminating beam into a first component along a first path and a second component along a second path. The microscope apparatus further includes a movable reflector module along the second path. The microscope apparatus further includes a moving mechanism connected to the movable reflector module, wherein the moving mechanism is configured to move the movable reflector in a first direction for adjusting a length of the second path. The microscope apparatus further includes a second beam splitter configured to recombine the first component and the second component. The microscope apparatus further includes an observing device configured to receive the recombined first component and second component.

Abstract: A method and an apparatus for migrating virtual machine includes monitoring a status of a compute node; determining whether the compute node meets a trigger condition; wherein the trigger condition comprising a time period of lost connection of the compute node reaches a predetermined time period, or an unstable status of the compute node; and if the compute node meets the trigger condition, transmitting a message to a control node to migrate the VM.

Abstract: Examples of computing devices and methods for changing firmware settings of a computing device are described herein. In an example, a request for change in a firmware setting is received. In response to the request, the firmware setting is changed in real-time.

Abstract: A reflective mask includes a substrate, a lower reflective multilayer disposed over the substrate, an intermediate layer disposed over the lower reflective multilayer, an upper reflective multilayer disposed over the intermediate layer, a capping layer disposed over the upper reflective multilayer, and an absorber layer disposed in a trench formed in the upper reflective layers and over the intermediate layer. The intermediate layer includes a metal other than Cr, Ru, Si, Si compound and carbon.

Abstract: A computing device may include a display, an audio output device, a sensor to detect the position of the display relative to the audio output device, and a processor to receive the detected position of the display and adjust audio output from the audio output device based on the detected position of the display.

Abstract: A total biological count associated with treated water produced by a wastewater treatment system may be monitored online in a decentralized non-potable water system. Preventative and/or corrective action can be taken in response to a deviation from a predetermined threshold level.

Abstract: Systems and methods of the present disclosure are directed to a computer-implemented method. The method can include obtaining a first image depicting a first object and a second image depicting a second object, wherein the first object comprises a first feature set and the second object comprises a second feature set. The method can include processing the first image with a machine-learned image transformation model comprising a plurality of model channels to obtain a first channel mapping indicative of a mapping between the plurality of model channels and the first feature set. The method can include processing the second image with the model to obtain a second channel mapping indicative of a mapping between the plurality of model channels and the second feature set. The method can include generating an interpolation vector for a selected feature.

Abstract: The present disclosure provides a method for forming a semiconductor structure. The method includes the following operations. A metal layer is formed. An adhesion-enhancing layer is formed over the metal layer. A dielectric stack is formed over the adhesion-enhancing layer. A trench is formed in the dielectric stack. A barrier layer is formed conforming to the sidewall of the trench. A high-k dielectric layer is formed conforming to the barrier layer. A sacrificial layer is formed conforming to the high-k dielectric layer.

Abstract: The present disclosure provides a method for forming a semiconductor structure. The method includes the following operations. A metal layer is formed. An adhesion-enhancing layer is formed over the metal layer by a silicide operation. A dielectric stack is formed over the adhesion-enhancing layer. A trench is formed in the dielectric stack by removing a portion of dielectric stack aligning with the metal layer. A barrier layer is formed conforming to the sidewall of the trench. A high-k dielectric layer is formed conforming to the barrier layer. A contact is formed in the trench and be connected to the metal layer.

Abstract: In an example, an audio, video, and voice communication (AVC) processor includes an audio and video (AV) port to receive audio and video (AV) signals and an audio and voice input/output (I/O) port to communicate with a voice transceiver. The control unit, coupled to the AVC processor, controls the AVC processor to select the received signals and enables the AVC processor to transmit the selected signals to a media and voice playing unit.