Patents by Inventor Sheng Lin
Sheng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250148969Abstract: An electronic device comprises a display and a controller. The controller is configured to provide a first frequency refresh rate to the display. The controller is also configured to generate a control signal configured to control emission of a light emitting diode of a display pixel of the display at a second frequency based on whether the first frequency refresh rate of the display is less than a predetermined threshold value.Type: ApplicationFiled: January 10, 2025Publication date: May 8, 2025Inventors: Chin-Wei Lin, Hung Sheng Lin, Vasudha Gupta, Shinya Ono, Tsung-Ting Tsai, Shyuan Yang
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Publication number: 20250144618Abstract: The present disclosure provides a biochemical test module. The biochemical test module includes a first reaction piece and a second reaction piece. The first reaction piece includes a first substrate; a first separator located on the first substrate and having a first flow channel exposing at least a portion of the first substrate; and a first cover covering the first separator. The first hole is connected with a first channel. The first reaction piece has a perforated structure penetrating the first cover, the first separator and the first substrate. The second reaction piece is disposed on one side of the first reaction piece adjacent to the first substrate and includes a second substrate; a second separator located on the second substrate and having a second flow channel exposing at least a portion of the second substrate; and a second cover covering the second separator and joined to the first substrate.Type: ApplicationFiled: January 5, 2024Publication date: May 8, 2025Inventors: YI-SHENG LIN, CHI-YANG PENG, NAI-JUI CHUEH, CHENG-CHE WEN, TANG-CHING KUAN
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Publication number: 20250145666Abstract: The present disclosure relates to cyclic oligopeptides that bind to interleukin-13 (IL-13) which are useful therapeutically in methods of treating or preventing IL-13-associated skin disorders or conditions. The present disclosure also provides methods to treat or prevent IL-13-associated skin disorders or conditions with the IL-13-binding cyclic oligopeptides. The present disclosure further provides methods to produce the IL-13-binding cyclic oligopeptides.Type: ApplicationFiled: November 19, 2024Publication date: May 8, 2025Inventors: Xuefei Bai, Sheng Lin, Le Li
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Publication number: 20250144236Abstract: A nitrogen-branched non-linear PEGylated lipid of Formula (1), wherein, X is —CRa< or (Ra is H or a C1-12 alkyl group); B1 and B2 are linking bonds or C1-20 alkylene groups; L1 and L2 are linking bonds or divalent linking groups; R1 and R2 are C1-50 aliphatic hydrocarbon groups or C1-50 residues of aliphatic hydrocarbon derivative, each containing 0-10 heteroatoms; Ld is a linking bond or a divalent linking group; Ncore is a multivalent group of valence y+1, and contains a trivalent nitrogen-atom branching core connected to Ld; y is 2, 3, 4, 5, 6, 7, 8, 9, or ?10; Lx is a linking bond or a divalent linking group; XPEG is a polyethylene glycol component. The non-linear PEGylated lipid herein can realize better surface modification of LNP. The lipid nanoparticle pharmaceutical composition and its formulation exhibit higher drug efficacy, especially for nucleic acid drugs.Type: ApplicationFiled: April 11, 2023Publication date: May 8, 2025Applicant: XIAMEN SINOPEG BIOTECH CO., LTD.Inventors: Wengui WENG, Chao LIU, Ailan WANG, Dandan CHEN, Sheng LIN, Guohua WEI, Qi ZHU, Congming LIN
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Patent number: 12294720Abstract: Neural network based substitutional end-to-end (E2E) image compression (NIC) being performed by at least one processor and includes receiving an input image to an E2E NIC framework, determining a step size of the input image indicating a learning rate of a training model, determining a substitute image based on the training model, encoding the substitute image in lieu of the input image to generate a bitstream, and mapping the substitute image to the bitstream to generate a compressed representation. Further, step size may be determined by a scheduler and change throughout the training of the training model. The image may also be split into patches for which a scheduler is assigned for each patch and each patch is encoded instead of the entire input image.Type: GrantFiled: October 13, 2021Date of Patent: May 6, 2025Assignee: TENCENT AMERICA LLCInventors: Sheng Lin, Ding Ding, Wei Jiang, Wei Wang, Xiaozhong Xu, Shan Liu
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Patent number: 12287975Abstract: A control method of a memory device includes: controlling a flash memory controller to transmit a command to a flash memory module; determining whether the flash memory controller is in an idle state; in response to the flash memory controller being in the idle state, determining whether an idle time of the idle state exceeds a threshold value, wherein the threshold value is less than a time required for the flash memory module to complete executing a write command or an erase command; and in response to the idle time exceeding the threshold value, controlling the flash memory controller to enter a power saving mode to turn off a part of components in the flash memory controller.Type: GrantFiled: July 10, 2023Date of Patent: April 29, 2025Assignee: Silicon Motion, Inc.Inventor: Wen-Sheng Lin
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Patent number: 12288960Abstract: A system and method for safe use of an optics assembly with an external light source and an optically coupled optics module is disclosed. The system includes an external light module emitting a continuous wave laser through an output port. An optics module has an input port and a memory. The optics module generates a modulated optical signal. The memory stores the power level of the continuous wave laser signal received by the optics module. An optical jumper is provided for coupling the output port with the input port. A communication bus is coupled between a controller and the external light source module. The controller sets the external light source at a low power level and transitions the external light source to a high power level when the stored power level of the continuous wave laser signal received by the optics module exceeds a predetermined level.Type: GrantFiled: May 9, 2024Date of Patent: April 29, 2025Assignee: QUANTA COMPUTER INC.Inventors: Chang-Sheng Lin, Hsiao-Hsien Weng, Zong-Syun He
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Publication number: 20250130256Abstract: A probe head includes an upper pin holder and a lower pin holder coupled to the upper pin holder. A pin arrangement space is defined between the upper pin holder and the lower pin holder. A conductive film is disposed between the upper pin holder and the lower pin holder. A plurality of probe pins penetrates through the upper pin holder, the conductor film and the lower pin holder, and extends outwardly from a bottom surface of the lower pin holder.Type: ApplicationFiled: October 3, 2024Publication date: April 24, 2025Applicant: MEDIATEK INC.Inventors: Jing-Hui Zhuang, Ying-Chou Shih, Chang-Lin Wei, Sheng-Wei Lei, Chih-Yang Liu, Jhih-Huei Chiu, Yen-Hui Li, Che-Sheng Lin
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Publication number: 20250132216Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface.Type: ApplicationFiled: January 2, 2025Publication date: April 24, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Sheng Lin, Chin-Hua Wang, Shu-Shen Yeh, Chien-Hung Chen, Po-Yao Lin, Shin-Puu Jeng
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Patent number: 12283075Abstract: Neural network based substitutional end-to-end (E2E) image compression (NIC) being performed by at least one processor and includes receiving an input image to an E2E NIC framework, determining a substitute image based on a training model of the E2E NIC framework, encoding the substitute image to generate a bitstream, mapping the substitute image to the bitstream to generate a compressed representation of the input image. Further, the input may be partitioned into blocks for which a substitute representation is determined for each block and each block is encoded instead of the entire substitute image.Type: GrantFiled: October 13, 2021Date of Patent: April 22, 2025Assignee: TENCENT AMERICA LLCInventors: Ding Ding, Wei Jiang, Sheng Lin, Wei Wang, Xiaozhong Xu, Shan Liu
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Patent number: 12280482Abstract: A driving device for a nail gun includes a striking unit and an air storage unit. The striking unit includes a striking cylinder connected to the nail gun and defining a cylinder chamber having an opening, and a piston disposed in and making an air-tight contact with the striking cylinder. The air storage unit includes an air storage cylinder including a protrusion that protrudes toward the opening and cooperating with the striking cylinder to define an air storage chamber that is in fluid communication with the cylinder chamber via the opening. When the piston moves in a pressure-generating direction, air in the air storage chamber is pressurized. The air storage unit further includes a lubricant disposed in the cylinder chamber and the air storage chamber, and flowing along the protrusion into the cylinder chamber to lubricate the piston.Type: GrantFiled: June 5, 2023Date of Patent: April 22, 2025Assignee: Basso Industry Corp.Inventors: An-Gi Liu, Chang-Sheng Lin, Fu-Ying Huang
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Patent number: 12277977Abstract: A memory device and method of making the same are disclosed. The memory device includes transistor devices located in both a memory region and a logic region of the device. Transistor devices in the memory region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, a second oxide layer over the first nitride layer, and a second nitride layer over the second oxide layer. Transistor devices in the logic region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, and a second nitride layer over the first nitride layer.Type: GrantFiled: May 13, 2024Date of Patent: April 15, 2025Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Chen-Ming Huang, Wen-Tuo Huang, Yu-Hsiang Yang, Yu-Ling Hsu, Wei-Lin Chang, Chia-Sheng Lin, ShihKuang Yang, Yu-Chun Chang, Hung-Ling Shih, Po-Wei Liu, Shih-Hsien Chen
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Patent number: 12272022Abstract: The quality of a frame sequence is enhanced by a booster engine collaborating with a first stage circuit. The first stage circuit adjusts the quality degradation of the frame sequence when a condition in constrained resources is detected. The quality degradation includes at least one of uneven resolution and uneven frame per second (FPS). The booster engine receives the frame sequence from the first stage circuit, and generates an enhanced frame sequence based on the frame sequence for transmission to a second stage circuit.Type: GrantFiled: August 24, 2022Date of Patent: April 8, 2025Assignee: MediaTek Inc.Inventors: Yao-Sheng Wang, Pei-Kuei Tsung, Chiung-Fu Chen, Wai Mun Wong, Chao-Min Chang, Yu-Sheng Lin, Chiani Lu, Chih-Cheng Chen
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Patent number: 12273110Abstract: Disclosed in the present invention are a low-temperature coefficient ring oscillator, a chip, and a communication terminal. The low-temperature coefficient ring oscillator comprises a temperature tracking compensation circuit, an inverter oscillation circuit, and a buffer shaping circuit. The temperature characteristics of the impedance of a PMOS tube and an NMOS tube in an inverter in the inverter oscillation circuit are tracked and compensated for by means of the impedance, along with temperature change, of a PMOS tube and a NMOS tube connected by a diode.Type: GrantFiled: May 16, 2023Date of Patent: April 8, 2025Assignee: SHANGHAI VANCHIP TECHNOLOGIES CO., LTD.Inventors: Chenyang Gao, Yongshou Wang, Sheng Lin
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Publication number: 20250107621Abstract: A lightweight table structure includes a frame having a quadrilateral shape, a top panel mounted on a top of the frame, a bottom panel mounted on a bottom of the frame, and a decorative laminate sheet mounted on the top panel by a laminating process. The frame has a hollow interior. The frame includes a front panel, a rear panel, a left panel, and a right panel which are combined together. The frame further includes multiple reinforcing ribs and multiple reinforcing plates mounted between the front panel, the rear panel, the left panel, and the right panel. The reinforcing ribs are spaced and arranged in parallel. The reinforcing plates are spaced and arranged in parallel.Type: ApplicationFiled: June 26, 2024Publication date: April 3, 2025Inventors: Sheng-Lin Chiu, Pao-I Yang, Lio Yen-Wei Chang
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Publication number: 20250112217Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first tier, a second tier, and a third tier. The first tier includes an interposer. The second tier is disposed on the first tier and includes a bottom die. The third tier is disposed on the second tier and includes a plurality of first dies and at least one second die. The at least one second die is disposed between the plurality of first dies. The plurality of first dies are electrically connected to the bottom die by a plurality of first connectors to form a signal path, the plurality of first dies are electrically connected to the interposer by a plurality of second connectors to form a power path, and the plurality of first connectors are closer to the at least one second die than the plurality of second connectors.Type: ApplicationFiled: December 13, 2024Publication date: April 3, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Yao Lin, Shu-Shen Yeh, Chin-Hua Wang, Yu-Sheng Lin, Shin-Puu Jeng
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Publication number: 20250103751Abstract: A computing circuit with a de-identified architecture, a data computing method, a data processing system, and a data de-identification method are provided. The computing circuit includes an arithmetic array and a de-identification circuit. The computing circuit may perform an accumulation operation on input data to generate accumulated data by the arithmetic array. The de-identification circuit has an analog offset error determined based on an analog physical unclonable function. The computing circuit may operate the accumulated data according to the analog offset error to generate de-identification data by the de-identification circuit. It can not only provide the analog offset error through the transistors in the de-identification circuit, but also be combined with obfuscated code settings to dynamically adjusting the degree of de-identification of data.Type: ApplicationFiled: September 26, 2024Publication date: March 27, 2025Applicant: Industrial Technology Research InstituteInventors: Bo-Cheng Chiou, Chih-Sheng Lin, Tuo-Hung Hou, Chih-Ming Lai, Yun-Ting Ho, Shan-Ming Chang
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Patent number: 12260511Abstract: Embodiments relate to a front-end scaler circuit configured to receive and process demosaiced image data in different modes depending on if the demosaiced image data was demosaiced from Bayer or Quad Bayer raw image data. The front-end scaler circuit shares memory with a demosaicing circuit, and is configured to perform different operations that use different amounts of the shared memory based on the original image format of the demosaiced image data being processed, to compensate for additional memory utilized by the demosaicing circuit when demosaicing certain types of image data. For example, when processing image data demosaiced from Quad Bayer image data, the front-end scaler circuit discards a portion of the chrominance component data for the received image data before performing chromatic suppression, compared to when processing image data demosaiced from Bayer image data.Type: GrantFiled: January 18, 2022Date of Patent: March 25, 2025Assignee: APPLE INC.Inventors: Sarvesh Swami, David R Pope, Sheng Lin
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Patent number: 12260321Abstract: A data feature augmentation system and method for a low-precision neural network are provided. The data feature augmentation system includes a first time difference unit. The first time difference unit includes a first sample-and-hold circuit and a subtractor. The first sample-and-hold circuit is used for receiving an input signal and obtaining a first signal according to the input signal. The first signal is related to a first leakage rate of the first sample-and-hold circuit and the first signal is the signal generated by delaying the input signal by one time unit. The subtractor is used for performing subtraction on the input signal and the first signal to obtain a time difference signal. The input signal and the time difference signal are inputted to the low-precision neural network.Type: GrantFiled: July 26, 2021Date of Patent: March 25, 2025Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Fu-Cheng Tsai, Yi-Ching Kuo, Chih-Sheng Lin, Shyh-Shyuan Sheu, Tay-Jyi Lin, Shih-Chieh Chang
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Publication number: 20250091633Abstract: A pressure sensing device, comprising: a frame work; a capacitive pressure sensor layer, surrounding the frame work; a capacitive touch sensor layer; and a flexible material layer, located between the pressure sensor layer and the touch sensor layer and surrounding the capacitive pressure sensor layer. The capacitive touch sensor layer is above the flexible material layer when the capacitive pressure sensor layer is below the flexible material layer. The capacitive touch sensor layer has a first driving electrode and a first sensing electrode. The capacitive pressure sensor layer has a second driving electrode and a second sensing electrode. A 3D gesture control system and a vehicle control system applying the pressure sensing device are also disclosed. Via the pressure sensing device, the 3D gesture control system and the vehicle control system can generate control commands according to a touch or a pressure provided by a user.Type: ApplicationFiled: December 6, 2024Publication date: March 20, 2025Applicant: PixArt Imaging Inc.Inventors: Chin-Hua Hu, Yu-Han Chen, Yu-Sheng Lin