Abstract: A hybrid permanent magnet motor rotor rotates around a central axis, and includes: a rotor core provided with a plurality of magnet installation slots; and a plurality of magnet parts embedded inside a plurality of magnet installation slots respectively, wherein the rotor is provided with a plurality of first magnetic pole parts and a plurality of second magnetic pole parts, the magnetic poles of the first magnetic pole part and the second magnetic pole part are arranged in opposite and alternately in the circumferential direction, and the magnetic placement of the first magnetic pole part is different from that of the second magnetic pole part, the amount of magnets used in the second magnetic pole part is greater than that used in the first magnetic pole part.

Abstract: A chuck vacuum line of a semiconductor processing tool includes a first portion that penetrates a sidewall of a main pumping line of the semiconductor processing tool. The chuck vacuum line includes a second portion that is substantially parallel to the sidewall of the main pumping line and to a direction of flow in the main pumping line. A size of the second portion increases between an inlet end of the second portion and an outlet end of the second portion along the direction of flow in the main pumping line.

Abstract: A leadframe including a chip supporting plate, a lead forming plate, and solder points is provided. A notch is formed on an edge of the chip supporting plate. The thickness of the lead forming plate is less than the thickness of the chip supporting plate. The lead forming plate has a main body, inner leads, and a connecting rod. The inner leads and the connecting rod are extended from an edge of the main body. The connecting rod has an end portion fitting the notch. The solder points are located at the boundary between the end portion and the notch for structurally connecting the connecting rod and the chip supporting plate.

Abstract: A leadframe including a chip supporting plate, a lead forming plate, and solder points is provided. A notch is formed on an edge of the chip supporting plate. The thickness of the lead forming plate is less than the thickness of the chip supporting plate. The lead forming plate has a main body, inner leads, and a connecting rod. The inner leads and the connecting rod are extended from an edge of the main body. The connecting rod has an end portion fitting the notch. The solder points are located at the boundary between the end portion and the notch for structurally connecting the connecting rod and the chip supporting plate.

Abstract: A semiconductor package mainly includes a semiconductor chip and a plurality of leads at the periphery of the semiconductor chip. Each of the leads has a first portion, a second portion and opposing upper and lower surfaces, wherein the second portion of the leads are bent upwards. The semiconductor package has a plurality of bonding wires with one ends connected to the bonding pads of the semiconductor chip and the other ends connected to the first portions of the leads. The semiconductor package is provided with a package body formed over the semiconductor chip and the leads, wherein each of the leads is substantially embedded in the package body with the lower surface thereof exposed from the package body. The present invention further provides a method for manufacturing the semiconductor package.

Abstract: A method for manufacturing a ball grid array package includes the steps of providing a substrate strip having a plurality of sub-substrate strips wherein each has an upper surface and a lower surface, disposing a plurality of chips on the upper surfaces of the sub-substrate strips, forming a plurality of encapsulation bodies for encapsulating the chips on the upper surfaces respectively, and forming a plurality of ribs between the encapsulation bodies.

Abstract: A ball grid array package includes a substrate, a chip, a plurality of pads, a solder mask, a plurality of partitioning walls, and a plurality of solder balls. The substrate has an upper surface and a lower surface opposite to the upper surface. The chip is disposed on the upper surface of the substrate. The pads are disposed on the lower surface of the substrate and electrically connected to the chip. The solder mask is disposed on the lower surface of the substrate. The partitioning walls are disposed on the solder mask and between the adjacent pads. The solder balls are respectively disposed on the pads.

Abstract: A semiconductor package mainly includes a semiconductor chip and a plurality of L-shaped leads arranged at the periphery of the semiconductor chip. Each of the L-shaped leads has an inner lead portion exposed out of the lower surface of the semiconductor package and an outer lead portion formed substantially parallel to and adjacent to one of the side surfaces of the semiconductor package. The semiconductor chip has a plurality of bonding pads electrically coupled to the inner lead portions of the L-shaped leads. The semiconductor package is provided with a package body formed over the semiconductor chip and the inner lead portions of the L-shaped leads.

Abstract: A semiconductor package with an encapsulated passive component mainly includes at least a substrate having a surface, a passive component and a molding compound. A plurality of SMD pads (Solder Mask Defined pads) and a solder mask are formed on the surface of the substrate. Each SMD pad has an exposed sidewall portion exposed out of the solder mask. A blocking bar is formed between the exposed sidewall portions of the SMD pads. There is at least a flowing channel formed between the blocking bar and the exposed sidewall portions. The passive component is mounted on the surface of the substrate and connected to the SMD pads, the flowing channel is located under the passive component. It is advantageous to fill the molding compound into the flowing channel.

Abstract: A semiconductor device is disclosed for preventing contamination on its bonding pads during mounting an electronic component, such as surface mount device (SMD). The semiconductor device includes a semiconductor substrate, a plurality of jointing material and at least an electronic component. A plurality of first bonding pads for wire-bonding and a plurality of second bonding pads for mounting the electronic component are formed on the active surface of the substrate. The substrate includes at least a dam is formed on the active surface to separate the first bonding pads from the second bonding pads. Preferably, the dam surrounds the second bonding pads. The jointing material is disposed on the second bonding pads for bonding the electronic component. Using the dam, there is no flux or tin-lead solder flowing onto the first bonding pads during reflowing the jointing material. In an embodiment, the electronic component can be mounted on the substrate in a wafer level.

Abstract: A substrate is provided for carrying at least a semiconductor device. The substrate mainly includes a carrier body, a plurality of contact pads, a solder mask and a plurality of dams of a mesh. The contact pads are disposed on a surface of the carrier body and each has a bonding surface exposed out of the solder mask for connecting with the external terminals of the semiconductor device. The dams are disposed above the surface of the carrier body. The dams protrude from and located between the bonding surfaces of the contact pads to prevent solder paste, flux or the external terminals of the semiconductor device from bridging.

Abstract: A semiconductor package includes a substrate, a chip, and at least one capacitor. The chip adheres to the substrate and has an active surface, a grounding area disposed on the active surface and at least one power pad mounted on the active surface. The capacitor is disposed on the grounding area of the chip and has a power end and a grounding end electrically connected to the grounding area. At least one bonding wire electrically connects the power end of the capacitor to the power pad.

Abstract: A circuitized substrate has contact pads for mounting a Surface Mount Device (SMD). First and second contact pads are located on a surface of the substrate corresponding to a first terminal and a second terminal of the SMD. The first and the second contact pads have a plurality of expanded portion or diminished portions to form bead receptacles at the facing corners thereof. When solder paste is reflowed to electrically connect the SMD, solder beads formed from the solder paste can be fixed on the bead receptacles. Therefore, there is no free solder bead on the substrate causing short circuit for semiconductor packages.

Abstract: A substrate with reinforced contact pad structure includes a metal wiring layer and a solder mask formed over its surface. The metal wiring layer includes at least a NSMD (Non-Solder Mask Defined) type contact pad, a trace and an extension. The extension connects the contact pad and the trace, and has an upper surface which is covered by the solder mask so as to enhance the connecting strength between the trace and the contact pad and to improve the position stability of the NSMD type contact pad on the substrate. In an embodiment, the contact pad is circular for bonding a bump or a solder ball. The first extension is fan-shaped. The extension also has a sidewall exposed out of the solder mask.

Abstract: A semiconductor package with an encapsulated passive component mainly includes at least a substrate having a surface, a passive component and a molding compound. A plurality of SMD pads (Solder Mask Defined pads) and a solder mask are formed on the surface of the substrate. Each SMD pad has an exposed sidewall portion exposed out of the solder mask. A blocking bar is formed between the exposed sidewall portions of the SMD pads. There is at least a flowing channel formed between the blocking bar and the exposed sidewall portions. The passive component is mounted on the surface of the substrate and connected to the SMD pads, the flowing channel is located under the passive component. It is advantageous to fill the molding compound into the flowing channel.

Abstract: A method for manufacturing a ball grid array package includes the steps of providing a substrate strip having a plurality of sub-substrate strips wherein each has an upper surface and a lower surface, disposing a plurality of chips on the upper surfaces of the sub-substrate strips, forming a plurality of encapsulation bodies for encapsulating the chips on the upper surfaces respectively, and forming a plurality of ribs between the encapsulation bodies.

Abstract: A semiconductor package mainly includes a semiconductor chip and a plurality of leads at the periphery of the semiconductor chip. Each of the leads has a first portion, a second portion and opposing upper and lower surfaces, wherein the second portion of the leads are bent upwards. The semiconductor package has a plurality of bonding wires with one ends connected to the bonding pads of the semiconductor chip and the other ends connected to the first portions of the leads. The semiconductor package is provided with a package body formed over the semiconductor chip and the leads, wherein each of the leads is substantially embedded in the package body with the lower surface thereof exposed from the package body. The present invention further provides a method for manufacturing the semiconductor package.

Abstract: Disclosed is a substrate for use in forming an electronic package. The substrate includes a dielectric layer having first and second patterned metal films which have different area, first and second contact pads and first and second conductive traces formed thereon. The first and second contact pads are adapted for connecting to a surface-mountable device. Each of the contact pads has an area smaller than the area of the patterned metal film. The first contact pad is separated from the first patterned metal film by a first predetermined distance and the second contact pad is separated from the second patterned metal film by a second predetermined distance. The first contact pad is connected to the first patterned metal film by the first conductive trace, and the second contact pad is connected to the second patterned metal film by the second conductive trace.

Abstract: A ball grid array (BGA) package includes an electronic component mounted on its bottom. Formed on the lower surface of the substrate are the electronic component, a plurality of standoffs and a plurality of solder balls. The standoffs, such as metal balls, are adjacent to the electronic component within the solder balls. The standoffs have a melting point higher than that of the solder balls and offer a uniform standoff height larger than the thickness of the electronic component to control the package collapse to protect the electronic component from contacting a PCB during reflowing process.

Abstract: A circuitized substrate has contact pads for mounting a Surface Mount Device (SMD). First and second contact pads are located on a surface of the substrate corresponding to a first terminal and a second terminal of the SMD. The first and the second contact pads have a plurality of expanded portion or diminished portions to form bead receptacles at the facing corners thereof. When solder paste is reflowed to electrically connect the SMD, solder beads formed from the solder paste can be fixed on the bead receptacles. Therefore, there is no free solder bead on the substrate causing short circuit for semiconductor packages.