Abstract: A substrate is provided for carrying at least a semiconductor device. The substrate mainly includes a carrier body, a plurality of contact pads, a solder mask and a plurality of dams of a mesh. The contact pads are disposed on a surface of the carrier body and each has a bonding surface exposed out of the solder mask for connecting with the external terminals of the semiconductor device. The dams are disposed above the surface of the carrier body. The dams protrude from and located between the bonding surfaces of the contact pads to prevent solder paste, flux or the external terminals of the semiconductor device from bridging.

Abstract: A semiconductor device is disclosed for preventing contamination on its bonding pads during mounting an electronic component, such as surface mount device (SMD). The semiconductor device includes a semiconductor substrate, a plurality of jointing material and at least an electronic component. A plurality of first bonding pads for wire-bonding and a plurality of second bonding pads for mounting the electronic component are formed on the active surface of the substrate. The substrate includes at least a dam is formed on the active surface to separate the first bonding pads from the second bonding pads. Preferably, the dam surrounds the second bonding pads. The jointing material is disposed on the second bonding pads for bonding the electronic component. Using the dam, there is no flux or tin-lead solder flowing onto the first bonding pads during reflowing the jointing material. In an embodiment, the electronic component can be mounted on the substrate in a wafer level.

Abstract: A substrate with reinforced contact pad structure includes a metal wiring layer and a solder mask formed over its surface. The metal wiring layer includes at least a NSMD (Non-Solder Mask Defined) type contact pad, a trace and an extension. The extension connects the contact pad and the trace, and has an upper surface which is covered by the solder mask so as to enhance the connecting strength between the trace and the contact pad and to improve the position stability of the NSMD type contact pad on the substrate. In an embodiment, the contact pad is circular for bonding a bump or a solder ball. The first extension is fan-shaped. The extension also has a sidewall exposed out of the solder mask.

Abstract: A semiconductor device mainly comprises a chip disposed on the upper surface of a substrate. The upper surface of the substrate is provided with a ground ring, a power ring, and a plurality of conductive traces arranged at the periphery of the ground ring and the power ring. The semiconductor device comprises at least a surface-mountable device connected across the ground ring and the power ring. The semiconductor device of the present invention is characterized by having at least a bonding wire formed across the surface-mountable device. The bonding wire is connected between one of the bonding pads of the chip and the power ring wherein at least one downward depression is formed in a lengthen portion at a top of the bonding wire.

Abstract: A substrate board structure having a core layer, a metallic layer and a connecting metallic layer. The core layer has a first surface and a second surface. The metallic layer includes a contact pad and a circuit line. The contact pad and the circuit line are separately lain on the first surface of the core layer. The connecting metallic layer is formed on the second surface of the core layer. The connecting metallic layer is electrically connected to both the contact pad and the circuit line.

Abstract: A method of assembling a passive component over the active surface of a die is provided. The method shortens the signal transmission path between the die and the passive component so that electrical performance of the die after packaging is improved. In addition, the transmission path and the number of contacts on the substrate for connecting the die and the passive component are reduced. With a reduction in transmission path, size of the substrate can be reduced. Furthermore, a plurality of passive components may be assembled onto the dies of a wafer in a single operation so that there is no need to assemble individual passive component over each packaging substrate.

Abstract: In a leadframe packaging structure, a leadframe includes a plurality of first leads, a plurality of second leads, and a die pad. The first leads define a chip-bonding region in which is arranged the die pad. The second leads extend and terminate into a plurality of contact pads in the chip-bonding region. An adhesive tape further is bonded on bottom surfaces of the contact pads. A chip is bonded on the die pad. At least a passive device is mounted between and electrically connects the contact pads. A plurality of bonding wires respectively connect the chip, the passive device, and the first and second leads. An encapsulant material encapsulates the chip, the passive device, and the bonding wires.

Abstract: A semiconductor device mainly comprises a chip disposed on the upper surface of a substrate. The upper surface of the substrate is provided with a ground ring, a power ring, and a plurality of conductive traces arranged at the periphery of the ground ring and the power ring. The semiconductor device comprises at least a surface-mountable device connected across the ground ring and the power ring. The semiconductor device of the present invention is characterized by having at least a bonding wire formed across the surface-mountable device. The bonding wire is connected between one of the bonding pads of the chip and the power ring wherein at least one downward depression is formed in a lengthen portion at a top of the bonding wire.

Abstract: A substrate board structure having a core layer, a metallic layer and a connecting metallic layer. The core layer has a first surface and a second surface. The metallic layer includes a contact pad and a circuit line. The contact pad and the circuit line are separately lain on the first surface of the core layer. The connecting metallic layer is formed on the second surface of the core layer. The connecting metallic layer is electrically connected to both the contact pad and the circuit line.

Abstract: A soldering method for attaching a chip and electronic devices to a chip carrier has a lengthening reflowing time when attaching the electronic devices. Because the pins of the electronic device connect to the chip carrier by solder, the solder between the electronic device and the chip carrier are oxidized, which forms a high melting point oxide layer on a surface of the solder. Therefore the solder connecting the electronic device with the chip carrier ensures that the electronic devices do not move on the chip carrier in the follow-up high temperature processes.

Abstract: In a leadframe packaging structure, a leadframe includes a plurality of first leads, a plurality of second leads, and a die pad. The first leads define a chip-bonding region in which is arranged the die pad. The second leads extend and terminate into a plurality of contact pads in the chip-bonding region. An adhesive tape further is bonded on bottom surfaces of the contact pads. A chip is bonded on the die pad. At least a passive device is mounted between and electrically connects the contact pads. A plurality of bonding wires respectively connect the chip, the passive device, and the first and second leads. An encapsulant material encapsulates the chip, the passive device, and the bonding wires.

Abstract: An electronic package comprises a lead frame having a die pad for supporting a semiconductor chip. The electronic package is characterized by directly mounting at least a surface-mountable device on the lead frame thereby increasing the electric performance of the electronic package. According to an electronic package of the present invention, at least two leads of the lead frame have portions joined together to form a first pad and the die pad has a protruding portion to form a second pad thereby allowing the surface-mountable device to be connected across the first pad and the second pad. The present invention further provides another electronic package comprising a tape attached across the leads of the lead frame for supporting the surface-mountable device.

Abstract: An electronic package comprises a lead frame having a die pad for supporting a semiconductor chip. The electronic package is characterized by directly mounting at least a surface-mountable device on the lead frame thereby increasing the electric performance of the electronic package. According to an electronic package of the present invention, at least two leads of the lead frame have portions joined together to form a first pad and the die pad has a protruding portion to form a second pad thereby allowing the surface-mountable device to be connected across the first pad and the second pad. The present invention further provides another electronic package comprising a tape attached across the leads of the lead frame for supporting the surface-mountable device.

Abstract: A semiconductor device mainly comprises a chip disposed on the upper surface of a substrate. The upper surface of the substrate is provided with a ground ring, a power ring, and a plurality of conductive traces arranged at the periphery of the ground ring and the power ring. The semiconductor device comprises at least a surface-mountable device connected across the ground ring and the power ring. The semiconductor device of the present invention is characterized by having at least a bonding wire formed across the surface-mountable device. The bonding wire is connected between one of the bonding pads of the chip and the power ring wherein at least one downward depression is formed in a lengthen portion at a top of the bonding wire.

Abstract: A semiconductor device mainly comprises a chip disposed on the upper surface of a substrate. The upper surface of the substrate is provided with a ground ring, a power ring, and a plurality of conductive traces arranged at the periphery of the ground ring and the power ring. The semiconductor device comprises at least a surface-mountable device connected across the ground ring and the power ring. The semiconductor device of the present invention is characterized by having at least a bonding wire formed across the surface-mountable device. The bonding wire is connected between one of the bonding pads of the chip and the power ring wherein at least one downward depression is formed in a lengthen portion at a top of the bonding wire.

Abstract: A substrate for use in forming an electronic package. The substrate is characterized by having adapted mark directly formed within bonding pads or a metal paddle. The bonding pads are adapted for receiving a surface-mountable device. The metal paddle is adapted for receiving a semiconductor chip. The “mark” may be a text mark or a graphical mark. The mark is directly formed within the bonding pads or the metal paddle, thereby creating substantially no reliability problems.

Abstract: An electronic package comprises a chip disposed on the upper surface of a substrate. The upper surface of the substrate is provided with a ground ring, a power ring, and a plurality of conductive traces arranged at the periphery of the ground ring and the power ring. The electronic package comprises at least a surface-mountable device connected across the ground ring and the power ring. The present invention is characterized in that the surface-mountable device has at least a bonding region formed on one end contact thereof for bonding to a bonding wire thereby allowing the chip to be electrically connected to the ground ring or power ring directly through the end contact of the surface-mountable device.