Patents by Inventor Sheng-yuan Huang

Sheng-yuan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250105056
    Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.
    Type: Application
    Filed: December 9, 2024
    Publication date: March 27, 2025
    Inventors: Chih-Hui Huang, Cheng-Hsien Chou, Cheng-Yuan Tsai, Kuo-Ming Wu, Sheng-Chan Li
  • Patent number: 12262642
    Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.
    Type: Grant
    Filed: November 17, 2023
    Date of Patent: March 25, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chang-Lin Yang, Chung-Te Lin, Sheng-Yuan Chang, Han-Ting Lin, Chien-Hua Huang
  • Patent number: 12249796
    Abstract: An electrical connector includes an insulating body, a plurality of conductive terminals, a plurality of grounding terminals and two shielding elements. The plurality of the conductive terminals are mounted in the insulating body. The plurality of the grounding terminals are mounted in the insulating body. The plurality of the grounding terminals are located adjacent to two outer sides of the plurality of the conductive terminals. The two shielding elements are disposed at a front end of an upper surface and a front end of a lower surface of the insulating body. Each shielding element has a base frame. Two sides of a rear edge of the base frame are connected with two contact portions. The contact portions of the two shielding elements contact with the plurality of the grounding terminals.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: March 11, 2025
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Pei-Yi Lin, Chuan-Hung Lin, Sheng-Nan Yu, Sheng-Yuan Huang, Chun-Fu Lin
  • Publication number: 20250048781
    Abstract: A modulator heater structure may include a plurality of regions having different thicknesses. For example, a heater ring of the modulator heater structure may have a first thickness. A heater pad of the modulator heater structure, that is configured to provide an electrical current to the heater ring, may have a second thickness that is greater than the first thickness. The lesser thickness of the heater ring of the modulator heater structure provides high electrical resistance in the heater ring, which enables the heater ring to quickly and efficiently generate heat. The greater thickness of the heater pad provides low electrical resistance in the second region, which enables the electrical current to be efficiently provided through the heater pad to the heater ring with reduced heat dissipation in the hear pad due to the lower electrical current dissipation in the heater pad.
    Type: Application
    Filed: August 4, 2023
    Publication date: February 6, 2025
    Inventors: Wen-Shun LO, Sheng Kai YEH, Jing-Hwang YANG, Chi-Yuan SHIH, Shih-Fen HUANG, YingKit Felix TSUI
  • Patent number: 12211741
    Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.
    Type: Grant
    Filed: November 10, 2023
    Date of Patent: January 28, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hui Huang, Cheng-Hsien Chou, Cheng-Yuan Tsai, Kuo-Ming Wu, Sheng-Chan Li
  • Patent number: 11907047
    Abstract: A data storage device, and an error tolerance selecting method thereof which includes: writing data to data blocks of the data storage device; reading written data of the data blocks as read data; comparing the read data and the written data of each data column in the data blocks, and calculating a number of error bits in each chunk including a plurality of data columns accordingly; calculating a difference value between the number of error bits in the chunk and a first threshold value to store the difference value in an error tolerance list; and selecting a largest difference value in the error tolerance list as an error tolerance.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: February 20, 2024
    Assignee: Silicon Motion, Inc.
    Inventor: Sheng-Yuan Huang
  • Patent number: 11894632
    Abstract: A high-speed connector includes an insulating housing, and a first terminal assembly mounted in the insulating housing. The first terminal assembly includes a plurality of first terminals, a first base body and a first conductive film. The plurality of the first terminals include at least two first grounding terminals and at least two first signal terminals. At least one portion of a bottom of the first base body extends downward to form at least one first protruding portion. The at least two first signal terminals penetrate through the at least one first protruding portion. The first conductive film is covered to the at least one first protruding portion. The first conductive film has a first metal layer. The first metal layer is electrically connected with the at least two first grounding terminals to form a grounding structure.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: February 6, 2024
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Sheng-Yuan Huang, Chun-Fu Lin, Yun-Chien Lee, Pei-Yi Lin, Yi-Ching Hsu
  • Patent number: 11874737
    Abstract: A selecting bad data column method suitable for a data storage device is provided. The data storage device includes a control unit and a data storage medium. The selecting method performed by the control unit includes: reading written data of each data column as read data; comparing the read data and the written data of each data column to calculate an average number of error bits of each data column; determining whether the average number of error bits of each data column is greater than or equal to a predetermined value; and recording a data column as a bad data column when the average number of error bits of the data column is greater than or equal to the predetermined value. In this way, in order to avoid the problems that the error correction code can't be corrected or the correction capability is excessively consumed.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: January 16, 2024
    Assignee: Silicon Motion, Inc.
    Inventor: Sheng-Yuan Huang
  • Publication number: 20230402801
    Abstract: An electrical connector includes an insulating housing, an upper terminal assembly fastened in the insulating housing, a center grounding plate fastened in the insulating housing, and an outer shell disposed to a top surface of the insulating housing. A rear end of the insulating housing has two first penetrating grooves. The upper terminal assembly includes an upper base portion. A rear end of the upper base portion defines two second penetrating grooves. The two second penetrating grooves are aligned with the two first penetrating grooves. Two opposite sides of a rear end of a top surface of the outer shell extend towards the insulating housing to form two elastic arms, respectively. The two elastic arms pass through the two first penetrating grooves and the two second penetrating grooves, and then the two elastic arms contact with two outermost upper grounding terminals of the upper terminal assembly.
    Type: Application
    Filed: April 4, 2023
    Publication date: December 14, 2023
    Inventors: PEI-YI LIN, YU-HUNG SU, SHENG-YUAN HUANG
  • Patent number: 11803312
    Abstract: A data storage device and a selecting bad data block method thereof which includes: writing data to a sample block; reading written data of the sample block as read data; comparing the read data and the written data of each data column in sample block, and calculating a number of error bits in each chunk accordingly; selecting a column with the largest number of error bits in a chunk with the largest number of error bits as a bad data column; and recording the sample block as a bad data block when determining that the number of error bits in the chunk is greater than or equal to the first threshold value and the number of bad columns in the chunk is greater than or equal to the second threshold value.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: October 31, 2023
    Assignee: Silicon Motion, Inc.
    Inventor: Sheng-Yuan Huang
  • Publication number: 20230283025
    Abstract: An electrical connector includes an insulating body, a plurality of conductive terminals, a plurality of grounding terminals and two shielding elements. The plurality of the conductive terminals are mounted in the insulating body. The plurality of the grounding terminals are mounted in the insulating body. The plurality of the grounding terminals are located adjacent to two outer sides of the plurality of the conductive terminals. The two shielding elements are disposed at a front end of an upper surface and a front end of a lower surface of the insulating body. Each shielding element has a base frame. Two sides of a rear edge of the base frame are connected with two contact portions. The contact portions of the two shielding elements contact with the plurality of the grounding terminals.
    Type: Application
    Filed: October 20, 2022
    Publication date: September 7, 2023
    Inventors: PEI-YI LIN, CHUAN-HUNG LIN, SHENG-NAN YU, SHENG-YUAN HUANG, CHUN-FU LIN
  • Publication number: 20230144251
    Abstract: A high-speed connector includes an insulating housing, a first terminal assembly received in the insulating housing, a second terminal assembly received in the insulating housing, a third terminal assembly received in the insulating housing, and a fourth terminal assembly received in the insulating housing. The second terminal assembly is opposite to the first terminal assembly along an up-down direction. The third terminal assembly is disposed between the first terminal assembly and the second terminal assembly. The fourth terminal assembly is corresponding to the third terminal assembly. The fourth terminal assembly is disposed between the second terminal assembly and the third terminal assembly.
    Type: Application
    Filed: August 24, 2022
    Publication date: May 11, 2023
    Inventors: YUN-CHIEN LEE, YI-CHING HSU, PEI-YI LIN, YU-HUNG SU, SHENG-YUAN HUANG, CHUN-FU LIN
  • Publication number: 20230137485
    Abstract: A selecting bad data column method suitable for a data storage device is provided. The data storage device includes a control unit and a data storage medium. The selecting method performed by the control unit includes: reading written data of each data column as read data; comparing the read data and the written data of each data column to calculate an average number of error bits of each data column; determining whether the average number of error bits of each data column is greater than or equal to a predetermined value; and recording a data column as a bad data column when the average number of error bits of the data column is greater than or equal to the predetermined value. In this way, in order to avoid the problems that the error correction code can't be corrected or the correction capability is excessively consumed.
    Type: Application
    Filed: April 7, 2022
    Publication date: May 4, 2023
    Inventor: SHENG-YUAN HUANG
  • Publication number: 20230139703
    Abstract: A data storage device and a selecting bad data block method thereof which includes: writing data to a sample block; reading written data of the sample block as read data; comparing the read data and the written data of each data column in sample block, and calculating a number of error bits in each chunk accordingly; selecting a column with the largest number of error bits in a chunk with the largest number of error bits as a bad data column; and recording the sample block as a bad data block when determining that the number of error bits in the chunk is greater than or equal to the first threshold value and the number of bad columns in the chunk is greater than or equal to the second threshold value.
    Type: Application
    Filed: April 6, 2022
    Publication date: May 4, 2023
    Inventor: SHENG-YUAN HUANG
  • Publication number: 20230137772
    Abstract: A data storage device, and an error tolerance selecting method thereof which includes: writing data to data blocks of the data storage device; reading written data of the data blocks as read data; comparing the read data and the written data of each data column in the data blocks, and calculating a number of error bits in each chunk including a plurality of data columns accordingly; calculating a difference value between the number of error bits in the chunk and a first threshold value to store the difference value in an error tolerance list; and selecting a largest difference value in the error tolerance list as an error tolerance.
    Type: Application
    Filed: April 8, 2022
    Publication date: May 4, 2023
    Inventor: SHENG-YUAN HUANG
  • Patent number: 11581688
    Abstract: A high-speed connector includes an insulating housing, and a first terminal assembly mounted in the insulating housing. The first terminal assembly includes a plurality of first terminals including a plurality of first grounding terminals, a first base body, and a first shielding plate disposed under the first base body. The plurality of the first terminals are fastened to the first base body. The first shielding plate has a first base plate, a first metal layer and a plurality of first ribs. Several portions of a top surface of the first base plate extend upward to form the plurality of the first ribs. The first metal layer is a pattern with a plurality of pores. Several of the first grounding terminals contact with the first metal layer which is attached to top surfaces of the plurality of the first ribs to form a grounding structure.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: February 14, 2023
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Pei-Yi Lin, Yi-Ching Hsu, Sheng-Yuan Huang, Chun-Fu Lin
  • Patent number: 11546997
    Abstract: A twistable electronic device module including a twistable substrate, an electrode pattern layer, an insulating layer, a circuit layer, a plurality of circuit boards and a plurality of electronic devices is provided. The electrode pattern layer is disposed on the twistable substrate. The insulating layer is disposed on the electrode pattern layer. The edge of the insulating layer has an opening located at the edge of the twistable substrate and exposing a part of the electrode pattern layer. The circuit layer is disposed on the insulating layer and on the sidewall of the opening, and is connected with the electrode pattern layer. The plurality of circuit boards are disposed on the circuit layer, and each is electrically connected to the circuit layer. The plurality of electronic devices are disposed on the plurality of circuit boards, and each is electrically connected to a corresponding one of the plurality of circuit boards.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: January 3, 2023
    Assignee: National Taipei University of Technology
    Inventors: Syang-Peng Rwei, Tzu-Wei Chou, Sheng-Yuan Huang
  • Patent number: 11543982
    Abstract: A flash memory initialization method executed by a flash memory initialization device to initialize a flash memory device having a flash memory and a flash memory controller includes: determining an acceptable maximum number N of candidate addresses; determining a number M of different capacity sizes; classifying the candidate addresses into M portions; determining a difference value between two address values of any two adjacent addresses among the m-th portion of candidate addresses; determining multiple address values of the m-th portion of candidate addresses according to the difference value; and determining actual addresses of the m-th portion of candidate addresses according to the multiple address values; and controlling the flash memory controller to write the boot up information into at least one storage location corresponding to at least one of the m-th portion of candidate addresses according to the actual addresses.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: January 3, 2023
    Assignee: Silicon Motion, Inc.
    Inventor: Sheng-Yuan Huang
  • Publication number: 20220386469
    Abstract: A twistable electronic device module including a twistable substrate, an electrode pattern layer, an insulating layer, a circuit layer, a plurality of circuit boards and a plurality of electronic devices is provided. The electrode pattern layer is disposed on the twistable substrate. The insulating layer is disposed on the electrode pattern layer. The edge of the insulating layer has an opening located at the edge of the twistable substrate and exposing a part of the electrode pattern layer. The circuit layer is disposed on the insulating layer and on the sidewall of the opening, and is connected with the electrode pattern layer. The plurality of circuit boards are disposed on the circuit layer, and each is electrically connected to the circuit layer.
    Type: Application
    Filed: July 16, 2021
    Publication date: December 1, 2022
    Applicant: National Taipei University of Technology
    Inventors: Syang-Peng Rwei, Tzu-Wei Chou, Sheng-Yuan Huang
  • Patent number: D1018907
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: March 19, 2024
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Yun-Chien Lee, Yi-Ching Hsu, Pei-Yi Lin, Yu-Hung Su, Sheng-Yuan Huang, Chun-Fu Lin