Abstract: In certain aspects, a delay circuit includes a multiplexer, a first delay path coupled between an input of the delay circuit and a first input of the multiplexer, and a second delay path coupled between the input of the delay circuit and a second input of the multiplexer. The first delay path includes a first delay device, and the second delay path includes a first inverter, a second delay device, and a second inverter. In other aspects, a delay circuit includes a latch including a first input, a second input, and an output. The first input of the latch is coupled to an input of the delay circuit. The delay circuit also includes a delay path coupled between the input of the delay circuit and the second input of the latch, wherein the delay path includes a pulse generator and a delay device.

Abstract: An amplifier circuit includes an amplifier and a voltage boost circuit configured to provide a variable supply voltage to the amplifier, the variable supply voltage continuously proportional to an audio input signal, the variable supply voltage configured to follow an output of the amplifier.

Abstract: An amplifier circuit includes an amplifier and a voltage boost circuit configured to provide a variable supply voltage to the amplifier, the variable supply voltage continuously proportional to an audio input signal, the variable supply voltage configured to follow an output of the amplifier.

Abstract: Various aspects of this disclosure describe reducing distortion of a power amplifier by coupling a common mode signal, such as determined from a voltage supply signal of the power amplifier or output of the power amplifier, to an input of the power amplifier. A resistive digital-to-analog converter (DAC) can be coupled to the power amplifier, and a common mode signal is modulated onto differential reference voltages of the DAC, causing the common mode signal to exist at both the input and output of the power amplifier at approximately the same time. Consequently, current flowing at differential inputs of the power amplifier due to the common mode component drops to zero, causing distortions due to common mode to differential mode conversion to be reduced.

Abstract: A fully differential class-D amplifier having a controlled common-mode output voltage is disclosed. The differential class-D amplifier may include a correction circuit to determine the common-mode output voltage associated with differential pulse width modulated output signals and to generate differential correction signals to control the common-mode output voltage. In some exemplary embodiments, the differential class-D amplifier may include a plurality of gain stages to generate the differential PWM output signals. The differential correction signals may be provided to at least one stage of the differential class-D amplifier.

Abstract: A fully differential class-D amplifier having a controlled common-mode output voltage is disclosed. The differential class-D amplifier may include a correction circuit to determine the common-mode output voltage associated with differential pulse width modulated output signals and to generate differential correction signals to control the common-mode output voltage. In some exemplary embodiments, the differential class-D amplifier may include a plurality of gain stages to generate the differential PWM output signals. The differential correction signals may be provided to at least one stage of the differential class-D amplifier.

Abstract: In one embodiment, a method for speaker operation comprises sensing an input common mode signal of a driver, wherein the driver drives a speaker, and adjusting the input common mode signal of the driver based on a difference between the sensed input common mode signal and a reference signal. The method also comprises sensing a current of a coil of the speaker, and control an output volume of the speaker based at least in part on the sensed current.

Abstract: In one embodiment, a method for speaker operation comprises sensing an input common mode signal of a driver, wherein the driver drives a speaker, and adjusting the input common mode signal of the driver based on a difference between the sensed input common mode signal and a reference signal. The method also comprises sensing a current of a coil of the speaker, and control an output volume of the speaker based at least in part on the sensed current.

Abstract: Disclosed is a power-efficient multi-mode charge pump. The charge pump comprises a first pumping circuit that provides at least one output voltage produced by a discharge sequence of a shared flyback capacitor. The charge pump also comprises a second pumping circuit that provides a plurality of output voltages produced by a corresponding plurality of discharge sequences of the shared flyback capacitor. The charge pump may include a transition circuit to selectably enable the first pumping circuit or the second pumping circuit. In one embodiment, the first pumping circuit may employ a two-phase discharge sequence. In another embodiment, the second pumping circuit may employ a three-phase plurality of discharge sequences. A related method is also disclosed.

Abstract: Disclosed is a Class-AB/B amplifier comprising a first output stage including a first plurality of amplification devices and a second output stage including a second plurality of amplification devices. According to one embodiment, the first output stage operates when the Class-AB/B amplifier is in a quiescent state and the second output stage operates when the Class-AB/B amplifier is in an active state. The Class-AB/B amplifier also comprises a level shifting circuit that adjusts a control voltage of the second output stage, where the level shifting circuit is adapted to activate the second output stage when the Class-AB/B amplifier enters the active state. Embodiments of the Class-AB/B amplifier may include a level shifting circuit that implements either a fixed or signal-dependent level shift, and a quiescent control circuit that substantially eliminates any systematic offset arising from the active feedback circuit inside the replica bias circuit.

Abstract: Disclosed is a Class-AB/B amplifier comprising a first output stage including a first plurality of amplification devices and a second output stage including a second plurality of amplification devices. According to one embodiment, the first output stage operates when the Class-AB/B amplifier is in a quiescent state and the second output stage operates when the Class-AB/B amplifier is in an active state. The Class-AB/B amplifier also comprises a level shifting circuit that adjusts a control voltage of the second output stage, where the level shifting circuit is adapted to activate the second output stage when the Class-AB/B amplifier enters the active state. Embodiments of the Class-AB/B amplifier may include a level shifting circuit that implements either a fixed or signal-dependent level shift, and a quiescent control circuit that substantially eliminates any systematic offset arising from the active feedback circuit inside the replica bias circuit.

Abstract: Disclosed is an amplifier designed to substantially reduce an ON/OFF transient. The amplifier comprises a drive block that includes a pre-driver and an output stage. The amplifier also comprises a bypass circuit that is coupled to an output of the pre-driver. The bypass circuit of the amplifier is selectively activated to reduce the ON/OFF transient. The bypass circuit may comprise an auxiliary output stage that can be coupled to provide selective activation. The amplifier may also be configured to provide multi-point offset compensation. Also disclosed is a related method. The amplifier and the related method may be incorporated into an audio amplifier used in a cellular telephone or other mobile audio device.

Abstract: Disclosed is a Class-AB/B amplifier comprising a first output stage including a first plurality of amplification devices and a second output stage including a second plurality of amplification devices. According to one embodiment, the first output stage operates when the Class-AB/B amplifier is in a quiescent state and the second output stage operates when the Class-AB/B amplifier is in an active state. The Class-AB/B amplifier also comprises a level shifting circuit that adjusts a control voltage of the second output stage, where the level shifting circuit is adapted to activate the second output stage when the Class-AB/B amplifier enters the active state. Embodiments of the Class-AB/B amplifier may include a level shifting circuit that implements either a fixed or signal-dependent level shift, and a quiescent control circuit that substantially eliminates any systematic offset arising from the active feedback circuit inside the replica bias circuit.

Abstract: Disclosed is an amplifier designed to substantially reduce an ON/OFF transient. The amplifier comprises a drive block that includes a pre-driver and an output stage. The amplifier also comprises a bypass circuit that is coupled to an output of the pre-driver. The bypass circuit of the amplifier is selectively activated to reduce the ON/OFF transient. The bypass circuit may comprise an auxiliary output stage that can be coupled to provide selective activation. The amplifier may also be configured to provide multi-point offset compensation. Also disclosed is a related method. The amplifier and the related method may be incorporated into an audio amplifier used in a cellular telephone or other mobile audio device.

Abstract: Disclosed is a Class-AB/B amplifier comprising a first output stage including a first plurality of amplification devices and a second output stage including a second plurality of amplification devices. According to one embodiment, the first output stage operates when the Class-AB/B amplifier is in a quiescent state and the second output stage operates when the Class-AB/B amplifier is in an active state. The Class-AB/B amplifier also comprises a level shifting circuit that adjusts a control voltage of the second output stage, where the level shifting circuit is adapted to activate the second output stage when the Class-AB/B amplifier enters the active state. Embodiments of the Class-AB/B amplifier may include a level shifting circuit that implements either a fixed or signal-dependent level shift, and a quiescent control circuit that substantially eliminates any systematic offset arising from the active feedback circuit inside the replica bias circuit.

Abstract: Disclosed is a power-efficient multi-mode charge pump. The charge pump comprises a first pumping circuit that provides at least one output voltage produced by a discharge sequence of a shared flyback capacitor. The charge pump also comprises a second pumping circuit that provides a plurality of output voltages produced by a corresponding plurality of discharge sequences of the shared flyback capacitor. The charge pump may include a transition circuit to selectably enable the first pumping circuit or the second pumping circuit. In one embodiment, the first pumping circuit may employ a two-phase discharge sequence. In another embodiment, the second pumping circuit may employ a three-phase plurality of discharge sequences. A related method is also disclosed.

Abstract: According to one exemplary embodiment, a power supply rejection bias circuit includes a first amplifier coupled to a second amplifier, where the first amplifier receives a reference voltage, and a feedback voltage of the bias circuit. The bias circuit further includes an output transistor driven by the output of the second amplifier, where the output transistor provides the output of the bias circuit and the feedback voltage. The bias circuit further includes a feedback resistor coupled between an input and an output of the second amplifier. According to this embodiment, the output of the second amplifier forms a non-dominant pole of the bias circuit and the output of the bias circuit forms a dominant pole of the bias circuit, thereby increasing power supply rejection of the bias circuit.

Abstract: According to one exemplary embodiment, a power supply rejection bias circuit includes a first amplifier coupled to a second amplifier, where the first amplifier receives a reference voltage, and a feedback voltage of the bias circuit. The bias circuit further includes an output transistor driven by the output of the second amplifier, where the output transistor provides the output of the bias circuit and the feedback voltage. The bias circuit further includes a feedback resistor coupled between an input and an output of the second amplifier. According to this embodiment, the output of the second amplifier forms a non-dominant pole of the bias circuit and the output of the bias circuit forms a dominant pole of the bias circuit, thereby increasing power supply rejection of the bias circuit.

Abstract: A differential preamplifier includes an active load with adjustable common-mode output level. The active load includes a transistor pair, a resistor pair, and a current source. The transistor load is employed to provide high gain, low offset, and a large bandwidth for the differential preamplifier. The resistor pair and current source are used to increase the common-mode output level of the differential preamplifier and to bias the transistor load. The current source can be varied to provide an adjustable common-mode output level suitable for driving next stage devices. The active load design allows the differential preamplifier to operate using only low power voltage supplies and with small-sized transistors.

Abstract: A low voltage regulated current source includes a feedback amplifier that forces a node voltage in both branches of the current mirror to equal to each other, by adjusting voltages in two branches of the current mirror to be equal to each other. The low voltage current mirror also has a higher output impedance compared to other current mirrors.