Patents by Inventor Shi-Yong Yi
Shi-Yong Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8349200Abstract: For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.Type: GrantFiled: August 25, 2011Date of Patent: January 8, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Shi-Yong Yi, Myeong-Cheol Kim, Dong-Ki Yoon, Kyung-Yub Jeon, Ji-Hoon Cha
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Patent number: 8334089Abstract: For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.Type: GrantFiled: September 22, 2011Date of Patent: December 18, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Shi-Yong Yi, Kyoung-Taek Kim, Hyun-Woo Kim, Dong-Ki Yoon
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Patent number: 8263487Abstract: A method of forming fine patterns of a semiconductor device by using carbon (C)-containing films includes forming an etching target film on a substrate including first and second regions; forming a plurality of first C-containing film patterns on the etching target film in the first region; forming a buffer layer which covers top and side surfaces of the plurality of first C-containing film patterns; forming a second C-containing film; removing the second C-containing film in the second region; exposing the plurality of first C-containing film patterns by removing a portion of the buffer layer in the first and second regions; and etching the etching target film by using the plurality of first C-containing film patterns, and portions of the second C-containing film which remain in the first region, as an etching mask.Type: GrantFiled: December 29, 2009Date of Patent: September 11, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Dong-ki Yoon, Shi-yong Yi, Seong-woon Choi, Seok-hwan Oh, Kwang-sub Yoon, Myeong-cheol Kim, Young-ju Park
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Patent number: 8263323Abstract: A method of forming a fine pattern includes forming an organic guide layer on a substrate, forming a photoresist pattern on the organic guide layer, the photoresist pattern including a plurality of openings exposing portions of the organic guide layer, forming a material layer on the exposed portions of the organic guide layer and on the photoresist pattern, the material layer including block copolymers, and rearranging the material layer through phase separation of the block copolymers into a fine pattern layer, such that the fine pattern layer includes a plurality of first blocks and a plurality of second blocks arranged in an alternating pattern, the plurality of first blocks and the plurality of the second blocks having different repeating units of the block copolymers.Type: GrantFiled: November 19, 2009Date of Patent: September 11, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Dong Ki Yoon, Shi-yong Yi, Seok-hwan Oh, Kyoung-seon Kim, Sang Ouk Kim, Seung-hak Park
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Publication number: 20120015527Abstract: For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.Type: ApplicationFiled: September 22, 2011Publication date: January 19, 2012Inventors: SHI-YONG Yi, KYOUNG-TAEK KIM, HYUN-WOO KIM, DONG-KI YOON
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Publication number: 20120003587Abstract: A method of patterning a substrate includes processing first regions of the substrate to form a first pattern, the first regions defining a second region between adjacent first regions, arranging a block copolymer on the first and second regions, the block copolymer including a first component and a second component, the first component of the block copolymer being aligned on the first regions, and selectively removing one of the first component and the second component of the block copolymer to form a second pattern having a pitch that is less than a pitch of a first region and an adjacent second region.Type: ApplicationFiled: September 20, 2011Publication date: January 5, 2012Applicant: SAMSUNG ELECTRONICS CO., LTDInventors: Kyoung Taek KIM, Hyun Woo KIM, Sang Ouk KIM, Shi Yong YI, Seong Woon CHOI
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Publication number: 20110312183Abstract: For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.Type: ApplicationFiled: August 25, 2011Publication date: December 22, 2011Inventors: Shi-Yong Yi, Myeong-Cheol Kim, Dong-Ki Yoon, Kyung-Yub Jeon, Ji-Hoon Cha
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Patent number: 8053163Abstract: For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.Type: GrantFiled: September 12, 2008Date of Patent: November 8, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Shi-Yong Yi, Kyoung-Taek Kim, Hyun-Woo Kim, Dong-Ki Yoon
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Patent number: 8039196Abstract: A method of patterning a substrate includes processing first regions of the substrate to form a first pattern, the first regions defining a second region between adjacent first regions, arranging a block copolymer on the first and second regions, the block copolymer including a first component and a second component, the first component of the block copolymer being aligned on the first regions, and selectively removing one of the first component and the second component of the block copolymer to form a second pattern having a pitch that is less than a pitch of a first region and an adjacent second region.Type: GrantFiled: March 19, 2008Date of Patent: October 18, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Kyoung Taek Kim, Hyun Woo Kim, Sang Ouk Kim, Shi Yong Yi, Seong Woon Choi
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Patent number: 8029688Abstract: For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.Type: GrantFiled: July 9, 2008Date of Patent: October 4, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Shi-Yong Yi, Myeong-Cheol Kim, Dong-Ki Yoon, Kyung-Yub Jeon, Ji-Hoon Cha
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Patent number: 7998357Abstract: For integrated circuit fabrication, at least one spacer support structure is formed in a first area over a semiconductor substrate, and a mask material is deposited on exposed surfaces of the spacer support structure and on a second area over the semiconductor substrate. A masking structure is formed on a portion of the mask material in the second area, and the mask material is patterned to form spacers on sidewalls of the spacer support structure and to form a mask pattern under the masking structure. The spacer support structure and the masking structure are comprised of respective high carbon content materials that have been spin-coated and have substantially a same etch selectivity.Type: GrantFiled: July 9, 2008Date of Patent: August 16, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Nam-Myun Cho, Myeong-Cheol Kim, Shi-Yong Yi, Young-Hoon Song, Young-Ju Park
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Patent number: 7863231Abstract: A thinner composition includes propylene glycol ether acetate, methyl 2-hydroxy-2-methyl propionate, and an ester compound such as ethyl lactate, ethyl 3-ethoxy propionate or a mixture thereof.Type: GrantFiled: May 12, 2008Date of Patent: January 4, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Seung-Hyun Ahn, Eun-Mi Bae, Baik-Soon Choi, Sang-Mun Chon, Dae-Joung Kim, Kwang-sub Yoon, Sang-Kyu Park, Jae-Ho Kim, Shi-Yong Yi, Kyoung-Mi Kim, Yeu-Young Youn
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Publication number: 20100248492Abstract: A method of forming fine patterns of a semiconductor device by using carbon (C)-containing films includes forming an etching target film on a substrate including first and second regions; forming a plurality of first C-containing film patterns on the etching target film in the first region; forming a buffer layer which covers top and side surfaces of the plurality of first C-containing film patterns; forming a second C-containing film; removing the second C-containing film in the second region; exposing the plurality of first C-containing film patterns by removing a portion of the buffer layer in the first and second regions; and etching the etching target film by using the plurality of first C-containing film patterns, and portions of the second C-containing film which remain in the first region, as an etching mask.Type: ApplicationFiled: December 29, 2009Publication date: September 30, 2010Applicant: Samsung Electronics Co., Ltd.Inventors: Dong-ki Yoon, Shi-yong Yi, Seong-woon Choi, Seok-hwan Oh, Kwang-sub Yoon, Myeong-cheol Kim, Young-ju Park
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Publication number: 20100167214Abstract: A method of forming a fine pattern includes forming an organic guide layer on a substrate, forming a photoresist pattern on the organic guide layer, the photoresist pattern including a plurality of openings exposing portions of the organic guide layer, forming a material layer on the exposed portions of the organic guide layer and on the photoresist pattern, the material layer including block copolymers, and rearranging the material layer through phase separation of the block copolymers into a fine pattern layer, such that the fine pattern layer includes a plurality of first blocks and a plurality of second blocks arranged in an alternating pattern, the plurality of first blocks and the plurality of the second blocks having different repeating units of the block copolymers.Type: ApplicationFiled: November 19, 2009Publication date: July 1, 2010Inventors: Dong Ki Yoon, Shi-yong Yi, Seok-hwan Oh, Kyoung-seon Kim, Sang Ouk Kim, Seung-hak Park
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Publication number: 20090274980Abstract: A method of forming fine patterns of a semiconductor device according to a double patterning process that uses acid diffusion is provided. In this method, a plurality of first mask patterns are formed on a substrate so as to be separated from one another. A capping film including an acid source is formed on sidewalls and an upper surface of each of the plurality of first mask patterns. A second mask layer is formed on the capping films. A plurality of acid diffused regions are formed within the second mask layer by diffusing acid obtained from the acid source from the capping films into the second mask layer. A plurality of second mask patterns are formed of residual parts of the second mask layer which remain in the first spaces after removing the acid diffused regions of the second mask layer.Type: ApplicationFiled: November 10, 2008Publication date: November 5, 2009Inventors: Yool Kang, Suk-joo Lee, Jung-hyeon Lee, Shi-yong Yi
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Publication number: 20090246966Abstract: For integrated circuit fabrication, at least one spacer support structure is formed in a first area over a semiconductor substrate, and a mask material is deposited on exposed surfaces of the spacer support structure and on a second area over the semiconductor substrate. A masking structure is formed on a portion of the mask material in the second area, and the mask material is patterned to form spacers on sidewalls of the spacer support structure and to form a mask pattern under the masking structure. The spacer support structure and the masking structure are comprised of respective high carbon content materials that have been spin-coated and have substantially a same etch selectivity.Type: ApplicationFiled: July 9, 2008Publication date: October 1, 2009Inventors: Nam-Myun Cho, Myeong-Cheol Kim, Shi-Yong Yi, Young-Hoon Song, Young-Ju Park
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Publication number: 20090191713Abstract: Provided is a method of forming a fine pattern using a block copolymer. The method comprises forming a coating layer including a block copolymer having a plurality of repeating units on a substrate. A mold is provided having a first pattern comprising a plurality of ridges and valleys. The first pattern is transferred from the mold into the coating layer. Then, a self-assembly structure is formed comprising a plurality of polymer blocks aligned in a direction guided by the ridges and valleys of the mold thereby rearranging the repeating units of the block copolymer within the coating layer by phase separation while the coating layer is located within the valleys of the mold. A portion of the polymer blocks are removed from among the plurality of polymer blocks and a self-assembly fine pattern of remaining polymer blocks is formed.Type: ApplicationFiled: September 22, 2008Publication date: July 30, 2009Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dong-Ki YOON, Hyun-Woo KIM, Shi-Yong YI, Hai-Sub NA, Kyoung-Taek KIM, Yun-Kyeong JANG
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Publication number: 20090176376Abstract: For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.Type: ApplicationFiled: July 9, 2008Publication date: July 9, 2009Inventors: Shi-Yong Yi, Myeong-Cheol Kim, Dong-Ki Yoon, Kyung-Yub Jeon, Ji-Hoon Cha
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Publication number: 20090155725Abstract: For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.Type: ApplicationFiled: September 12, 2008Publication date: June 18, 2009Inventors: Shi-Yong Yi, Kyoung-Taek Kim, Hyun-Woo Kim, Dong-Ki Yoon
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Publication number: 20090042146Abstract: A method of patterning a substrate includes processing first regions of the substrate to form a first pattern, the first regions defining a second region between adjacent first regions, arranging a block copolymer on the first and second regions, the block copolymer including a first component and a second component, the first component of the block copolymer being aligned on the first regions, and selectively removing one of the first component and the second component of the block copolymer to form a second pattern having a pitch that is less than a pitch of a first region and an adjacent second region.Type: ApplicationFiled: March 19, 2008Publication date: February 12, 2009Inventors: Kyoung Taek Kim, Hyun Woo Kim, Sang Ouk Kim, Shi Yong Yi, Seong Woon Choi