Patents by Inventor Shiang-Chi LIN
Shiang-Chi LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12217530Abstract: An apparatus may include an ultrasonic sensor stack, a foldable display stack and a transmission enhancement layer. The foldable display stack may include a display stiffener and display stack layers. The display stack layers may form one or more display stack resonators configured to enhance ultrasonic waves transmitted by the ultrasonic sensor stack in a first ultrasonic frequency range. In some implementations, a transmission enhancement resonator may include the display stiffener and the transmission enhancement layer. In some examples, the transmission enhancement resonator may include at least a portion of the ultrasonic sensor stack. The transmission enhancement resonator may be configured to enhance the ultrasonic waves transmitted by the ultrasonic sensor stack in the first ultrasonic frequency range.Type: GrantFiled: April 18, 2023Date of Patent: February 4, 2025Assignee: QUALCOMM IncorporatedInventors: Shiang-Chi Lin, Hrishikesh Vijaykumar Panchawagh, Jessica Liu Strohmann, Yipeng Lu, Chin-Jen Tseng, Kostadin Dimitrov Djordjev, Min-Lun Yang, Chia-Wei Yang
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Patent number: 12169977Abstract: An apparatus may include an ultrasonic sensor stack, a foldable display stack and a transmission enhancement layer. The foldable display stack may include a display stiffener and display stack layers. The display stack layers may form one or more display stack resonators configured to enhance ultrasonic waves transmitted by the ultrasonic sensor stack in a first ultrasonic frequency range. In some implementations, a transmission enhancement resonator may include the display stiffener and the transmission enhancement layer. In some examples, the transmission enhancement resonator may include at least a portion of the ultrasonic sensor stack. The transmission enhancement resonator may be configured to enhance the ultrasonic waves transmitted by the ultrasonic sensor stack in the first ultrasonic frequency range.Type: GrantFiled: October 13, 2023Date of Patent: December 17, 2024Assignee: QUALCOMM IncorporatedInventors: Shiang-Chi Lin, Hrishikesh Vijaykumar Panchawagh, Jessica Liu Strohmann, Yipeng Lu, Chin-Jen Tseng, Kostadin Dimitrov Djordjev, Min-Lun Yang, Chia-Wei Yang
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Publication number: 20240338964Abstract: Some disclosed devices include a display system having a display stack, an ultrasonic fingerprint sensor system including an ultrasonic fingerprint sensor system stack and a stiffener layer residing between the display stack and the ultrasonic fingerprint sensor system stack. In some examples, the stiffener layer may have a stiffener layer thickness that allows the ultrasonic fingerprint sensor system to operate in a near-field mode. According to some examples, operating in the near-field mode may involve transmitting ultrasound having a peak frequency in a range from 1 megahertz (MHz) to 6 MHz.Type: ApplicationFiled: March 20, 2024Publication date: October 10, 2024Inventors: Shiang-Chi LIN, Jessica Liu STROHMANN, Hrishikesh Vijaykumar PANCHAWAGH
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Patent number: 11910716Abstract: An apparatus includes an ultrasonic sensor stack, a foldable display stack that includes a display stiffener, and an additional stiffener between the ultrasonic sensor stack and the foldable display stack. The additional stiffener forms an acoustic resonator with the display stiffener and an adhesive layer between the display stiffener and the additional stiffener in order to amplify transmission of ultrasonic waves transmitted by the ultrasonic sensor stack. The additional stiffener includes a material having a high modulus of elasticity, low density, and high acoustic impedance value. In some cases, the additional stiffener includes a metal, a ceramic, a glass, or a glass ceramic. The additional stiffener increases an overall stiffness and mechanical integrity of the apparatus so that a foam backer may be omitted from the ultrasonic sensor stack.Type: GrantFiled: February 2, 2023Date of Patent: February 20, 2024Assignee: QUALCOMM IncorporatedInventors: Chin-Jen Tseng, Jessica Liu Strohmann, Ila Badge, Shiang-Chi Lin, Min-Lun Yang, Hrishikesh Vijaykumar Panchawagh
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Publication number: 20240037979Abstract: An apparatus may include an ultrasonic sensor stack, a foldable display stack and a transmission enhancement layer. The foldable display stack may include a display stiffener and display stack layers. The display stack layers may form one or more display stack resonators configured to enhance ultrasonic waves transmitted by the ultrasonic sensor stack in a first ultrasonic frequency range. In some implementations, a transmission enhancement resonator may include the display stiffener and the transmission enhancement layer. In some examples, the transmission enhancement resonator may include at least a portion of the ultrasonic sensor stack. The transmission enhancement resonator may be configured to enhance the ultrasonic waves transmitted by the ultrasonic sensor stack in the first ultrasonic frequency range.Type: ApplicationFiled: October 13, 2023Publication date: February 1, 2024Inventors: Shiang-Chi LIN, Hrishikesh Vijaykumar PANCHAWAGH, Jessica Liu STROHMANN, Yipeng LU, Chin-Jen TSENG, Kostadin Dimitrov DJORDJEV, Min-Lun YANG, Chia-Wei YANG
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Patent number: 11798307Abstract: An apparatus may include an ultrasonic sensor stack, a foldable display stack and a transmission enhancement layer. The foldable display stack may include a display stiffener and display stack layers. The display stack layers may form one or more display stack resonators configured to enhance ultrasonic waves transmitted by the ultrasonic sensor stack in a first ultrasonic frequency range. In some implementations, a transmission enhancement resonator may include the display stiffener and the transmission enhancement layer. In some examples, the transmission enhancement resonator may include at least a portion of the ultrasonic sensor stack. The transmission enhancement resonator may be configured to enhance the ultrasonic waves transmitted by the ultrasonic sensor stack in the first ultrasonic frequency range.Type: GrantFiled: August 30, 2021Date of Patent: October 24, 2023Assignee: QUALCOMM IncorporatedInventors: Shiang-Chi Lin, Hrishikesh Vijaykumar Panchawagh, Jessica Liu Strohmann, Yipeng Lu, Chin-Jen Tseng, Kostadin Dimitrov Djordjev, Min-Lun Yang, Chia-Wei Yang
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Publication number: 20230252816Abstract: An apparatus may include an ultrasonic sensor stack, a foldable display stack and a transmission enhancement layer. The foldable display stack may include a display stiffener and display stack layers. The display stack layers may form one or more display stack resonators configured to enhance ultrasonic waves transmitted by the ultrasonic sensor stack in a first ultrasonic frequency range. In some implementations, a transmission enhancement resonator may include the display stiffener and the transmission enhancement layer. In some examples, the transmission enhancement resonator may include at least a portion of the ultrasonic sensor stack. The transmission enhancement resonator may be configured to enhance the ultrasonic waves transmitted by the ultrasonic sensor stack in the first ultrasonic frequency range.Type: ApplicationFiled: April 18, 2023Publication date: August 10, 2023Inventors: Shiang-Chi LIN, Hrishikesh Vijaykumar PANCHAWAGH, Jessica Liu STROHMANN, Yipeng LU, Chin-Jen TSENG, Kostadin Dimitrov DJORDJEV, Min-Lun YANG, Chia-Wei YANG
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Publication number: 20230063693Abstract: An apparatus may include an ultrasonic sensor stack, a foldable display stack and a transmission enhancement layer. The foldable display stack may include a display stiffener and display stack layers. The display stack layers may form one or more display stack resonators configured to enhance ultrasonic waves transmitted by the ultrasonic sensor stack in a first ultrasonic frequency range. In some implementations, a transmission enhancement resonator may include the display stiffener and the transmission enhancement layer. In some examples, the transmission enhancement resonator may include at least a portion of the ultrasonic sensor stack. The transmission enhancement resonator may be configured to enhance the ultrasonic waves transmitted by the ultrasonic sensor stack in the first ultrasonic frequency range.Type: ApplicationFiled: August 30, 2021Publication date: March 2, 2023Inventors: Shiang-Chi LIN, Hrishikesh Vijaykumar PANCHAWAGH, Jessica Liu STROHMANN, Yipeng LU, Chin-Jen TSENG, Kostadin Dimitrov DJORDJEV, Min-Lun YANG, Chia-Wei YANG
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Patent number: 11505454Abstract: A method for manufacturing a MEMS structure is provided. The method includes providing a MEMS substrate having a first surface, forming a first buffer layer on the first surface of the MEMS substrate, and forming a first roughening layer on the first buffer layer. Also, a MEMS structure is provided. The MEMS structure includes a MEMS substrate, a first buffer layer, a first roughening layer, and a CMOS substrate. The MEMS substrate has a first surface and a pillar is on the first surface. The first buffer layer is on the first surface. The first roughening layer is on the first buffer layer. The CMOS substrate has a second surface and is bonded to the MEMS substrate via the pillar. Moreover, an air gap is between the first roughening layer and the second surface of the CMOS substrate.Type: GrantFiled: September 25, 2019Date of Patent: November 22, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Kang-Che Huang, Yi-Chien Wu, Shiang-Chi Lin, Jung-Huei Peng, Chun-Wen Cheng
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Patent number: 11254564Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of vias, a signal transmitting portion, a heater and a sensing material. The plurality of vias penetrates the substrate, wherein each of the plurality of vias includes a conductive or semiconductive portion surrounded by an oxide layer. The signal transmitting portion is disposed in the substrate, wherein adjacent vias of the plurality of vias surrounds the signal transmitting portion. The heater is electrically connected to the signal transmitting portion, and the sensing material is disposed over the heater and electrically connected to the substrate. A method of manufacturing a semiconductor structure is also provided.Type: GrantFiled: April 8, 2020Date of Patent: February 22, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
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Patent number: 11148936Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a metallization layer over the substrate, and a sensing structure over the metallization layer. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier in proximity to a top surface of the outgassing layer, the patterned outgassing barrier exposing a portion of the outgassing layer, and an electrode over the patterned outgassing barrier. The method for manufacturing the semiconductor device is also provided.Type: GrantFiled: December 16, 2019Date of Patent: October 19, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Jung-Huei Peng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
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Publication number: 20210087056Abstract: A method for manufacturing a MEMS structure is provided. The method includes providing a MEMS substrate having a first surface, forming a first buffer layer on the first surface of the MEMS substrate, and forming a first roughening layer on the first buffer layer. Also, a MEMS structure is provided. The MEMS structure includes a MEMS substrate, a first buffer layer, a first roughening layer, and a CMOS substrate. The MEMS substrate has a first surface and a pillar is on the first surface. The first buffer layer is on the first surface. The first roughening layer is on the first buffer layer. The CMOS substrate has a second surface and is bonded to the MEMS substrate via the pillar. Moreover, an air gap is between the first roughening layer and the second surface of the CMOS substrate.Type: ApplicationFiled: September 25, 2019Publication date: March 25, 2021Inventors: KANG-CHE HUANG, YI-CHIEN WU, SHIANG-CHI LIN, JUNG-HUEI PENG, CHUN-WEN CHENG
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Publication number: 20200231431Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of vias, a signal transmitting portion, a heater and a sensing material. The plurality of vias penetrates the substrate, wherein each of the plurality of vias includes a conductive or semiconductive portion surrounded by an oxide layer. The signal transmitting portion is disposed in the substrate, wherein adjacent vias of the plurality of vias surrounds the signal transmitting portion. The heater is electrically connected to the signal transmitting portion, and the sensing material is disposed over the heater and electrically connected to the substrate. A method of manufacturing a semiconductor structure is also provided.Type: ApplicationFiled: April 8, 2020Publication date: July 23, 2020Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
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Publication number: 20200140266Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a metallization layer over the substrate, and a sensing structure over the metallization layer. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier in proximity to a top surface of the outgassing layer, the patterned outgassing barrier exposing a portion of the outgassing layer, and an electrode over the patterned outgassing barrier. The method for manufacturing the semiconductor device is also provided.Type: ApplicationFiled: December 16, 2019Publication date: May 7, 2020Inventors: JUNG-HUEI PENG, CHIA-HUA CHU, FEI-LUNG LAI, SHIANG-CHI LIN
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Patent number: 10618804Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate, receiving a heater, receiving an electrode, and receiving a sensing material. The substrate have a first surface, a second surface opposite to the first surface and a plurality of vias extending from the second surface toward the first surface and filled with a conductive or semiconductive material and a first oxide layer, the first oxide layer surrounding the conductive or semiconductive material in the plurality of vias, and a second oxide layer disposed over the first surface and the second surface. The heater is disposed within a membrane over the first surface of the substrate and electrically connected with the substrate. The electrode is over the heater and the membrane; and the sensing material covers a portion of the electrode.Type: GrantFiled: July 26, 2018Date of Patent: April 14, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
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Patent number: 10508027Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.Type: GrantFiled: August 8, 2018Date of Patent: December 17, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Jung-Huei Peng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
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Publication number: 20180362335Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.Type: ApplicationFiled: August 8, 2018Publication date: December 20, 2018Inventors: JUNG-HUEI PENG, CHIA-HUA CHU, FEI-LUNG LAI, SHIANG-CHI LIN
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Publication number: 20180346319Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate, receiving a heater, receiving an electrode, and receiving a sensing material. The substrate have a first surface, a second surface opposite to the first surface and a plurality of vias extending from the second surface toward the first surface and filled with a conductive or semiconductive material and a first oxide layer, the first oxide layer surrounding the conductive or semiconductive material in the plurality of vias, and a second oxide layer disposed over the first surface and the second surface. The heater is disposed within a membrane over the first surface of the substrate and electrically connected with the substrate. The electrode is over the heater and the membrane; and the sensing material covers a portion of the electrode.Type: ApplicationFiled: July 26, 2018Publication date: December 6, 2018Inventors: CHUN-WEN CHENG, CHIA-HUA CHU, FEI-LUNG LAI, SHIANG-CHI LIN
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Patent number: 10046965Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.Type: GrantFiled: March 13, 2017Date of Patent: August 14, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Jung-Huei Peng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
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Patent number: 10035700Abstract: A semiconductor structure includes a substrate including a plurality of vias passing through the substrate and filled with a conductive or semiconductive material, and an oxide layer surrounding the conductive or semiconductive material, the substrate defining a cavity therein; a membrane disposed over the substrate and the cavity; a heater disposed within the membrane and electrically connected with the substrate; and a sensing electrode disposed over the membrane and the heater.Type: GrantFiled: January 26, 2017Date of Patent: July 31, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin