Patents by Inventor Shiang-Chi LIN

Shiang-Chi LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10046965
    Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: August 14, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Patent number: 10035700
    Abstract: A semiconductor structure includes a substrate including a plurality of vias passing through the substrate and filled with a conductive or semiconductive material, and an oxide layer surrounding the conductive or semiconductive material, the substrate defining a cavity therein; a membrane disposed over the substrate and the cavity; a heater disposed within the membrane and electrically connected with the substrate; and a sensing electrode disposed over the membrane and the heater.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: July 31, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Patent number: 9938134
    Abstract: A microelectromechanical systems (MEMS) package with high gettering efficiency is provided. A MEMS device is arranged over a logic chip, within a cavity that is hermetically sealed. A sensing electrode is arranged within the cavity, between the MEMS device and the logic chip. The sensing electrode is electrically coupled to the logic chip and is a conductive getter material configured to remove gas molecules from the cavity. A method for manufacturing the MEMS package is also provided.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: April 10, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shiang-Chi Lin, Jung-Huei Peng, Yu-Chia Liu, Yi-Chien Wu, Wei Siang Tan
  • Publication number: 20170297904
    Abstract: A microelectromechanical systems (MEMS) package with high gettering efficiency is provided. A MEMS device is arranged over a logic chip, within a cavity that is hermetically sealed. A sensing electrode is arranged within the cavity, between the MEMS device and the logic chip. The sensing electrode is electrically coupled to the logic chip and is a conductive getter material configured to remove gas molecules from the cavity. A method for manufacturing the MEMS package is also provided.
    Type: Application
    Filed: July 8, 2016
    Publication date: October 19, 2017
    Inventors: Shiang-Chi Lin, Jung-Huei Peng, Yu-Chia Liu, Yi-Chien Wu
  • Publication number: 20170183222
    Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.
    Type: Application
    Filed: March 13, 2017
    Publication date: June 29, 2017
    Inventors: JUNG-HUEI PENG, CHIA-HUA CHU, FEI-LUNG LAI, SHIANG-CHI LIN
  • Publication number: 20170129771
    Abstract: A semiconductor structure includes a substrate including a plurality of vias passing through the substrate and filled with a conductive or semiconductive material, and an oxide layer surrounding the conductive or semiconductive material, the substrate defining a cavity therein; a membrane disposed over the substrate and the cavity; a heater disposed within the membrane and electrically connected with the substrate; and a sensing electrode disposed over the membrane and the heater.
    Type: Application
    Filed: January 26, 2017
    Publication date: May 11, 2017
    Inventors: CHUN-WEN CHENG, CHIA-HUA CHU, FEI-LUNG LAI, SHIANG-CHI LIN
  • Patent number: 9630831
    Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: April 25, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Publication number: 20170107099
    Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.
    Type: Application
    Filed: October 15, 2015
    Publication date: April 20, 2017
    Inventors: JUNG-HUEI PENG, CHIA-HUA CHU, FEI-LUNG LAI, SHIANG-CHI LIN
  • Publication number: 20170066646
    Abstract: A semiconductor structure includes a first device and a second device. The first device includes a first substrate, a plurality of vias passing through the first substrate and filled with a conductive or semiconductive material and a first oxide layer surrounding the conductive or semiconductive material, a cavity surrounded by the first substrate, a metallic material disposed over the first surface, a second oxide layer disposed over the second surface, a membrane disposed over the second oxide layer and the cavity, a heater disposed within the membrane, a sensing electrode disposed over the membrane and the heater, and a sensing material disposed over the cavity and contacting with the sensing electrode. The second device includes a second substrate, and a bonding structure disposed over the second substrate. The metallic material is bonded with the bonding structure to integrate the first device with the second device.
    Type: Application
    Filed: September 3, 2015
    Publication date: March 9, 2017
    Inventors: CHUN-WEN CHENG, CHIA-HUA CHU, FEI-LUNG LAI, SHIANG-CHI LIN
  • Patent number: 9567209
    Abstract: A semiconductor structure includes a first device and a second device. The first device includes a first substrate, a plurality of vias passing through the first substrate and filled with a conductive or semiconductive material and a first oxide layer surrounding the conductive or semiconductive material, a cavity surrounded by the first substrate, a metallic material disposed over the first surface, a second oxide layer disposed over the second surface, a membrane disposed over the second oxide layer and the cavity, a heater disposed within the membrane, a sensing electrode disposed over the membrane and the heater, and a sensing material disposed over the cavity and contacting with the sensing electrode. The second device includes a second substrate, and a bonding structure disposed over the second substrate. The metallic material is bonded with the bonding structure to integrate the first device with the second device.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: February 14, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Patent number: 9459224
    Abstract: A gas sensor includes a substrate, a heater, a dielectric layer, a sensing electrode, and a gas sensitive film. The substrate has a sensing region and a peripheral region surrounding the sensing region, and the substrate further has an opening disposed in the sensing region. The heater is disposed at least above the opening, and the heater has an electrical resistivity larger than about 6×10?8 ohm-m. The dielectric layer is disposed on the heater. The sensing electrode is disposed on the dielectric layer. The gas sensitive film is disposed on the sensing electrode.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: October 4, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Publication number: 20150177188
    Abstract: A microfluidic device includes an insulating substrate, an electrode array and a cover. The electrode array is disposed on the substrate for receiving a plurality of alternating current control signals each of which has a phase. The cover is disposed on the substrate and has a surface that faces the substrate and that cooperates with the substrate to define a microfluidic channel over the electrode array. The phases of the control signals differ from one another, such that liquid introduced into the microfluidic channel is driven to flow therethrough.
    Type: Application
    Filed: October 24, 2014
    Publication date: June 25, 2015
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Shiang-Chi LIN, Pei-Wen YEN, Yu-Lung SUNG, Chih-Ting LIN
  • Publication number: 20150014171
    Abstract: A microfluidic particle separation device includes a substrate and a plurality of electrode bars formed on the substrate, disposed around as array center, angularly spaced apart from one another, and extending radially with respect to the array center so as to form a radially-extending electrode array that is capable of inducing circular or elliptical shear flow of the liquid through travelling-wave electroosmosis when being applied with a travelling-wave electric potential.
    Type: Application
    Filed: April 29, 2014
    Publication date: January 15, 2015
    Applicant: National Taiwan University
    Inventors: Shiang-Chi LIN, Chih-Ting LIN, Yi-Chung TUNG, Yu-Lung SUNG