Patents by Inventor Shibabrata Mondal

Shibabrata Mondal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11699435
    Abstract: A system and method to interpret natural language requests and handle natural language responses in conversation is disclosed. The system includes an intent creation subsystem to receive one or more predefined intents to create one or more corresponding intent databases; a natural language message handling subsystem to receive a plurality of natural language messages from a user to identify one or more intents, to match one or more identified intents associated with the plurality of received natural language messages with the one or more predefined intents, handle the one or more identified intents by using a first message handling scheme when a similar match is found and a second message handling scheme in case of a dissimilar match; a natural language response handling subsystem to extract information from plurality of received natural language messages, to rectify the plurality of received natural language messages to handle a structured natural language response.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: July 11, 2023
    Inventor: Shibabrata Mondal
  • Patent number: 11328018
    Abstract: A system for state dependency-based task execution and natural language response generation is disclosed. The system includes an input request acquisition subsystem to obtain a plurality of natural language input requests from one or more sources through at least one information capturing medium; a state definition subsystem to determine a plurality of states for a plurality of obtained natural language input requests; a state dependency definition subsystem to create a list of a plurality of determined states required to generate a dependency order, to analyse a generated dependency order of the plurality of determined states, to generate a dynamic working procedure to generate a temporary natural language response; a state based response generation subsystem to generate a structured natural language response dynamically upon successful execution of the dynamic working procedure.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: May 10, 2022
    Inventor: Shibabrata Mondal
  • Publication number: 20210082422
    Abstract: A system and method to interpret natural language requests and handle natural language responses in conversation is disclosed. The system includes an intent creation subsystem to receive one or more predefined intents to create one or more corresponding intent databases; a natural language message handling subsystem to receive a plurality of natural language messages from a user to identify one or more intents, to match one or more identified intents associated with the plurality of received natural language messages with the one or more predefined intents, handle the one or more identified intents by using a first message handling scheme when a similar match is found and a second message handling scheme in case of a dissimilar match; a natural language response handling subsystem to extract information from plurality of received natural language messages, to rectify the plurality of received natural language messages to handle a structured natural language response.
    Type: Application
    Filed: December 9, 2019
    Publication date: March 18, 2021
    Inventor: Shibabrata Mondal
  • Publication number: 20210064667
    Abstract: A system for state dependency-based task execution and natural language response generation is disclosed. The system includes an input request acquisition subsystem to obtain a plurality of natural language input requests from one or more sources through at least one information capturing medium; a state definition subsystem to determine a plurality of states for a plurality of obtained natural language input requests; a state dependency definition subsystem to create a list of a plurality of determined states required to generate a dependency order, to analyse a generated dependency order of the plurality of determined states, to generate a dynamic working procedure to generate a temporary natural language response; a state based response generation subsystem to generate a structured natural language response dynamically upon successful execution of the dynamic working procedure.
    Type: Application
    Filed: November 26, 2019
    Publication date: March 4, 2021
    Inventor: Shibabrata Mondal
  • Patent number: 10917469
    Abstract: A computer-implemented method for efficiently accessing a secondary storage in highly available clustered storage environment may include receiving a client-initiated data request at a secondary server coupled to a secondary storage; determining request information about the client-initiated data request; determining with the secondary server whether to process the client-initiated data request on the secondary storage based on the determined request information; and responsive to determining that the secondary server should process the client-initiated data request, processing the client-initiated data request by the secondary server to retrieve data from the secondary storage.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: February 9, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Manoj Kumar Tiwari, Avik Sil, Swamy Gowda Jayaramu, Shibabrata Mondal
  • Publication number: 20180278685
    Abstract: A computer-implemented method for efficiently accessing a secondary storage in highly available clustered storage environment may include receiving a client-initiated data request at a secondary server coupled to a secondary storage; determining request information about the client-initiated data request; determining with the secondary server whether to process the client-initiated data request on the secondary storage based on the determined request information; and responsive to determining that the secondary server should process the client-initiated data request, processing the client-initiated data request by the secondary server to retrieve data from the secondary storage.
    Type: Application
    Filed: March 22, 2017
    Publication date: September 27, 2018
    Inventors: Manoj Kumar Tiwari, Avik Sil, Swamy Gowda Jayaramu, Shibabrata Mondal
  • Patent number: 10073626
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: September 11, 2018
    Assignee: VIRIDENT SYSTEMS, LLC
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Patent number: 10049055
    Abstract: Some implementations provide a method for managing data in a storage system that includes a persistent storage device and a non-volatile random access memory (NVRAM) cache device. The method includes: accessing a direct mapping between a logical address associated with data stored on the persistent storage device and a physical address on the NVRAM cache device; receiving, from a host computing device coupled to the storage system, a request to access a particular unit of data stored on the persistent storage device; using the direct mapping as a basis between the logical address associated with the data stored on the persistent storage device and the physical address on the NVRAM cache device to determine whether the particular unit of data being requested is present on the NVRAM cache device.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: August 14, 2018
    Assignee: VIRIDIENT SYSTEMS, INC
    Inventors: Shibabrata Mondal, Vijay Karamcheti, Ankur Arora, Ajit Yagaty
  • Patent number: 9983797
    Abstract: In one embodiment of the invention, a server is disclosed including a main printed circuit board; a plurality of processors mounted to the main printed circuit board; and a memory system accessible to the plurality of processors. The memory system includes a plurality of expansion sockets mounted to the printed circuit board, and a plurality of server memory cards removeably plugged into the plurality of expansion sockets. Each server memory card includes a master controller, a plurality of slave controllers, and a plurality of replaceable daughter-memory-cards with read-writeable non-volatile memory.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: May 29, 2018
    Assignee: VIRIDENT SYSTEMS, LLC
    Inventors: Vijay Karamcheti, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9898196
    Abstract: A first portion of an asymmetric memory is configured as temporary storage for application data units with sizes corresponding to a small memory block that is smaller than the size of a logical write unit associated with the asymmetric memory. A portion of the remaining asymmetric memory is configured as a reconciled storage for application data units with varying sizes. A first application data unit is received for writing to the asymmetric memory. Based on computing the size of the first application data unit as corresponding to the small memory block, the first application data unit is written to the temporary storage. Upon determining that a threshold is reached, a memory write operation is performed for writing the application data units from the temporary storage to the reconciled storage. The application data units written to the reconciled storage are removed from the temporary storage.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: February 20, 2018
    Assignee: Virident Systems, LLC
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Swamy Gowda
  • Patent number: 9811285
    Abstract: Data is stored as a first collection of memory blocks distributed across a first set of memory devices. It is determined that a first memory device in the first set is in a degraded state. Data is recovered corresponding to a first memory block in the first collection of memory blocks that is stored in the first memory device, which is configured to include a first number of memory blocks. The recovered data is stored in a second memory device as a new memory block, which is added to the first collection of memory blocks. The first memory device is removed from the first set and reconfigured with a second number of memory blocks that is less than the first number of memory blocks. Memory blocks in a second collection of memory blocks distributed across a second set of memory devices is stored in the reconfigured first memory device.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: November 7, 2017
    Assignee: VIRIDENT SYSTEMS, LLC
    Inventors: Vijay Karamcheti, Swamy Gowda, Rajendra Prasad Mishra, Shibabrata Mondal
  • Patent number: 9733840
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: August 15, 2017
    Assignee: VIRIDENT SYSTEMS, LLC
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9734027
    Abstract: First data is received for storing in a first asymmetric memory device. A first writing phase is identified as a current writing phase. A first segment included in the first asymmetric memory device is identified as next segment available for writing data. The first data is written to the first segment. Information associated with the first segment is stored, along with information indicating that the first segment is written in the first writing phase. Second data is received for storing in the asymmetric memory. A second segment included in the first asymmetric memory device is identified as the next segment available for writing data. The second data is written to the second segment. Information associated with the second segment and the second memory block is stored along with information indicating that the second segment is written in the second writing phase.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: August 15, 2017
    Assignee: Virident Systems, LLC
    Inventors: Vijay Karamcheti, Shibabrata Mondal, Swamy Gowda
  • Patent number: 9588698
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: March 7, 2017
    Assignee: Virident Systems Inc.
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Publication number: 20170038981
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Application
    Filed: October 24, 2016
    Publication date: February 9, 2017
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9477595
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: October 25, 2016
    Assignee: Virident Systems Inc.
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9323663
    Abstract: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: April 26, 2016
    Assignee: Virident Systems Inc.
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Ajith Kumar
  • Publication number: 20160110105
    Abstract: In one embodiment of the invention, a server is disclosed including a main printed circuit board; a plurality of processors mounted to the main printed circuit board; and a memory system accessible to the plurality of processors. The memory system includes a plurality of expansion sockets mounted to the printed circuit board, and a plurality of server memory cards removeably plugged into the plurality of expansion sockets. Each server memory card includes a master controller, a plurality of slave controllers, and a plurality of replaceable daughter-memory-cards with read-writeable non-volatile memory.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 21, 2016
    Inventors: Vijay Karamcheti, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9304908
    Abstract: A first portion of an asymmetric memory is configured as temporary storage for application data units with sizes corresponding to a small memory block that is smaller than the size of a logical write unit associated with the asymmetric memory. A portion of the remaining asymmetric memory is configured as a reconciled storage for application data units with varying sizes. A first application data unit is received for writing to the asymmetric memory. Based on computing the size of the first application data unit as corresponding to the small memory block, the first application data unit is written to the temporary storage. Upon determining that a threshold is reached, a memory write operation is performed for writing the application data units from the temporary storage to the reconciled storage. The application data units written to the reconciled storage are removed from the temporary storage.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: April 5, 2016
    Assignee: Virident Systems Inc.
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Swamy Gowda
  • Patent number: 9286002
    Abstract: Data is stored as a first collection of memory blocks distributed across a first set of memory devices. It is determined that a first memory device in the first set is in a degraded state. Data is recovered corresponding to a first memory block in the first collection of memory blocks that is stored in the first memory device, which is configured to include a first number of memory blocks. The recovered data is stored in a second memory device as a new memory block, which is added to the first collection of memory blocks. The first memory device is removed from the first set and reconfigured with a second number of memory blocks that is less than the first number of memory blocks. Memory blocks in a second collection of memory blocks distributed across a second set of memory devices is stored in the reconfigured first memory device.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 15, 2016
    Assignee: Virident Systems Inc.
    Inventors: Vijay Karamcheti, Swamy Gowda, Rajendra Prasad Mishra, Shibabrata Mondal