Patents by Inventor Shibing Long

Shibing Long has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120281452
    Abstract: The present disclosure provides a resistive random memory cell and a resistive random memory. The resistive random memory cell comprises an upper electrode, a resistive layer, an intermediate electrode, an asymmetric tunneling barrier layer, and a lower electrode. The upper electrode, the resistive layer, and the intermediate electrode constitute a resistive storage portion. The intermediate electrode, the asymmetric tunneling barrier layer, and the lower electrode constitute a selection portion. The resistive storage portion and the selection portion share the intermediate electrode. The selection portion may be disposed above or under the resistive storage portion. The asymmetric tunneling barrier layer comprises at least two materials having different barrier heights, and is configured for rectifying forward tunneling current and reverse tunneling current flowing through the resistive random memory cell.
    Type: Application
    Filed: June 30, 2011
    Publication date: November 8, 2012
    Inventors: Zongliang Huo, Ming Liu, Manhong Zhang, Yanhua Wang, Shibing Long
  • Publication number: 20120275220
    Abstract: The present disclosure relates to the field of microelectronics manufacture and memories. A three-dimensional multi-bit non-volatile memory and a method for manufacturing the same are disclosed. The memory comprises a plurality of memory cells constituting a memory array. The memory array may comprise: a gate stack structure; periodically and alternately arranged gate stack regions and channel region spaces; gate dielectric layers for discrete charge storage; periodically arranged channel regions; source doping regions and drain doping regions symmetrically arranged to each other; bit lines led from the source doping regions and the drain doping regions; and word lines led from the gate stack regions. The gate dielectric layers for discrete charge storage can provide physical storage spots to achieve single-bit or multi-bit operations, so as to achieve a high storage density.
    Type: Application
    Filed: June 30, 2011
    Publication date: November 1, 2012
    Inventors: Ming Liu, Chenxi Zhu, Zongliang Huo, Feng Yan, Qin Wang, Shibing Long
  • Publication number: 20120140543
    Abstract: The present invention relates to a one time programming memory and method of storage and manufacture of the same. It belongs to microelectronic memory technology and manufacture field. The one time programming memory comprises a diode (10) having a unidirectional conducting rectification characteristic and a variable-resistance memory (20) having a bipolar conversion characteristic. The diode (10) having the unidirectional conducting rectification characteristic and the variable-resistance memory (20) having the bipolar conversion characteristic are connected in series. The one time programming memory device of the present invention takes the bipolar variable-resistance memory (20) as a storage unit, programming the bipolar variable-resistance memory (20) into different resistance states so as to carry out multilevel storage, and takes the unidirectional conducting rectification diode (10) as a gating unit.
    Type: Application
    Filed: August 31, 2011
    Publication date: June 7, 2012
    Applicant: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Ming Liu, Qingyun Zuo, Shibing Long, Changqing Xie, Zongliang Huo