Abstract: A semiconductor storage device having a plurality of block-erase type non volatile memory chips classifies the memory chips into memory groups of a number equal to twice the number of buffer memories provided in the storage device and assigns logic sector addresses sequentially to sectors contained in one erase block of each memory group in such a manner that the logic sector addresses are sequenced in series to those in the corresponding erase block of the next succeeding memory group.

Abstract: When the number of times erasure is performed in a first erase block in which data is to be written exceeds a predetermined number of times, a second erase block is determined for replacing data in the first erase block with data in the second erase block, and the erase number (the number of times erasure is performed) stored in the second erase block is read into a buffer. If the erase number read into the buffer is less than a certain value, data stored in the second erase block is read into the buffer. The number of the second erase block is stored in a first offset of a sub address conversion table read into a work buffer, and the number of the first erase block is stored in a second offset to replace data in the first and second erase blocks with each other.

Abstract: A semiconductor storage device connectable to a host information processing apparatus having a flash memory section that stores data in sectors and wherein the flash memory section includes an address management table that stores information about the relation between logical sector numbers for data management in a host information processing apparatus and physical sector numbers for data management in the flash memory section. The flash memory section also includes a table state map that stores information about the physical locations at which the sector number information in the address management tables is stored. The semiconductor storage device also includes a flash memory control circuit for controlling data write and data read processing for the flash memory section.

Abstract: A memory card with block erasure-type nonvolatile memory units is connected to a host apparatus by an I/O interface. The memory includes a plurality of block-erasure type nonvolatile memory units, a control circuit for inputting/outputting data to the host apparatus and managing nonvolatile memory units and address data to the memory, and a programmable logic device which converts address data to select respective erasure blocks of nonvolatile memories in accordance with a program. The control circuit programs the programmable logic device so that the address data for selecting defective erasure blocks is converted to address data for selecting other usable erasure blocks.

Abstract: The storage device of the present invention comprises: an interface circuit, a memory comprising a plurality of block-erase type, nonvolatile memories, a control circuit for managing and controlling the memory, and an address conversion table. The control circuit searches for an erase block with an empty area and issues a command signal to the memory to cause the memory to apply voltage pulses to the selected erase block. The memory checks to determine whether or not the erase operation has been completed every time the voltage pulse is applied to the erase block, and if the erase operation has not been completed, the control unit issues another command signal to cause the memory to apply another voltage pulse to the erase block and thus determines the level of degradation of the erase characteristic of the erase block based on the number of voltage pulses applied to that erase block.

Abstract: A data storage device such as a PC card connectable to a system equipment comprises a memory means for storing data, and a memory controller for controlling data transfer between the memory means and the system equipment. The device further comprises a security system and a data input section. The data input section comprises cells made of a ferroelectric material for inputting a matching data, and a user can give a matching data before connecting the device to a personal computer or the like. The data input section needs no electric power source in order to input a matching data. When the data storage device is connected to the system equipment, the security system receives a matching data from the data input section and decides if the matching data agrees with a reference data provided beforehand. The security system prohibits access to a memory means in the device if the matching data is decided not to agree with the reference data.

Abstract: A semiconductor disk device includes an interface that connects to a host unit operating under DOS; a flash memory having at least one continuous data storage area for storing data; a control circuit that controls data input/output with the host unit through the interface and that manages addresses of the main memory, and a cache memory connected to the control circuit and accessible to the main memory through the control circuit. Data files supplied from the host unit are written in the data storage area beginning at the lowest available address and a directory entry file associated with a data file is written into the data storage area immediately following and contiguous to the data file. Additional data and directory entry files are similarly stored sequentially.

Abstract: A semiconductor disk device comprising a flash memory having a plurality of blocks, and a CPU for converting a logical sector address into a physical-logical block number and its offset value, for searching for a block and a data memory area in the flash memory based on the physical-logical block number and offset value, and for reading the content of the data memory area when no chain data is stored in an update data chain information memory area. The block comprises a physical-logical block memory area, a plurality of data memory areas for storing data, data status flag memory areas, one disposed corresponding to each of the data memory areas, for storing a data status flag that indicates whether the data memory area stores data, and update data chain information memory areas, one disposed corresponding to each of the data memory areas, for storing chain information indicative of the destination of data.

Abstract: A semiconductor disk device provided with a flash memory capable of performing a stable block erasing operation in a short time period wherein the variations in the erasing times from block to block are minimized. The semiconductor disk device includes: a flash memory having a data storage area and an erasing-condition storage area in which an erasing condition has been written in advance. A CPU is provided and functions as a memory controller. A voltage controlling circuit is provided for changing applied voltages VCC and VPP under the control of the CPU. The CPU has the power supply voltage calculating capability of comparing the erasing condition stored in the erasing-condition storage area of the flash memory with a predetermined reference condition, and determining an optimal power supply voltage for each block so that the actual erasing time for each block becomes equal to a minimized constant value.