Abstract: A wireless communication apparatus includes a power-supply apparatus configured to supply electric power to a load that is intermittently operated by using a battery as a power supply; and a control unit configured to control the power-supply apparatus, wherein the power-supply apparatus includes a capacitor; a switching unit capable of selectively forming a first path through which charging is performed from the battery to the capacitor and a second path through which the battery is connected in series with the capacitor, and wherein the control unit controls the switching unit so that the first path is formed during a period in which the load is idle and the second path is formed during a period in which the load is not idle, and thereby supplies the voltage of the sum of the battery voltage and the charged voltage of the capacitor in a non-idle period.

Abstract: A power amplifying apparatus includes an input terminal configured to receive an input signal, a first power amplifier biased for class A or class AB operation which is configured to amplify the input signal, an output terminal connected to an output of the first power amplifier, a second power amplifier biased for class C operation which is configured to receive and amplify a part of the input signal, and a switch connected between an output of the second power amplifier and the output terminal.

Abstract: A power amplifying apparatus includes an input terminal configured to receive an input signal, a first power amplifier biased for class A or class AB operation which is configured to amplify the input signal, an output terminal connected to an output of the first power amplifier, a second power amplifier biased for class C operation which is configured to receive and amplify a part of the input signal, and a switch connected between an output of the second power amplifier and the output terminal.

Abstract: A switch apparatus of the invention comprises a first input terminal, a second input terminal to which a second input signal having a level lower than a level of the first input signal is supplied, a first switch block for outputting the first input signal supplied from the first input terminal through a plurality of switching elements, a second switch block for outputting the second input signal supplied from the second input terminal through a plurality of switching elements; and a control terminal to which a control signal is supplied wherein the control signal controls the first switch block when outputting the first input signal, and controls the second switch block when outputting the second input signal, wherein the first switch block is configured to have a smaller number of switching elements than that of the second switch block.

Abstract: Disclosed is a digital signal processing portion that amplifies a high frequency signal resulting from digitally modulating data to be transmitted. An envelope detection portion (DETenv) generates the high frequency signal's envelope voltage. A comparator compares this envelope voltage with reference voltage Vref to generate two-state output. According to this two-state output, a power converter circuit converts power supply voltage Vbatt into power and outputs power supply voltage Vpa for a power amplifier. While the envelope voltage is larger than the reference voltage Vref, for example, the power supply voltage Vpa is changed from voltage V1 to V2 (larger than V1). In this manner, there are provided a high frequency power amplifier and a transmitter capable of decreasing distortion of transmission signals by means of a relatively simple technique.

Abstract: A power amplifying apparatus includes an input terminal configured to receive an input signal, a first power amplifier biased for class A or class AB operation which is configured to amplify the input signal, an output terminal connected to an output of the first power amplifier, a second power amplifier biased for class C operation which is configured to receive and amplify a part of the input signal, and a switch connected between an output of the second power amplifier and the output terminal.

Abstract: A power amplifier system includes a first power amplifier, a second harmonic generator, a phase shifter, and first and second adders. The first power amplifier amplifies a primary input signal. The second harmonic generator outputs a second harmonic by using a split part (signal) of the primary input signal as an input. The phase shifter adjusts a phase of the second harmonic. The first adder sums together a split signal of the primary input signal and an output of the phase shifter, thereby to produce an output. The second power amplifier uses the output of the first adder as an input. The second adder sums together an output of the first amplifier and an output of the second power amplifier, thereby to produce an output.

Abstract: Predistortion effective for a power amplifier with the memory effect is provided. An A/D converter digitizes a signal voltage value after quadrature modulation, and the result is supplied to a subtractor. A lookup table outputs voltage value data in accordance with an output of the subtractor. The output of the lookup table is used as address data for accessing respective lookup tables. The lookup tables output an accumulation adding value derived from multiplying, by impulse responses, the signal voltage value after quadrature modulation and supplies it to the subtractor. The voltage value data outputted from the lookup table is converted by a D/A converter to output it as a predistortion signal for amplitude component for the power amplifier.

Abstract: Disclosed is a distortion compensating and power amplifying apparatus including: a transistor to power amplifies an input signal; a branch circuit to branch the input signal into two signals; distortion compensation means for generating a second harmonic of a fundamental wave for one of branched signals and adding the generated second harmonic to the other branch signal from said branch circuit for input to an input terminal of said transistor; and a termination circuit connected to an output terminal of said transistor and grounding the second harmonic.

Abstract: One divided signal divided into two by a dividing circuit is inputted to a gate of a source grounded FET through a first matching circuit. In a drain of the FET, a second harmonic having a phase and an amplitude in accordance with an impedance of the first matching circuit is generated and extracted in a band pass filter and then the amplitude is adjusted in an attenuation circuit to input to an addition circuit through a second matching circuit. In the addition circuit, the output of the second matching circuit is added to another divided signal of the dividing circuit and inputted to a power amplifier. The impedance in the first matching circuit affecting the phase of the second harmonic generated from the FET is set so that a distortion component generated in the power amplifier is compensated for by the second harmonic inputted in the addition circuit.

Abstract: A power amplification apparatus includes, between a first amplification element for amplifying an input signal and a first output terminal, a second amplification element for further amplifying the input signal amplified in the first amplification element to output to the first output terminal, and a first switch element for controlling the second amplification element to be stop condition. Further, between the first amplification element and a second output terminal, a second switch circuit for controlling the supply of an output from the first amplification element to the second output terminal is provided. When outputting a medium power, the operation efficiency of the power amplification apparatus is improved by reducing a power consumption. Thereby, a total operation efficiency of the power amplification apparatus which outputs either the input signal amplified to a large power or the input signal amplified to a medium power by switching is improved.

Abstract: Disclosed is a digital signal processing portion that amplifies a high frequency signal resulting from digitally modulating data to be transmitted. An envelope detection portion (DETenv) generates the high frequency signal's envelope voltage. A comparator compares this envelope voltage with reference voltage Vref to generate two-state output. According to this two-state output, a power converter circuit converts power supply voltage Vbatt into power and outputs power supply voltage Vpa for a power amplifier. While the envelope voltage is larger than the reference voltage Vref, for example, the power supply voltage Vpa is changed from voltage V1 to V2 (larger than V1). In this manner, there are provided a high frequency power amplifier and a transmitter capable of decreasing distortion of transmission signals by means of a relatively simple technique.

Abstract: A method and apparatus for compensating for a distortion component of a device such as a power amplifier can be achieved without requiring a demodulator. A voltage controlling a gain of the amplitude of the input signal based on the amplitude control signal generated in the amplitude control signal generation step.

Abstract: Disclosed is a distortion compensating and power amplifying apparatus including: a transistor to power amplifies an input signal; a branch circuit to branch the input signal into two signals; distortion compensation means for generating a second harmonic of a fundamental wave for one of branched signals and adding the generated second harmonic to the other branch signal from said branch circuit for input to an input terminal of said transistor; and a termination circuit connected to an output terminal of said transistor and grounding the second harmonic.

Abstract: One divided signal divided into two by a dividing circuit is inputted to a gate of a source grounded FET through a first matching circuit. In a drain of the FET, a second harmonic having a phase and an amplitude in accordance with an impedance of the first matching circuit is generated and extracted in a band pass filter and then the amplitude is adjusted in an attenuation circuit to input to an addition circuit through a second matching circuit. In the addition circuit, the output of the second matching circuit is added to another divided signal of the dividing circuit and inputted to a power amplifier. The impedance in the first matching circuit affecting the phase of the second harmonic generated from the FET is set so that a distortion component generated in the power amplifier is compensated for by the second harmonic inputted in the addition circuit.

Abstract: A power amplification apparatus includes, between a first amplification element for amplifying an input signal and a first output terminal, a second amplification element for further amplifying the input signal amplified in the first amplification element to output to the first output terminal, and a first switch element for controlling the second amplification element to be stop condition. Further, between the first amplification element and a second output terminal, a second switch circuit for controlling the supply of an output from the first amplification element to the second output terminal is provided. When outputting a medium power, the operation efficiency of the power amplification apparatus is improved by reducing a power consumption. Thereby, a total operation efficiency of the power amplification apparatus which outputs either the input signal amplified to a large power or the input signal amplified to a medium power by switching is improved.

Abstract: A switch apparatus of the invention comprises a first input terminal, a second input terminal to which a second input signal having a level lower than a level of the first input signal is supplied, a first switch block for outputting the first input signal supplied from the first input terminal through a plurality of switching elements, a second switch block for outputting the second input signal supplied from the second input terminal through a plurality of switching elements; and a control terminal to which a control signal is supplied wherein the control signal controls the first switch block when outputting the first input signal, and controls the second switch block when outputting the second input signal, wherein the first switch block is configured to have a smaller number of switching elements than that of the second switch block.

Abstract: Predistortion effective for a power amplifier with the memory effect is provided. An A/D converter digitizes a signal voltage value after quadrature modulation, and the result is supplied to a subtractor. A lookup table outputs voltage value data in accordance with an output of the subtractor. The output of the lookup table is used as address data for accessing respective lookup tables. The lookup tables output an accumulation adding value derived from multiplying, by impulse responses, the signal voltage value after quadrature modulation and supplies it to the subtractor. The voltage value data outputted from the lookup table is converted by a D/A converter to output it as a predistortion signal for amplitude component for the power amplifier.

Abstract: To provide a distortion-compensating apparatus capable of stably determining update values when distortion-compensating data to be stored in an amplitude(gain)-compensation-data memory is updated corresponding to ambient temperatures in a distortion-compensating apparatus of an RF-power amplifying means. When updating adverse distortion data for an RF-power amplifying means 12 in a portable telephone or the like corresponding to ambient temperatures, envelope detection signals at input and output sides of the power amplifying means 12, the distortion-compensating apparatus digitizes the individual envelope signals, performs arithmetic operations to obtain the amount of a deviation from a linear gain by using arithmetic-operation means 20 and 21, and thereby updates adverse distortion data to be stored in amplitude-compensation-data memory 7, 7a, 7b.

Abstract: In a high-frequency amplifier circuit, a power detector detects input power, an A/D converter converts the detection output into a digital signal, and then a digital LPF averages the digital signal to obtain data of the average value of input power level. Control data corresponding to the data of the average value is supplied as a control voltage from a DC-to-DC converter controlling memory to a DC-to-DC converter via a D/A means. Thus, a low output voltage vdd is supplied from the DC-to-DC converter to a power amplifier as circuit supply voltage of the power amplifier at the times of medium and low output power to control unnecessary current consumption by the power amplifier and thereby increase efficiency of the power amplifier at the times of medium and low output power.