Patents by Inventor Shigeo Ohyama
Shigeo Ohyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11452465Abstract: Regarding acceleration on each of three axes Gx, Gy, and Gz calculated by a microcomputer, acceleration on one of the three axes is acceleration in a vertical direction perpendicular to the ground, and acceleration on each of the other two axes is acceleration in a direction parallel to the ground, the other two axes being perpendicular to each other. A type of action of the human body in a predetermined period is determined by comparing a predetermined threshold value with the acceleration in the vertical direction in the predetermined period.Type: GrantFiled: April 3, 2017Date of Patent: September 27, 2022Assignee: SHARP KABUSHIKI KAISHAInventors: Shigeo Ohyama, Hajime Kubota
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Patent number: 11322221Abstract: A memory device includes: a memory cell capable of holding data; and an ECC circuit capable of generating a correction code and detecting an error based on the correction code. The memory cell is accessed by a pipeline operation. The pipeline operation includes at least four pipeline stages including a read cycle reading data from the memory cell, an ECC cycle executing generation of the correction code or error detection for the memory cell in the ECC circuit, a wait cycle during which processing for data related to the memory cell is not executed, and a write cycle writing data into the memory cell.Type: GrantFiled: September 30, 2020Date of Patent: May 3, 2022Assignees: Sharp Semiconductor Innovation Corporation, TOHOKU UNIVERSITYInventors: Shigeo Ohyama, Tetsuo Endoh
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Publication number: 20220101939Abstract: A memory device includes: a memory cell capable of holding data; and an ECC circuit capable of generating a correction code and detecting an error based on the correction code. The memory cell is accessed by a pipeline operation. The pipeline operation includes at least four pipeline stages including a read cycle reading data from the memory cell, an ECC cycle executing generation of the correction code or error detection for the memory cell in the ECC circuit, a wait cycle during which processing for data related to the memory cell is not executed, and a write cycle writing data into the memory cell.Type: ApplicationFiled: September 30, 2020Publication date: March 31, 2022Inventors: SHIGEO OHYAMA, TETSUO ENDOH
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Patent number: 11187537Abstract: A travelling direction calculation apparatus includes an acceleration sensor, a period identification unit, an action determination unit, a vector calculator, and a travelling direction decision unit. The period identification unit identifies a stable measurement period and an idling leg period based on change in a vertical component of acceleration detected by the acceleration sensor. The action determination unit discriminates between walking and running by using the minimum value of the vertical component of the acceleration in the idling leg period. The vector calculator calculates a velocity vector from a horizontal component of the acceleration in the stable measurement period. The travelling direction decision unit decides a direction of traveling of a user based on a result of determination performed by the action determination unit and the velocity vector calculated by the vector calculator.Type: GrantFiled: April 22, 2019Date of Patent: November 30, 2021Assignee: SHARP KABUSHIKI KAISHAInventor: Shigeo Ohyama
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Patent number: 11187533Abstract: An advancement direction of a user who is walking is calculated with high accuracy. A period specifying unit specifies at least a part of a deceleration period, during which a horizontal component of acceleration is negative, as a stable deceleration period on the basis of a change of a vertical component of the acceleration, a deceleration vector calculation unit calculates a deceleration vector which indicates a deceleration direction in the stable deceleration period, and an advancement direction determination unit determines an advancement direction of a user on the basis of the deceleration vector.Type: GrantFiled: March 2, 2018Date of Patent: November 30, 2021Assignee: SHARP KABUSHIKI KAISHAInventors: Shigeo Ohyama, Shigeyuki Wakita
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Publication number: 20200284909Abstract: A TOF-system distance measuring sensor comprises: a light source unit that radiates light to a target as the irradiation light, the light being subjected to primary modulation so that the distance to the target can be measured and being subjected to secondary modulation so that influences of disturbance light are reduced; and a light receiving unit that receives the reflection light subjected to the secondary modulation and that subjects the reflection light subjected to the secondary modulation to secondary demodulation so that influences of disturbance light are reduced.Type: ApplicationFiled: March 3, 2020Publication date: September 10, 2020Inventor: SHIGEO OHYAMA
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Patent number: 10627237Abstract: An offset correction apparatus for a gyro sensor includes an acceleration sensor, a geomagnetic sensor, a stationary determination unit that determines, by using an output value of the acceleration sensor and an output value of the geomagnetic sensor, whether the gyro sensor is stationary, a difference calculation unit that calculates an offset value of the gyro sensor by using an output value of the gyro sensor, and an offset-value update unit that assumes, as a new offset value, an offset value calculated by the difference calculation unit by using an output value of the gyro sensor determined to be stationary by the stationary determination unit.Type: GrantFiled: September 29, 2018Date of Patent: April 21, 2020Assignee: SHARP KABUSHIKI KAISHAInventor: Shigeo Ohyama
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Publication number: 20200049503Abstract: [Object] An information processing device that calibrates offset and distortion with good precision, with a small amount of computation. [Solution] Provided is a mesh control unit (22) that generates a mesh that sections, into a plurality of regions, an orientation space where pieces of magnetism data collected from a magnetic sensor (11) are arrayed, based on components of the magnetism data, and stores the magnetism data in a storage unit (30) for each section. The number of sections in contact with a vertex of each of the multiple of sections is three or less.Type: ApplicationFiled: August 9, 2019Publication date: February 13, 2020Inventor: SHIGEO OHYAMA
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Publication number: 20200033126Abstract: An advancement direction of a user who is walking is calculated with high accuracy. A period specifying unit specifies at least a part of a deceleration period, during which a horizontal component of acceleration is negative, as a stable deceleration period on the basis of a change of a vertical component of the acceleration, a deceleration vector calculation unit calculates a deceleration vector which indicates a deceleration direction in the stable deceleration period, and an advancement direction determination unit determines an advancement direction of user on the basis of the deceleration vector.Type: ApplicationFiled: March 2, 2018Publication date: January 30, 2020Inventors: SHIGEO OHYAMA, SHIGEYUKI WAKITA
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Publication number: 20190323840Abstract: A travelling direction calculation apparatus includes an acceleration sensor, a period identification unit, an action determination unit, a vector calculator, and a travelling direction decision unit. The period identification unit identifies a stable measurement period and an idling leg period based on change in a vertical component of acceleration detected by the acceleration sensor. The action determination unit discriminates between walking and running by using the minimum value of the vertical component of the acceleration in the idling leg period. The vector calculator calculates a velocity vector from a horizontal component of the acceleration in the stable measurement period. The travelling direction decision unit decides a direction of traveling of a user based on a result of determination performed by the action determination unit and the velocity vector calculated by the vector calculator.Type: ApplicationFiled: April 22, 2019Publication date: October 24, 2019Inventor: SHIGEO OHYAMA
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Publication number: 20190120627Abstract: An offset correction apparatus for a gyro sensor includes an acceleration sensor, a geomagnetic sensor, a stationary determination unit that determines, by using an output value of the acceleration sensor and an output value of the geomagnetic sensor, whether the gyro sensor is stationary, a difference calculation unit that calculates an offset value of the gyro sensor by using an output value of the gyro sensor, and an offset-value update unit that assumes, as a new offset value, an offset value calculated by the difference calculation unit by using an output value of the gyro sensor determined to be stationary by the stationary determination unit.Type: ApplicationFiled: September 29, 2018Publication date: April 25, 2019Inventor: SHIGEO OHYAMA
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Publication number: 20190110717Abstract: Regarding acceleration on each of three axes Gx, Gy, and Gz calculated by a microcomputer, acceleration on one of the three axes is acceleration in a vertical direction perpendicular to the ground, and acceleration on each of the other two axes is acceleration in a direction parallel to the ground, the other two axes being perpendicular to each other. A type of action of the human body in a predetermined period is determined by comparing a predetermined threshold value with the acceleration in the vertical direction in the predetermined period.Type: ApplicationFiled: April 3, 2017Publication date: April 18, 2019Inventors: SHIGEO OHYAMA, HAJIME KUBOTA
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Patent number: 8555084Abstract: A data encryption device performs high-speed access to an arbitrary page when encrypting data and writing it to a storage device that can be accessed in a page unit or reading data therefrom and decrypting it. The device: encrypts data and writes it to the storage device or reads data from the storage device and decrypts it by a stream cipher; uses a counter mode of a block cipher to generate pseudorandom number series; specifies a data position in the storage device based on a page number and a page block number, by dividing one page into plural page blocks having a block length of the block cipher; and uses a value determined by a function of the page number, the page block number, and an arbitrary offset value, as an initial value of a pseudorandom number to be used in the counter mode.Type: GrantFiled: October 31, 2011Date of Patent: October 8, 2013Assignee: Sharp Kabushiki KaishaInventor: Shigeo Ohyama
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Patent number: 8291223Abstract: An arithmetic circuit capable of Montgomery multiplication using only a one-port RAM is disclosed. In a first read process, b[i] is read from a memory M2 of a sync one-port RAM for storing a[s?1: 0] and b[s?1: 0] and stored in a register R1. In a second read process, a[j] is read from the memory M2, t[j] from a memory M1 of a sync one-port RAM for storing t[s?1: 0], b[i] from the register R1, and a value RC from a register R2, and input to a sum-of-products calculation circuit for calculating t[j]+a[j]*b[i]+RC. In a write process, the calculation result data FH is written in the register R2, and the calculation result data FL in the memory M1 as t[j]. A first subloop process for repeating the second read process, the sum-of-products calculation process and the write process is executed after the first read process.Type: GrantFiled: January 12, 2010Date of Patent: October 16, 2012Assignee: Sharp Kabushiki KaishaInventor: Shigeo Ohyama
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Publication number: 20120191984Abstract: The invention provides a data encryption device that can perform high-speed access to an arbitrary page when encrypting data and writing it to a storage device that can be accessed in a page unit or reading data therefrom and decrypting it. The device: encrypts data and writes it to the storage device or reads data from the storage device and decrypts it by a stream cipher; uses a counter mode of a block cipher to generate pseudorandom number series; specifies a data position in the storage device based on a page number and a page block number, by dividing one page into plural page blocks having a block length of the block cipher; and uses a value determined by a function of the page number, the page block number, and an arbitrary offset value, as an initial value of a pseudorandom number to be used in the counter mode.Type: ApplicationFiled: October 31, 2011Publication date: July 26, 2012Inventor: Shigeo OHYAMA
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Patent number: 8176387Abstract: An error detection control system for a nonvolatile memory comprises: a nonvolatile memory having data areas for a plurality of addresses each including a main data area and a redundant data area for one address; memory control means for controlling on the nonvolatile memory a batch erasing process on a data area group basis, a reading process on the data area basis, a programming process on the data area basis, and an overwriting process on a bit basis; error detecting means for executing the error detecting process based upon the corresponding redundant data; error detecting control means for controlling availability of execution of the error detecting process based upon data types to be classified depending on whether or not the data is subjected to the overwriting process or a storage state indicating whether or not the overwriting process has been executed.Type: GrantFiled: March 13, 2008Date of Patent: May 8, 2012Assignee: Sharp Kabushiki KaishaInventor: Shigeo Ohyama
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Patent number: 8001292Abstract: A data transfer controlling device is mounted in an IC card having: a communication device for data communication with an external device; a memory device for storing data received from and transmitted to the external device; and an operation processing device for controlling the memory device and the communication device, and controls a data transfer process. The controlling device comprises: a status information acquiring section for acquiring status information including at least error detection information from the communication device; a determination section for determining whether or not the data transfer process can be executed based on the status information acquired by the status information acquiring section when the data transfer process is being executed; and a data transfer process executing section for executing the data transfer process in accordance with a result of determination as to whether or not the data transfer process can be executed by the determination section.Type: GrantFiled: December 15, 2008Date of Patent: August 16, 2011Assignee: Sharp Kabushiki KaishaInventor: Shigeo Ohyama
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Patent number: 7962965Abstract: There is a provided a semiconductor device having a high security whose power consumption is difficult to analyze even without setting up random characteristic to the processing time. The semiconductor device includes a target circuit (14), a sub-target circuit (15) having the same circuit configuration as the target circuit (14), and a dummy bit string generation circuit (11) for generating a bit string of a dummy serial input signal to be inputted to the sub-target circuit (15) according to the bit string of the serial input signal of the target circuit (14).Type: GrantFiled: May 9, 2005Date of Patent: June 14, 2011Assignee: Sharp Kabushiki KaishaInventor: Shigeo Ohyama
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Publication number: 20100183145Abstract: An arithmetic circuit capable of Montgomery multiplication using only a one-port RAM is disclosed. In a first read process, b[i] is read from a memory M2 of a sync one-port RAM for storing a[s?1: 0] and b[s?1: 0] and stored in a register R1. In a second read process, a[j] is read from the memory M2, t[j] from a memory M1 of a sync one-port RAM for storing t[s?1: 0], b[i] from the register R1, and a value RC from a register R2, and input to a sum-of-products calculation circuit 10 for calculating t[j]+a[j]*b[j]+RC. In a write process, the calculation result data FH is written in the register R2, and the calculation result data FL in the memory M1 as t[j]. A first subloop process for repeating the second read process, the sum-of-products calculation process and the write process is executed after the first read process.Type: ApplicationFiled: January 12, 2010Publication date: July 22, 2010Inventor: Shigeo OHYAMA
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Publication number: 20100083050Abstract: An error detection control system for a nonvolatile memory comprises: a nonvolatile memory having data areas for a plurality of addresses each including a main data area and a redundant data area for one address; memory control means for controlling on the nonvolatile memory a batch erasing process on a data area group basis, a reading process on the data area basis, a programming process on the data area basis, and an overwriting process on a bit basis; error detecting means for executing the error detecting process based upon the corresponding redundant data; error detecting control means for controlling availability of execution of the error detecting process based upon data types to be classified depending on whether or not the data is subjected to the overwriting process or a storage state indicating whether or not the overwriting process has been executed.Type: ApplicationFiled: March 13, 2008Publication date: April 1, 2010Applicant: Sharp Kabushiki KaishaInventor: Shigeo Ohyama