Abstract: The high voltage transistor includes a first impurity layer, a second impurity layer formed inside the first impurity layer, so as to put the second impurity layer between them, a pair of third impurity layers and fourth impurity layers formed inside the first impurity layer, a fifth impurity layer formed from the uppermost surface of the first impurity layer to the inside of the first impurity layer so as to protrude along the main surface in the direction where the second impurity layer is disposed, and a conductive layer formed above the uppermost surface of the second impurity layer. The concentration of the impurity in the fourth impurity layer is higher than the concentration of the impurity in the third and the fifth impurity layers, and the concentration of the impurity in the fifth impurity layer is higher than the concentration of the impurity in the third impurity layer.

Abstract: A plurality of first wiring layers are arranged on a main surface of a substrate, a first insulating film is arranged on upper faces of the plurality of first wiring layers, a second insulating film is arranged on an upper face of the first insulating film, and a plurality of second wiring layers are arranged on the second insulating film. A metal resistive element layer is arranged just below at least one second wiring layer among the plurality of second wiring layers. A plurality of conductive layers extend from the plurality of second wiring layers respectively to the metal resistive element layer in a Z direction perpendicular to the main surface. The metal resistive element layer includes a metal wiring layer. At least one part of a side face of at least one conductive layer among the plurality of conductive layers is connected to the metal wiring layer.

Abstract: To provide a semiconductor device that can be manufactured using a simple process without ensuring a high embedding property; and a manufacturing method of the device. In the manufacturing method of the semiconductor device according to the invention, a semiconductor substrate having a configuration obtained by stacking a support substrate, a buried insulating film, and a semiconductor layer in order of mention is prepared first. Then, an element having a conductive portion is completed over the main surface of the semiconductor layer. A trench encompassing the element in a planar view and reaching the buried insulating film from the main surface of the semiconductor layer is formed. A first insulating film (interlayer insulating film) is formed over the element and in the trench to cover the element and form an air gap in the trench, respectively. Then, a contact hole reaching the conductive portion of the element is formed in the first insulating film.

Abstract: The high voltage transistor includes a first impurity layer, a second impurity layer formed inside the first impurity layer, so as to put the second impurity layer between them, a pair of third impurity layers and fourth impurity layers formed inside the first impurity layer, a fifth impurity layer formed from the uppermost surface of the first impurity layer to the inside of the first impurity layer so as to protrude along the main surface in the direction where the second impurity layer is disposed, and a conductive layer formed above the uppermost surface of the second impurity layer. The concentration of the impurity in the fourth impurity layer is higher than the concentration of the impurity in the third and the fifth impurity layers, and the concentration of the impurity in the fifth impurity layer is higher than the concentration of the impurity in the third impurity layer.

Abstract: To provide a semiconductor device that can be manufactured using a simple process without ensuring a high embedding property; and a manufacturing method of the device. In the manufacturing method of the semiconductor device according to the invention, a semiconductor substrate having a configuration obtained by stacking a support substrate, a buried insulating film, and a semiconductor layer in order of mention is prepared first. Then, an element having a conductive portion is completed over the main surface of the semiconductor layer. A trench encompassing the element in a planar view and reaching the buried insulating film from the main surface of the semiconductor layer is formed. A first insulating film (interlayer insulating film) is formed over the element and in the trench to cover the element and form an air gap in the trench, respectively. Then, a contact hole reaching the conductive portion of the element is formed in the first insulating film.

Abstract: Provided is a semiconductor device about which the reliability thereof is certainly kept even when a void is generated in a buried film in its trench. A rectangular element formation region is formed in a silicon layer. A trench having a predetermined width is formed to surround the element formation region. A first TEOS film and a second TEOS film are buried in the trench. A protecting film is formed at an L-shaped intersection region of the trench.

Abstract: First active regions and second active regions intersecting the first active regions at a right angle are defined on the surface of a semiconductor substrate, and diffusion regions are formed in the first and second active regions to interpose an intersecting region therebetween. Then, a gate structure is formed linearly to extend over the intersecting region at a non-zero angle with respect to the first and second active regions. Further, terminals to be connected to metal interconnects are provided on the diffusion regions at a non-zero angle with respect to the first and second active regions, respectively. Consequently provided is a nonvolatile semiconductor memory having a simple gate structure capable of storing 4-bits of information in one memory cell.

Abstract: First active regions and second active regions intersecting the first active regions at a right angle are defined on the surface of a semiconductor substrate, and diffusion regions are formed in the first and second active regions to interpose an intersecting region therebetween. Then, a gate structure is formed linearly to extend over the intersecting region. Further, terminals to be connected to metal interconnects are provided on the diffusion regions, respectively. Consequently provided is a nonvolatile semiconductor memory having a simple gate structure capable of storing 4-bits of information in one memory cell.

Abstract: A semiconductor chip is produced through dicing without removing a conductive film for forming an interconnection and the like from a dicing line region. A prescribed insulating sheet member is adhered to this semiconductor chip at its back face, and the back face and the side face of semiconductor chip, and part of a front face along the periphery of semiconductor chip are covered by insulating sheet member. Thus, even when the conductive film in the dicing line region is curled up by dicing and a burr is resulted at the periphery of semiconductor chip, burr is covered by insulating sheet member to prevent a wire and burr from directly contacting to each other. Thus, a semiconductor device in which an electrical short circuit is prevented without removing a conductive film from a dicing line can be obtained.