Abstract: A method for forming a wiring structure includes forming a metal layer on a substrate, and annealing the metal layer by irradiating the metal layer with light emitted from at least one flash tube, thereby growing crystalline grains of the metal layer.

Abstract: An organic transistor comprising: at least a gate electrode and a gate insulating layer formed on the gate electrode, the gate insulating layer including, on a surface of the gate electrode, a stacked molecular film composed of a first organic molecular layer binding in a direction substantially perpendicular to the surface of the gate electrode through a first covalent bond and a second organic molecular layer binding to an unreacted end of the first organic molecular layer through a second covalent bond, wherein the second covalent bond and another second covalent bond adjacent to each other form a hydrogen bond in a direction of a surface perpendicular to a major axis direction of the stacked molecule.

Abstract: A method for forming a wiring structure includes forming a metal layer on a substrate, and annealing the metal layer by irradiating the metal layer with light emitted from at least one flash tube, thereby growing crystalline grains of the metal layer.

Abstract: An organic thin-film transistor of the present invention has a gate electrode, a gate insulating film, a source electrode, a drain electrode, and an organic semiconductor layer provided above a substrate, and further has a thiol compound layer composed of a benzenethiol compound and provided on a surface of the source electrode and a thiol compound layer composed of a benzenethiol compound and provided on a surface of the drain electrode. This makes it possible to provide an organic thin-film transistor whose threshold voltage can be selectively controlled without greatly affecting a current characteristic other than the threshold voltage.

Abstract: A method for forming a wiring structure includes forming a metal layer on a substrate, and annealing the metal layer by irradiating the metal layer with light emitted from at least one flash tube, thereby growing crystalline grains of the metal layer.

Abstract: A method of forming a metallic wiring layer in a selected region of a layer-stacked plate, which includes the first process of introducing gas consisting of organometallic molecules into a reaction chamber having a layer-stacked plate arranged therein, and forming an adsorbed molecular layer composed of the organometallic molecules on the layer-stacked plate; the second process of reducing the concentration of the gas in the reaction chamber or exhausting the reaction chamber, after forming the adsorbed molecular layer; the third process of carrying a light irradiation against a selected region on the layer-stacked plate; the fourth process of removing the adsorbed molecular layer formed in the region other than the selected region, from the layer-stacked plate; and the fifth process of forming a metallic film in the selected region.

Abstract: An interconnect forming method according to the present invention includes a step of forming a barrier film for metal diffusion on an insulator film, a step of selectively forming a metal seed layer on the barrier film for metal diffusion using an electroless plating process, a step of selectively forming a metal conductive layer on the metal seed layer using an electroplating process, and a step of etching the barrier film for metal diffusion using the metal conductive layer as a mask.

Abstract: A method of forming a copper wiring layer, which includes forming a pattern of copper seed layer on a substrate, and forming a copper wiring pattern on the pattern of copper seed layer by means of electroless plating. At least one component of semiconductor device selected from the group consisting of the gate electrode, the source electrode, the drain electrode, and a wiring connected with at least one of these electrodes is formed by a method comprising forming a pattern of copper seed layer, and forming a copper wiring pattern on the pattern of copper seed layer by means of electroless plating.

Abstract: A method of forming a metallic wiring layer in a selected region of a layer-stacked plate, which includes the first process of introducing gas consisting of organometallic molecules into a reaction chamber having a layer-stacked plate arranged therein, and forming an adsorbed molecular layer composed of the organometallic molecules on the layer-stacked plate; the second process of reducing the concentration of the gas in the reaction chamber or exhausting the reaction chamber, after forming the adsorbed molecular layer; the third process of carrying a light irradiation against a selected region on the layer-stacked plate; the fourth process of removing the adsorbed molecular layer formed in the region other than the selected region, from the layer-stacked plate; and the fifth process of forming a metallic film in the selected region.

Abstract: An interconnect forming method according to the present invention includes a step of forming a barrier film for metal diffusion on an insulator film, a step of selectively forming a metal seed layer on the barrier film for metal diffusion using an electroless plating process, a step of selectively forming a metal conductive layer on the metal seed layer using an electroplating process, and a step of etching the barrier film for metal diffusion using the metal conductive layer as a mask.

Abstract: An interconnect forming method according to the present invention includes a step of forming a barrier film for metal diffusion on an insulator film, a step of selectively forming a metal seed layer on the barrier film for metal diffusion using an electroless plating process, a step of selectively forming a metal conductive layer on the metal seed layer using an electroplating process, and a step of etching the barrier film for metal diffusion using the metal conductive layer as a mask.

Abstract: A thin film two-terminal element is formed by laminating a protruding portion of a second conductor layer on a first conductor layer via a nonlinear resistor layer. An insulator layer is positioned between the first conductor layer and the second conductor layer except a region to become the thin film two-terminal element. Therefore, the allowance of the relative position of the second conductor layer with respect to the first conductor layer and the nonlinear resistor layer is considerably large as compared with that of prior art, and it is possible to ensure a requisite alignment margin with respect to deformation of the substrate in the production process.

Abstract: An interconnect forming method according to the present invention includes a step of forming a barrier film for metal diffusion on an insulator film, a step of selectively forming a metal seed layer on the barrier film for metal diffusion using an electroless plating process, a step of selectively forming a metal conductive layer on the metal seed layer using an electroplating process, and a step of etching the barrier film for metal diffusion using the metal conductive layer as a mask.

Abstract: A thin film two-terminal element is formed by laminating a protruding portion of a second conductor layer on a first conductor layer via a nonlinear resistor layer. An insulator layer is positioned between the first conductor layer and the second conductor layer except a region to become the thin film two-terminal element. Therefore, the allowance of the relative position of the second conductor layer with respect to the first conductor layer and the nonlinear resistor layer is considerably large as compared with that of prior art, and it is possible to ensure a requisite alignment margin with respect to deformation of the substrate in the production process.

Abstract: A thin-film two-terminal element including first metal film functioning as a wiring layer and a first electrode, a first insulating film formed on the first electrode of the first metal film and having a non-linear resistance property, a second metal film formed on the first insulating film and functioning as a second electrode, and a third metal film formed in a wire layer portion of the first metal film and having a smaller stress and a smaller electrical resistance than the first metal film, and a thin-film two-terminal element including, on a resinous substrate as an insulative substrate, a first metal film functioning as a wiring layer and a first electrode, a first insulating film formed on the first electrode of the first metal film and having a non-linear resistance property, a second metal film formed on the first insulating film and functioning as a second electrode, and a second insulating film formed under the second metal film except on a portion thereof which electrically functions with the firs

Abstract: The liquid crystal display apparatus of the invention includes a device-formed substrate, a counter substrate, and a liquid crystal layer interposed therebetween. The device-formed substrate includes: a plurality of display electrodes for applying display voltages to the liquid crystal layer; a plurality of active devices for supplying the display voltages to the plurality of display electrodes, respectively; and image inputting devices for inputting an image. In the liquid crystal display apparatus, image processing means is provided for processing the image input by the image inputting devices.

Abstract: A color display device includes a display medium; a display-side substrate including electrodes for driving the display medium; a counter substrate opposed to the display-side substrate with the display medium therebetween and including electrodes or driving the display medium; a first absorptive color filter provided on the display-side substrate; a second reflective color filter provided on a face opposite to the display-side substrate of the first color filter for reflecting light having a complementary color of light transmitted through the first color filter; and reflecting means provided on a face opposite to the first color filter of the second color filter.

Abstract: A liquid crystal display device comprises: a first substrate formed with a plurality of liquid crystal driving active elements; first, second and third liquid crystal cells stacked in this order on an inter-layer film formed on the first substrate; and a second substrate disposed on the third liquid crystal cell with intervention of a planarizing film; wherein the first, second and third liquid crystal cells each have a counter electrode, a liquid crystal layer and a driving electrode connected to a corresponding one of the liquid crystal driving active elements formed on the first substrate, and are each electrically isolated by an insulating layer from the counter electrode and driving electrode of an adjacent liquid crystal cell.

Abstract: A full-color liquid crystal display device is provided which includes: a first substrate formed with a plurality of liquid crystal driving active elements; and first, second and third liquid crystal cells stacked one on another on an inter-layer film formed on the first substrate; the first liquid crystal cell including a first liquid crystal driving electrode connected to a first liquid crystal driving active element formed on the first substrate; the second liquid crystal cell formed on the second substrate and including a second liquid crystal driving electrode connected to a second liquid crystal driving active element formed on the first substrate via a lower stereo-interconnection extending through the first liquid crystal cell; the third liquid crystal cell formed on the third substrate and including a third liquid crystal driving electrode connected to a third liquid crystal driving active element formed on the first substrate via another lower stereo-interconnection extending through the first liquid

Abstract: A method for fabricating a thin film transistor includes the steps of: forming a semiconductor layer and a gate electrode on an insulating substrate with a gate insulating film interposed therebetween; and implanting an impurity element into a surface of the semiconductor layer by accelerating hydrogen ions and ions of an element of the group III or the group V of the periodic table using at least one of the gate electrode and a resist mask used for forming the gate electrode as a mask, so as to perform both formation of source and drain regions and hydrogenation of a channel region, wherein the concentration of hydrogen ions in the channel region of the semiconductor layer is regulated in the range of 1.times.10.sup.19 ions/cm.sup.3 to 1.times.10.sup.20 ions/cm.sup.3.