Abstract: A stereoscopic feeling can be easily emphasized by properly applying seven items of: a front/rear feeling and depth feeling circuit 14 constructed by a front/rear feeling to shift a position of an image in the horizontal direction on the basis of edge information of a video signal and add to a binocular parallax and a depth feeling to set a center fusion image plane to a position behind a display surface; a glossy feeling and contrast emphasizing circuit 15 for detecting a glossy portion of the video signal and emphasizing a contrast of a single eye and both eyes in the glossy portion; a V aperture control and coring sharpness circuit 16 constructed by a vertical aperture control to raise frequencies of a middle low band or higher at a change point in the vertical direction and a coring sharpness to give a sharpness to only an edge having a large amplitude and high frequency components; and a color emphasizing circuit 17 for emphasizing color contrasts of colors other than a skin color.

Abstract: A method and an apparatus for manufacturing a semiconductor integrated circuit in which semiconductor elements (2) and a wiring structure connecting the semiconductor elements (2) one another are located on a semiconductor substrate (1). In the method or apparatus, a series of wiring elements (4,6,7,9,10), each of which constructs the wiring structure is formed sequentially, then the semiconductor integrated circuit under manufacturing process is washed by neutral solution containing oxidant during the process of forming of the wiring elements (4,6,7,9,10).

Abstract: When a 2-dimensional video image is displayed, a front/rear feeling and a stereoscopic feeling are enabled to be expressed. A detection signal Sd is formed by a high pass filter 25 and a rectifying circuit 26 in accordance with an amount of edge information. The detection signal Sd is supplied to a variable delay circuit 14L. A detection signal Sd′ is supplied to a variable delay circuit 14R. The variable delay circuits 14L and 14R are controlled in accordance with the edge information amount so that a video image for the left eye and a video image for the right eye are moved in the opposite directions. Thus, an imaginary image is synthesized to the front or rear side from a display plane. The left and right video images are displayed on CRTs 20L and 20R. The projection light passes through a horizontal polarizing filter 21L and a vertical polarizing filter 21R and the left and right video images are overlapped on a screen 22.

Abstract: A method and an apparatus for manufacturing a semiconductor integrated circuit in which semiconductor elements (2) and a wiring structure connecting the semiconductor elements (2) one another are located on a semiconductor substrate (1). In the method or apparatus, a series of wiring elements (4,6,7,9,10), each of which constructs the wiring structure is formed sequentially, then the semiconductor integrated circuit under manufacturing process is washed by neutral solution containing oxidant during the process of forming of the wiring elements (4,6,7,9,10).

Abstract: A semiconductor integrated circuit structure includes a semiconductor substrate; an electronic element disposed in the substrate; a first electrically insulating layer disposed on the substrate and the electronic element; a first electrically conducting interconnection layer electrically connected to the electronic element and disposed at least partly on the first electrically insulating layer; a second electrically insulating layer disposed on the first electrically conducting interconnection layer; a second electrically conducting interconnection layer disposed on the second electrically insulating layer; and a through-hole penetrating the second electrically insulating layer to the first electrically conducting interconnection layer, part of the second interconnection layer being disposed within the through-hole and contacting the first electrically conducting interconnection layer wherein the first electrically conducting interconnection layer includes a current barrier including at least one opening in t

Abstract: A semiconductor device allowing the manufacturing process to be simplified and fine structures therein to be readily formed and a manufacturing method thereof are provided. In the semiconductor device, a conductive layer is used as a mask during etching for forming a first opening.

Abstract: A first polycide lead, which is formed on a silicon substrate, consists of a first doped polysilicon layer and a first tungsten silicide layer that is formed on the first doped polysilicon layer. An interlayer insulating film, which is formed on the silicon substrate, has an opening that reaches the first doped polysilicon layer. A second polycide lead, which is formed on the interlayer insulating film, consists of a second doped polysilicon layer that is connected to the first polycide lead in the opening and a second tungsten silicide layer that is formed on the second doped polysilicon layer. In the opening, the first and second doped polysilicon layers are in contact with each other at the side surfaces of the first polycide lead.

Abstract: A method of manufacturing a semiconductor device is provided superior in planarization, crack resistance, and moisture resistance, and with no corrosion in wiring while the manufacturing cost is suppressed without increasing the number of manufacturing steps in forming an interlayer film therein. This method includes the step of forming a silicon oxide film on a substrate so as to cover a first wiring formed with a silicon oxide film therebetween. A thick-film inorganic SOG film is coated on the silicon oxide film, and then a thermal treatment is applied. Next, a silicon oxide film is formed, and a via hole is formed according to a predetermined mask. By carrying out a thermal treatment at the temperature of 150.about.550.degree. C. and at the pressure of not more than 10.sup.-3 Torr with a portion of the thick-film inorganic SOG film exposed at a side surface of the via hole, residual gas such as CO.sub.2, and H.sub.2 O adsorbed to the side surface of the via hole is released.

Abstract: In a semiconductor device and a method of fabrication thereof, a resin film forms an interlayer film of the semiconductor device having a multilayer interconnection structure, and is formed by only one coating using coating liquid containing silicone ladder polymers represented by the chemical formula: (HO).sub.2 (R.sub.2 Si.sub.2 O.sub.3).sub.n H.sub.2. As a result, it is possible to improve long-term reliability of electric characteristics or the like, and simplify a process.

Abstract: In a semiconductor device and a method of fabrication thereof, a resin film forms an interlayer film of the semiconductor device having a multilayer interconnection structure, and is formed by only one coating using coating liquid containing silicone ladder polymers represented by the chemical formula: (HO).sub.2 (R.sub.2 Si.sub.2 O.sub.3).sub.n H.sub.2. As a result, it is possible to improve long-term reliability of electric characteristics or the like, and simplify a process.

Abstract: A semiconductor integrated circuit structure includes a semiconductor substrate; an electronic element disposed in the substrate; a first electrically insulating layer disposed on the substrate and the electronic element; a first electrically conducting interconnection layer electrically connected to the electronic element and disposed at least partly on the first electrically insulating layer; a second electrically insulating layer disposed on the first electrically conducting interconnection layer; a second electrically conducting interconnection layer disposed on the second electrically insulating layer; and a through-hole penetrating the second electrically insulating layer to the first electrically conducting interconnection layer, part of the second interconnection layer being disposed within the through-hole and contacting the first electrically conducting interconnection layer wherein the first electrically conducting interconnection layer includes a current barrier including at least one opening in t

Abstract: In a semiconductor device and a method of fabrication thereof, a resin film forms an interlayer film of the semiconductor device having a multilayer interconnection structure, and is formed by only one coating using coating liquid containing silicone ladder polymers represented by the chemical formula: (HO).sub.2 (R.sub.2 Si.sub.2 O.sub.3).sub.n H.sub.2. As a result, it is possible to improve long-term reliability of electric characteristics or the like, and simplify a process.

Abstract: A passive state film is formed on a surface of a bonding pad as follows: A silicon substrate 71 is immersed in solution continuously supplied with ozone. Since ozone is continuously supplied, it is possible to maintain the concentration of the dissolved ozone in the solution above a predetermined concentration. Therefore, it is possible to make the speed of formation of the passive state film higher than the speed of fusion of aluminum, which is a main constituent of the bonding pad. Accordingly, it is possible to form a passive state film with no pinholes.

Abstract: A semiconductor device has a conductive interconnection layer formed on a semiconductor substrate covered with a protection insulation film. A pad electrode opening is provided in the protection insulation film so that the surface of the conductive interconnection layer is exposed in the region which becomes the pad electrode. The conductive interconnection layer is electrically connected to an external terminal by a bonding wire. At least the surface of the protection insulation film in the proximity of the pad electrode opening and the inner peripheral side face of the pad electrode opening are covered with an elastic insulation film. The pad electrode opening is covered with the bonding wire. Since the conductive interconnection layer is not exposed at the pad electrode opening according to this structure, the phenomenon of moisture intruding into the pad electrode opening to corrode the conductive interconnection layer is prevented to improve reliability.

Abstract: Disclosed herein is a semiconductor device having a multilayer interconnection structure, which is provided with a plurality of via holes having constant diameters. Patterns of a first interconnection layer are provided on a semiconductor substrate. An interlayer insulating film is provided over the semiconductor substrate, to cover the patterns of the first interconnection layer. A silicon ladder resin film is applied onto the surface of the interlayer insulating film, to flatten the same. First and second via holes are provided through the silicon ladder resin film and the interlayer insulating film, to expose first and second coupling portions provided on the surfaces of the patterns of the first interconnection layer. A second interconnection layer is provided over the semiconductor substrate, to be connected with the first and second coupling portions through the first and second via holes respectively.

Abstract: A feedback clamping circuit effects a clamping control by utilizing a digital information or noise detection. Even when a source is a VTR, disc or the like having a large noise amount, a stable clamping operation can be effected by controlling a gain or dead area width of a feedback loop in response to an identified result of a digital control code signal previously involved in an input signal or detected result of a noise amount contained in the input signal.

Abstract: A surface of a first aluminum interconnection layer in a connection hole is exposed to a plasma of oxygen or fluorine-containing gas during the forming step of the connection hole. In order to remove the thin deterioration layer which forms as a result, sputter etching is effected by an argon ion. There are residual particles of the oxide and fluoride of aluminum on the surface of the first aluminum interconnection layer. A titanium layer is formed on the insulating layer to be in contact with the surface of the first aluminum layer through the through hole. A titanium compound layer is formed on the titanium layer. A second aluminum layer is formed on the titanium compound layer. A heat treatment is effected to decompose the residual particles and to form an intermetallic compound (TiAl.sub.3).

Abstract: In a semiconductor device, an impurity diffused layer serving as an active region is formed in a predetermined region of the surface of a semiconductor substrate of silicon, an underlayer insulating film is formed on the semiconductor substrate for the purpose of protecting and stabilizing the surface of the semiconductor substrate, and an interconnection electrically connected to the impurity diffused layer through a contact hole and formed on an Al-Si-Sn alloy, an Al-Si-Sb alloy or alloys having Ti added to the respective alloys, so that occurrence of an alloy pit and a silicon nodule is prevented. In addition, a completed protective film is formed on the interconnection and the underlayer insulating film and an aperture in a bonding pad region is formed in a predetermined region of the completed protective film, so that the interconnection and the bonding pad are electrically connected to each other.

Abstract: A semiconductor integrated circuit device has an interconnection structure in which multilayer aluminum interconnection layers are connected through connection holes. A first aluminum interconnection layer is formed on a main surface of the semiconductor substrate. The first aluminum interconnection layer has a surface layer which includes any of high melting point metal, high melting point metal compound, high melting point metal silicide, or amorphous silicon. An insulating layer is formed on the first aluminum interconnection layer, and has a through hole if formed extending to a surface of the first aluminum interconnection layer. A second aluminum interconnection layer is formed on the insulating layer and is electrically connected to the surface layer of the first aluminum interconnection layer through the through hole. The second aluminum interconnection layer includes a titanium layer, a titanium nitride layer and an aluminum alloy layer.

Abstract: A semiconductor device has a conductive interconnection layer formed on a semiconductor substrate covered with a protection insulation film. A pad electrode opening is provided in the protection insulation film so that the surface of the conductive interconnection layer is exposed in the region which becomes the pad electrode. The conductive interconnection layer is electrically connected to an external terminal by a bonding wire. At least the surface of the protection insulation film in the proximity of the pad electrode opening and the inner peripheral side face of the pad electrode opening are covered with an elastic insulation film. The pad electrode opening is covered with the bonding wire. Since the conductive interconnection layer is not exposed at the pad electrode opening according to this structure, the phenomenon of moisture intruding into the pad electrode opening to corrode the conductive interconnection layer is prevented to improve reliability.