Abstract: An image pick-up apparatus includes an image pick-up device and a filter circuit. The image pick-up device includes a pixel portion for converting a subject image into an electric signal, a scanning circuit for dividing the pixel portion into a plurality of areas, for non-linearly dividing the boundary of the areas of at least one side of the adjacent areas based on the unit of pixel, and a plurality of output circuits for individually outputting video signals. The filter circuit performs filter processing of the video signals outputted from the plurality of output circuits for the pixels near the boundary of the areas. Thus, the image quality can be improved in the multi-channel output system.

Abstract: A solid-state image pickup apparatus including a hermetic seal portion having a strong and reliable frame part capable of reducing mixture with bubbles and of being adjusted in height is formed such that an adhesive layer for forming the frame part to which a filler is added is adhered to a sealing region of edge portions on a solid-state image pickup device chip with excluding a light receiving portion thereof and a transparent member such as of glass is adhered onto the adhesive layer.

Abstract: A solid-state image pickup apparatus having over solid-state image pickup device chip a hermetic seal portion comprising a flat-plate portion of a transparent member and a frame portion formed on a side portion of a lower surface of the flat-plate portion, said frame portion including a metal wiring, a bump formed on said solid-state image pickup device chip and electrically connected to the metal wiring, and a sealing region for sealing the periphery of the bump by a sealing material, thereby achieving the solid-state image pickup apparatus capable of being packaged in a relatively small size and capable of improving throughput and at the same time having a hermetic seal portion which can be readily electrically connected to an external terminal.

Abstract: An XY-address solid-state image pickup apparatus comprises a pixel array made up a plurality of pixels two-dimensionally arranged and horizontal and vertical scanning circuits for reading the signal from the pixel array. Each scanning circuit comprises a plurality of unit stages cascaded, each unit stage comprising a plurality of first shift register units cascaded and a single second shift register unit which is associated with the plurality of first shift register units and which is driven by a clock different from the clock that drives the plurality of first shift register units. Each unit stage further comprises a first switch and a second switch. The input to the first unit of the first shift register units is also fed to the second shift register unit via the first switch. The output of the second shift register unit is fed to each of the plurality of first register units within the unit stage via the second switch.