Patents by Inventor Shigeyuki Maruyama

Shigeyuki Maruyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080227226
    Abstract: A semiconductor substrate eliminates a restriction caused by a width of scribe lines so as to increase a number of semiconductor elements formed on the semiconductor substrate. A plurality of semiconductor element areas are formed by forming a plurality of unit exposed and printed areas, each of which contains the semiconductor element areas. A first scribe line extends between the semiconductor element areas formed within the unit exposed and printed area. A second scribe line extends between the unit exposed and printed areas. A width of the first scribe line is different from a width of the second scribe line.
    Type: Application
    Filed: May 20, 2008
    Publication date: September 18, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Shigeru Fujii, Yoshikazu Arisaka, Hitoshi Izuru, Kazuhiro Tashiro, Shigeyuki Maruyama
  • Publication number: 20080203558
    Abstract: A method for protecting a semiconductor device is disclosed that can improve reliability of a performance test for the semiconductor device and prevent damage to the semiconductor device during transportation or packaging for shipment. An IC cover is attached to the semiconductor device, which has height unevenness because it includes semiconductor chips and electric parts having different heights. The IC cover includes projecting portions and a base portion. After being attached to the semiconductor device, the projecting portions stand in a free area in the semiconductor device, and the base portion is supported by the projections to be separated from the semiconductor chips and electric parts in the semiconductor device. The IC cover is detachably attached to the semiconductor device.
    Type: Application
    Filed: April 24, 2008
    Publication date: August 28, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Kazuhiro Tashiro, Keisuke Fukuda, Naohito Kohashi, Shigeyuki Maruyama
  • Patent number: 7403024
    Abstract: A contactor has contact electrodes elastically deformable in a direction of thickness of the contactor so that the contactor can make a contact with a semiconductor device with an appropriate contact pressure. The contactor is positioned between the semiconductor device and a test board so as to electrically connect the semiconductor device to the test board. Each of a plurality of contact electrodes has a first contact electrode part, a second contact electrode part and a connecting part electrically connecting the first contact electrode part to the second contact electrode part. The first contact electrode part contacts an electrode of the semiconductor device. The second contact electrode part contacts a terminal of the test board. A combining member has an insulating characteristic and holds the connecting part of each of the contact electrodes in a predetermined arrangement.
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: July 22, 2008
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Kazuhiro Tashiro, Naoyuki Watanabe, Daisuke Koizumi, Takafumi Hashitani, Ei Yano
  • Patent number: 7399990
    Abstract: A wafer-level package includes a semiconductor wafer having at least one semiconductor chip circuit forming region each including a semiconductor chip circuit each provided with test chip terminals and non test chip terminals, at least one external connection terminal, at least one redistribution trace provided on the semiconductor wafer, at least one testing member, and an insulating material. A first end of the redistribution trace is connected to one of the test chip terminals and a second end of said redistribution trace is extended out to a position offset from the chip terminals. The testing member is provided in an outer region of the semiconductor chip circuit forming region, and the second end of the redistribution trace is connected to the testing member.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: July 15, 2008
    Assignee: Fujitsu Limited
    Inventor: Shigeyuki Maruyama
  • Publication number: 20080136433
    Abstract: A contactor configured to be electrically connected to the terminals of an electronic component is disclosed. The connector includes multiple contact electrodes contacting the terminals of the electronic component and multiple elastic electrodes each composed of an electrically conductive elastic body. The elastic electrodes generate a pressing force for pressing the contact electrodes against the terminals of the electronic component. The contact electrodes are separable from the elastic electrodes.
    Type: Application
    Filed: November 1, 2007
    Publication date: June 12, 2008
    Applicant: Fujitsu Limited
    Inventors: Kazuhiro Tashiro, Shigeyuki Maruyama, Daisuki Koizumi, Takumi Kumatabara, Keisuke Fukuda
  • Patent number: 7382046
    Abstract: A method for protecting a semiconductor device is disclosed that can improve reliability of a performance test for the semiconductor device and prevent damage to the semiconductor device during transportation or packaging for shipment. An IC cover is attached to the semiconductor device, which has height unevenness because it includes semiconductor chips and electric parts having different heights. The IC cover includes projecting portions and a base portion. After being attached to the semiconductor device, the projecting portions stand in a free area in the semiconductor device, and the base portion is supported by the projections to be separated from the semiconductor chips and electric parts in the semiconductor device. The IC cover is detachably attached to the semiconductor device.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: June 3, 2008
    Assignee: Fujitsu Limited
    Inventors: Kazuhiro Tashiro, Keisuke Fukuda, Naohito Kohashi, Shigeyuki Maruyama
  • Patent number: 7355421
    Abstract: A semiconductor apparatus testing arrangement for testing a plurality of semiconductor devices produced on a semiconductor substrate, has a substrate on which a plurality of testing units are arranged, each unit comprising a probe needles corresponding to electrode terminals of the semiconductor device and electric conductor parts connected with the probe needles.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: April 8, 2008
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Yoshikazu Arisaka, Kazuhiro Tashiro, Takayuki Katayama, Tetsu Ozawa, Yuushin Kimura
  • Patent number: 7309996
    Abstract: A contactor configured to be electrically connected to the terminals of an electronic component is disclosed. The connector includes multiple contact electrodes contacting the terminals of the electronic component and multiple elastic electrodes each composed of an electrically conductive elastic body. The elastic electrodes generate a pressing force for pressing the contact electrodes against the terminals of the electronic component. The contact electrodes are separable from the elastic electrodes.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: December 18, 2007
    Assignee: Fujitsu Limited
    Inventors: Kazuhiro Tashiro, Shigeyuki Maruyama, Daisuke Koizumi, Takumi Kumatabara, Keisuke Fukuda
  • Patent number: 7276924
    Abstract: An electrical connecting method has the step of bringing a contact member connected to an electric circuit into contact with a terminal of an electronic part. A desired processing is performed by feeding current to the terminal via the contact member. The contact member is then separated from the terminal. When the contact member is brought into contact with the terminal, energy is applied to the contact member or the terminal in order to locally soften a portion of the terminal contacting the contact member. Thereafter, the desired processing is performed, in the state that the contacting portion of the terminal with the contact member is softened so as to reduce the contact resistance and so as to increase the subsequent separatability of the contact member from the terminal.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: October 2, 2007
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Toru Nishino
  • Publication number: 20070222070
    Abstract: In a contactor contact piece members can be arranged at a fine pitch, and a contact can be made surely by a small contact pressure. The contact piece members electrically connect an electronic part to an external circuit. The contact piece member is formed of an electrically conductive material in a generally spherical shape. A molecular density of a central part of the contact piece member is lower than a molecular density of a part near a surface. The electrically conductive material may include at least one of an electrically conductive fine particle, an electrically conductive fiber and an electrically conductive filler.
    Type: Application
    Filed: May 22, 2007
    Publication date: September 27, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Shigeyuki Maruyama, Toru Nishino
  • Patent number: 7267559
    Abstract: An anisotropic conductive sheet comprising an insulating base material and a plurality of conductive passages embedded at predetermined positions in the insulating base material, penetrating the insulating base material in the thickness direction. The conductive passage comprises a matrix consisting of non-silicone material or silicone material having rubber elasticity, the matrix material being filled into through-holes formed at a predetermined position in the base material and then hardened, and a conductive filler dispersed in the matrix at an amount capable of exhibiting conductivity at all times. A surface layer of conductive material is capable of functioning as a contact and ensuring an electrical connection by piercing a surface layer of an opponent when the surface layer is used as a contact, such as a layer of fine conductive particles is further provided on at least one of the end faces of the conductive passage.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: September 11, 2007
    Assignee: Fujitsu Limited
    Inventors: Takafumi Hashitani, Shigeyuki Maruyama
  • Patent number: 7240432
    Abstract: A contactor is placed between a semiconductor device and a test board. A contact electrode of the contactor electrically connects the semiconductor device to the test board. The contact electrode is formed of a conductive layer provided on an insulating substrate. The contact electrode comprises a first contact piece which contacts a terminal of the semiconductor device, a second contact piece which contacts an electrode of the test board, and a connecting portion which electrically connects the first contact piece and the second contact piece.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: July 10, 2007
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Hirohisa Matsuki
  • Publication number: 20070096761
    Abstract: A semiconductor apparatus testing arrangement for testing a plurality of semiconductor devices produced on a semiconductor substrate, has a substrate on which a plurality of testing units are arranged, each unit comprising a probe needles corresponding to electrode terminals of the semiconductor device and electric conductor parts connected with the probe needles.
    Type: Application
    Filed: January 26, 2006
    Publication date: May 3, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Shigeyuki Maruyama, Yoshikazu Arisaka, Kazuhiro Tashiro, Takayuki Katayama, Tetsu Ozawa, Yuushin Kimura
  • Patent number: 7202679
    Abstract: A contactor is provided which contactor comprises an insulating substrate, a concave portion formed in the insulating substrate and extending in a perpendicular direction from a surface thereof, and elastic conductive particles disposed in the concave portion. A part of one of the conductive particles protrudes from the surface of the insulating substrate.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: April 10, 2007
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Susumu Kida, Naoyuki Watanabe, Takafumi Hashitani, Ei Yano, Ichiro Midorikawa
  • Patent number: 7196530
    Abstract: A contactor used for testing a semiconductor device is provided. The semiconductor device testing contactor is electrically connected to electrodes of a semiconductor device to be tested. Such a contactor includes a wiring board and a first reinforcing member for reinforcing the wiring board. The contactor has a flexible base film and device connecting pads to be electrically connected to the electrodes of the semiconductor device. The first reinforcing member is disposed on the surface opposite to the semiconductor device connecting surface of the wiring board. The wiring board and the first reinforcing member are collectively bonded.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: March 27, 2007
    Assignee: Fujitsu Limited
    Inventors: Makoto Haseyama, Shigeyuki Maruyama
  • Patent number: 7174629
    Abstract: An integrated circuit contactor includes a base of an insulating material, the base being elastically deformable. A plurality of pads of a first conductive material are bonded to the base at positions corresponding to positions of terminals on an integrated circuit. A plurality of contacts of a second conductive material are bonded to the plurality of pads, respectively, the terminals of the integrated circuit being electrically connected to the contacts only when a pressure is exerted onto the contacts by the terminals of the integrated circuit, each contact having a projecting edge with a roughness produced by pulling a wire of the second conductive material apart from a corresponding one of the plurality of pads after the wire is bonded to the corresponding pad.
    Type: Grant
    Filed: February 21, 2003
    Date of Patent: February 13, 2007
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Makoto Haseyama, Futoshi Fukaya, Susumu Moriya, Naomi Miyaji
  • Patent number: 7161370
    Abstract: A semiconductor testing device is used for testing a semiconductor device which has at least one spherical connection terminal. The testing device includes an insulating substrate having an opening formed therein at a position corresponding to the position of the spherical connection terminal, and a contact member, formed on the insulating substrate, including a connection portion which is connected with the spherical connection terminal, at least the connection portion being deformable and extending into the opening.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: January 9, 2007
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Kazuhiro Tashiro, Makoto Haseyama
  • Publication number: 20060279003
    Abstract: A semiconductor device has an alignment mark which can be recognized by a conventional wafer prober. A redistribution layer connects electrodes of the semiconductor device to electrode pads located in predetermined positions of the redistribution layer. Metal posts configured to be provided with external connection electrodes are formed on the electrode pads of the redistribution layer. A mark member made of the same material as the metal posts is formed on the redistribution layer. The mark member serves as an alignment mark located in a predetermined positional relationship with the metal posts.
    Type: Application
    Filed: May 24, 2006
    Publication date: December 14, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Shigeyuki Maruyama, Yasuyuki Itoh, Tetsurou Honda, Kazuhiro Tashiro, Makoto Haseyama, Kenichi Nagashige, Yoshiyuki Yoneda, Hirohisa Matsuki
  • Patent number: 7145250
    Abstract: An LSI package comprises an LSI element and a wiring board. The plurality of pin terminals of the LSI element each includes a first conductive layer and a second conductive layer superposed on the first conductive layer. The plurality of pin terminals of the wiring board each includes a third conductive layer joined to the second conductive layer, and the wiring board further comprises outer joining terminals. The first, second, and third conductive layers are made of materials causing the metallic bond between the second conductive layer and third conductive layer to be stronger than the metallic bond between the first conductive layer and second conductive layer. The LSI element is tested using the outer joining terminals of the wiring board. The second conductive layer and third conductive layer are joined to attain a metallic bond through aggregation derived from pressure, and are reliably brought into electrical contact with each other for a test.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: December 5, 2006
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Toru Nishino, Kazuhiro Tashiro
  • Publication number: 20060245161
    Abstract: In a temperature control method, a controlled part is arranged to contact a first principal surface of a heat conduction part. The heat conduction part has the first principal surface and a second principal surface opposite to the first principal surface. The first principal surface has a configuration corresponding to a configuration of the controlled part. The second principal surface has an area larger than an area of the first principal surface. At least one of a heating unit and a cooling unit is driven to set the controlled part at a predetermined temperature. The heating unit and the cooling unit are disposed on the second principal surface of the heat conduction part so that the heating unit and the cooling unit are arranged side by side.
    Type: Application
    Filed: February 10, 2006
    Publication date: November 2, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Shigeyuki Maruyama, Hiroshi Misawa, Naohito Kohashi