Patents by Inventor Shigeyuki Murai

Shigeyuki Murai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5324969
    Abstract: A field-effect transistor including a first channel layer, formed in contacting relationship with a gate electrode, and a second channel layer, formed on one side or both sides of the first channel layer in non-contacting relationship with the gate electrode, the carrier concentration in the second channel layer being higher than that in the first channel layer but lower than that in high-impurity concentration active layers forming drain and source regions. The field-effect transistor employs an offset gate configuration in which the gate electrode is formed in contacting relationship with the first channel layer at a position nearer to the high-impurity concentration active layer forming the source region than to the high-impurity concentration active layer forming the drain region.
    Type: Grant
    Filed: August 12, 1992
    Date of Patent: June 28, 1994
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Shigeyuki Murai, Takayoshi Higashino, Masao Nishida