Patents by Inventor Shigeyuki Okada

Shigeyuki Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050213833
    Abstract: A decoding unit 150 decodes coded image data. A low resolution frame buffer 30 stores low resolution image data output from the decoding unit 150. A high resolution frame buffer 40 stores high resolution image data output from the decoding unit 150. A low resolution display circuit 32 acquires data from the low resolution frame buffer 30, and creates display signals for a low resolution display device 36 for displaying low resolution moving images. A high resolution display circuit 42 acquires data from the high resolution frame buffer 40, and creates display signals for a high resolution display device 46 for displaying high resolution moving images. Thus, each of multiple display devices can display respective moving images with different resolution.
    Type: Application
    Filed: March 14, 2005
    Publication date: September 29, 2005
    Inventors: Shigeyuki Okada, Noriaki Kojima, Shinichiro Okada
  • Publication number: 20050175250
    Abstract: Coded data are inputted from a stream analyzing unit to an entropy decoding unit. A group of peripheral information registers stores peripheral information on a target pixel for estimating a context used for arithmetic decoding of the coded data. Based on the peripheral information stored in the group of peripheral registers, a context estimation unit estimates a context and delivers the estimated context to an arithmetic decoding unit. The arithmetic decoding unit decodes the coded data based on a context label, then derives a decision and supplies the decision to an inverse quantization unit. The peripheral information stored in the group of peripheral registers is updated by a decoding result of the arithmetic decoding unit in the same cycle as the decoding.
    Type: Application
    Filed: February 10, 2005
    Publication date: August 11, 2005
    Inventors: Tsuyoshi Watanabe, Shigeyuki Okada
  • Publication number: 20050175251
    Abstract: A wavelet transform unit performs a wavelet transform on original images and a quantization unit quantizes wavelet transform coefficients. A ROI selector selects a region of interest or regions of interest in the original image, and a ROI mask generator generates ROI masks with which the wavelet transform coefficients (which are also called ROI transform coefficients) corresponding to the regions of interest are specified. By referring to the ROI masks, a lower-bit zero substitution unit substitutes low-order bits of non-ROI transform coefficients with zeros. An entropy coding unit entropy-codes the wavelet transform coefficients sequentially from high-order bit-planes, after the substitution. A coded data generator turns coded data into streams together with parameters and then outputs coded images.
    Type: Application
    Filed: February 8, 2005
    Publication date: August 11, 2005
    Inventors: Kazuhiko Taketa, Shigeyuki Okada
  • Patent number: 6871001
    Abstract: An MPEG video decoder 1 decodes a MPEG video stream using a discrete cosine transform together with a motion compensated prediction performing backward prediction and forward prediction. A frame buffer 104a is provided with a storage area for forward-reference luminance data used for the backward prediction and a storage area for rearward-reference color-difference data used for the forward prediction. A frame buffer 104b is provided with a storage area for forward-reference color-difference data used for the backward prediction and a storage area for rearward-reference luminance data used for the forward prediction. Memory access for each of the frame buffers 104a, 104b with an input/output data bus width of 16 bit is performed in a parallel processing.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: March 22, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shigeyuki Okada
  • Publication number: 20040109679
    Abstract: When the coding processings are performed in parallel, coded data need to be so arranged that the coded data are properly stored in a memory, thus preventing a storage operation from being executed at high speed. A group of encoders encode image data, respectively, and notifies an address specifying unit of the amount of code data. The code data generated by the group of encoders are temporarily stored in a group of temporary buffers. A code buffer write unit reads out the code data from the group of temporary buffers. Then, the code buffer write unit writes, in parallel, to the memory the code data corresponding to a plurality of data blocks, starting from write-start positions calculated by the address specifying unit.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 10, 2004
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Tsuyoshi Watanabe, Shigeyuki Okada
  • Publication number: 20040086264
    Abstract: An MPEG encoder performs, in compliance with the MPEG-2 standard, intra-image coding compression on thumbnail images, selected by an image selector, whose data amount has been reduced by a data reducing unit. The thus compressed thumbnail images together with a record address recorded as coded data in a coded image data area is recorded in a thumbnail image data.
    Type: Application
    Filed: June 9, 2003
    Publication date: May 6, 2004
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Shinichiro Okada, Shigeyuki Okada, Noriaki Kojima
  • Publication number: 20040008770
    Abstract: Structure information on picture within a GOP of a coded data sequence is acquired beforehand. At the time of high-speed reproduction, a high-speed reproduction mode judging unit judges by referring to the picture structure information whether a high-speed smooth reproduction is possible or not. If the high-speed reproduction is possible, a high-speed smooth reproduction control unit performs the high-speed smooth reproduction. If not possible, a high-speed skip reproduction control unit performs high-speed skip reproduction. For reverse reproduction, image data for one GPO, for example, are recoded by an MPEG encoder and then the recoded image data are stored in a storage. Then, a coded data amount predicted from the structure information on the picture within the GOP is compared with the capacity of the storage, and a countermeasure such as raising a compression ratio is taken if the estimated coded data amount exceeds the capacity of the storage.
    Type: Application
    Filed: June 12, 2003
    Publication date: January 15, 2004
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Shigeyuki Okada, Hideki Yamauchi
  • Publication number: 20030227976
    Abstract: A variable-length decoding (VLD) unit performs a variable-length decoding on an MPEG video stream. An inverse quantization (IQ) unit computes a discrete-cosine-transform (DCT) coefficient by performing an inverse quantization on results of decoding by the VLD unit. An inverse-discrete-cosine-transform (IDCT) unit carries out an IDCT for the DCT coefficients computed by the IQ unit so as to convert frequency components into the original signals. A motion-compensated-prediction (MC) unit performs a best-effort reproduction processing on received frames, during the time until the arrival of a frame serving as a reference for decoding, and returns to a normal decoding processing after the reference frame has been received.
    Type: Application
    Filed: June 2, 2003
    Publication date: December 11, 2003
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Shigeyuki Okada, Hideki Yamauchi
  • Publication number: 20030229894
    Abstract: The moving images under reproduction are displayed in a main screen and a plurality of thumbnail images that serve as indexes by which to search for a desired scene are displayed. Moreover, the thus displayed thumbnail images are updated at a predetermined timing according as the moving images progress.
    Type: Application
    Filed: June 9, 2003
    Publication date: December 11, 2003
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Shinichiro Okada, Shigeyuki Okada
  • Patent number: 6643402
    Abstract: The data transfer is repeatedly performed through a path constituted of an image holding RAM→a Huffman decoding circuit→an inverse quantization circuit→a quantization circuit→a Huffman encoding circuit until a code amount of compression image data generated by the Huffman encoding circuit becomes equal to or smaller than a maximum value determined according to an image quality, and thus a quantization threshold value and a Huffman code are determined. Every time the process is repeated, the quantization threshold value stored in a table of a first RAM and a Huffman code stored in a table of a second RAM corresponding to the quantization circuit and the Huffman encoding circuit, respectively, are newly set to a slightly higher value. As a quantization threshold value to be set in a table of a third RAM corresponding to the inverse quantization circuit, a quantization threshold value set in the first RAM at the previous quantization is used.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: November 4, 2003
    Assignee: Sanyo Electric Co., LTD
    Inventor: Shigeyuki Okada
  • Publication number: 20030190083
    Abstract: An SRAM is used as a pixel buffer which stores a partial image region copied from a frame buffer. A vertical filter reads a pair of target pixels arranged in a vertical direction from the pixel buffer and performs a filtering process of a discrete wavelet transform in the vertical direction. An intermediate result obtained in the filtering process is stored in a register. The vertical filter uses the intermediate result in filtering the next two pixels. A horizontal filter receives two transformed results from the vertical filter and performs a filtering process on the transformed results in the horizontal direction. The intermediate results obtained in the horizontal filtering are also stored in a register and utilized in the next filtering.
    Type: Application
    Filed: March 19, 2003
    Publication date: October 9, 2003
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Shigeyuki Okada, Kazuhiko Taketa, Hideki Yamauchi
  • Publication number: 20030179943
    Abstract: A wavelet transform is applied to an original image, so as to generate an image of a first hierarchy. Among the thus generated image of the first hierarchy, each of high-frequency sub-band components 1HL, 1LH and 1HH are immediately quantized and coded so as to be temporarily stored in a coded data storage. Another wavelet transform is applied to an LL sub-band component, among the image of the first hierarchy, so as to generate an image of a second hierarchy. Thereafter, an image of a third hierarchy is generated from an LL sub-band component in the image of the second hierarchy. During such a process, quantization and coding processings are performed in parallel with transformation processings. After all processings are completed and the coded data are prepared, coded image data complying with the JPEG2000 standard are generated by first reading out low-frequency components in sequence from the prepared coded data.
    Type: Application
    Filed: March 19, 2003
    Publication date: September 25, 2003
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Shigeyuki Okada, Hideki Yamauchi
  • Publication number: 20030179942
    Abstract: An original image shot by a shooting unit is read in a frame buffer and transformed by a wavelet transformer. An evaluating unit monitors the coefficients of the HL, LH, HH sub-bands generated by the wavelet transformer and checks the number of the high frequency components in the original image. If there are sufficient high frequency components, the quality of the original image is judged to be good, and if not, the image quality is judged not to be good because of camera shake or the like. The evaluating unit sends a coding indication signal to a quantizer if the image quality is good. Thereby the wavelet transformed image is coded. If the image quality is not good, the evaluating unit sends a re-shooting indication signal to the shooting unit.
    Type: Application
    Filed: March 13, 2003
    Publication date: September 25, 2003
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Shigeyuki Okada, Hideki Yamauchi
  • Publication number: 20030112340
    Abstract: In a digital camera, when snapshot shooting is instructed during recording of a moving image, a shot still image is temporarily pushed aside in a memory area for use in pushing aside (7a) in a frame buffer (7). A currently shooting motion image and a still image are displayed in parallel on a display (9), so that a user can confirm a content of a snapshot. The moving image continues to be recorded even during a push-aside operation. After a moving image processing is completed, the still image is processed by an image correcting circuit (4) The frame buffer (7) comprises a plurality of frame recording areas, and is shared on the occasions of a moving image processing and a still image processing. In a normal moving image processing, these areas are utilized in a cyclic manner, and when the still image is shot, any of areas will be utilized. Thereafter, the rest of areas are utilized in the cyclic manner for the moving images.
    Type: Application
    Filed: October 18, 2002
    Publication date: June 19, 2003
    Inventors: Shigeyuki Okada, Hiroshi Hanafusa, Noriaki Kojima
  • Publication number: 20030099293
    Abstract: When a reverse reproduction is instructed in an image reproducing apparatus (1), reproduced image data per picture generated by an MPEG video decoder (5) in a time series manner are inputted to an MPEG video encoder (6) so as to be recoded to I picture alone or B picture combined with I picture. An MPEG video decoder 7 reads out this recoded data sequence in a reverse time-series manner and decodes it successively, and displays a smooth reverse reproduced image. As the case may be, a data amount reducing circuit which reduces resolution and a data amount restoring circuit which restores the resolution are inserted therebetween. The reverse reproduction which is superior in ease of operation, cost merit, implemented area and so forth is realized.
    Type: Application
    Filed: October 29, 2002
    Publication date: May 29, 2003
    Inventors: Shigeyuki Okada, Hideki Yamauchi
  • Publication number: 20020196858
    Abstract: When a reverse reproduction is instructed, an MPEG video stream is once decoded and is again recoded by an MPEG video encoder so as to generate a recoded data sequence which will be overwritten on a storage area in a hard disk. An MPEG video decoder reads out this recoded data sequence in a reverse time-series manner and decodes it successively, and then converts it to a video signal so as to be outputted to a display.
    Type: Application
    Filed: May 28, 2002
    Publication date: December 26, 2002
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Shigeyuki Okada
  • Publication number: 20020181588
    Abstract: When a reverse reproduction is instructed, B pictures and P pictures in an MPEG video stream are once decoded and are again recoded into B pictures by an MPEG video encoder. Combined with I picture in the MPEG video stream, thereafter, a recoded data sequence comprised of I pictures and B pictures is generated, so as to be overwritten in a storage area of a hard disk. An MPEG video decoder reads out this recoded data sequence in a reverse time-series manner, and decodes this successively and outputs it to a display circuit.
    Type: Application
    Filed: May 28, 2002
    Publication date: December 5, 2002
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Shigeyuki Okada
  • Publication number: 20020181789
    Abstract: Coded image data which are coded hierarchically are decoded successively by an inverse wavelet transformer. During a process of decoding, images of intermediate hierarchy are stored in a frame buffer. In a case where constrains are placed on memory capacity or power capacity utilizable for a decoding processing, or resolution at an outputting end is limited, an abort processor discontinues or aborts the decoding processing in the middle. Then, the abort processor extracts intermediate-hierarchy images obtained by that time, from the frame buffer, and performs thereon an image processing such as a scaling, as appropriate, so as to be used as final decoded images. Thereby, a processing cost is markedly reduced.
    Type: Application
    Filed: May 24, 2002
    Publication date: December 5, 2002
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Shigeyuki Okada
  • Publication number: 20020181597
    Abstract: When a reverse reproduction is instructed, an MPEG video stream is once decoded and is converted to image video signals by a first display circuit. Thereafter, the image video signals are again recoded by an image input circuit and an MPEG video encoder, so as to be overwritten in a storage area of a hard disk. An MPEG video decoder reads out this recoded data sequence in a reverse time-series manner and decodes it successively. Then the thus decoded data are converted to image video signals by a second display circuit, so as to be displayed on a display.
    Type: Application
    Filed: May 24, 2002
    Publication date: December 5, 2002
    Inventor: Shigeyuki Okada
  • Publication number: 20020154826
    Abstract: A wavelet transform is conducted on an original image (OI). At the moment when the first layer image (WI1) is generated, its LL sub-band component is recorded as an intermediate image (II) in an intermediate image memory (28). The wavelet transform is further conducted and then the third layer image (WI3) is obtained. Thereinafter, the image is processed in a quantizer and so forth and finally a coded image in JPEG 2000 is generated. On the other hand, if an image of a relatively small size is required, the intermediate image II recorded in the intermediate image memory 28 is used as a new original image (40) and coded, instead of the original image (OI).
    Type: Application
    Filed: February 14, 2002
    Publication date: October 24, 2002
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Shigeyuki Okada