Abstract: The present disclosure provides a semiconductor device that includes a semiconductor fin disposed over a substrate, an isolation structure at least partially surrounding the fin, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, where an extended portion of the epitaxial S/D feature extends over the isolation structure, and a silicide layer disposed on the epitaxial S/D feature, where the silicide layer covers top, bottom, sidewall, front, and back surfaces of the extended portion of the S/D feature.

Abstract: Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes a substrate and a bottom isolation feature formed over the substrate. The semiconductor structure also includes a bottom semiconductor layer formed over the bottom isolation feature and nanostructures formed over the bottom semiconductor layer. The semiconductor structure also includes a source/drain structure attached to the nanostructures and covering a portion of the bottom isolation feature.

Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device structure includes a plurality of first nanostructures stacked over a substrate in a vertical direction. The semiconductor device structure also includes a first bottom layer formed adjacent to the first nanostructures, and a first dielectric liner layer formed over the first bottom layer and adjacent to the first nanostructures. The semiconductor device structure further includes a first source/drain (S/D) structure formed over the first dielectric liner layer, and the first S/D structure is isolated from the first bottom layer by the first dielectric liner layer.

Abstract: A semiconductor device includes a semiconductor substrate, a first epitaxial feature having a first semiconductor material over the semiconductor substrate, and a second epitaxial feature having a second semiconductor material over the semiconductor substrate. The second semiconductor material being different from the first semiconductor material. The semiconductor device further includes a first silicide layer on the first epitaxial feature, a second silicide layer on the second epitaxial feature, a metal layer on the first silicide layer, a first contact feature over the metal layer, and a second contact feature over the second silicide layer. A first number of layers between the first contact feature and the first epitaxial feature is greater than a second number of layers between the second contact feature and the second epitaxial feature.

Abstract: An electromagnetic wave transmission structure adapted to cause convergence of an electromagnetic wave includes a substrate and a transmission unit provided on the substrate and including an annular metal plate. The annular metal plate has a weighted average inner radius and a weighted average outer radius each related to the wavelength of the electromagnetic wave, the distance between the electromagnetic wave transmission structure and a focal point defined as the point of convergence of the electromagnetic wave, and the distance between the source of the electromagnetic wave and the focal point. The plural inner and outer radii of the annular metal plate have the same trend of variation. Each inner or outer radius corresponds to a weight related to the reference included angle formed between the inner or outer radius and a reference axis.

Abstract: The disclosure provides a floating touch display device which includes a capacitive touch panel, a display device, an interval layer, and an optical-lens structure. The capacitive touch panel is configured to provide a floating touch surface at a floating height above a first surface. The display device includes a second surface, and the display device is configured to provide a display image from the second surface. The optical-lens structure is disposed between the capacitive touch panel and the display device. The interval layer is disposed between the second surface and the optical-lens structure, and a first optical distance is between the second surface and the optical-lens structure. The optical-lens structure is configured to image the display image on the floating touch surface at a second optical distance, and the first optical distance is equal to the second optical distance.

Abstract: Self-aligned gate cutting techniques are disclosed herein that provide dielectric gate isolation fins for isolating gates of multigate devices from one another. An exemplary device includes a first multigate device having first source/drain features and a first metal gate that surrounds a first channel layer and a second multigate device having second source/drain features and a second metal gate that surrounds a second channel layer. A dielectric gate isolation fin separates the first metal gate from the second metal gate. The dielectric gate isolation fin includes a first dielectric layer having a first dielectric constant and a second dielectric layer having a second dielectric constant disposed over the first dielectric layer. The second dielectric constant is greater than the first dielectric constant. The first metal gate and the second metal gate physically contact the first channel layer and the second channel layer, respectively, and the dielectric gate isolation fin.

Abstract: An electronic device and a method for detecting abnormal device operation are provided. The method includes: obtaining multiple action events of a movable input device, and each action event including a relative coordinate and a time stamp of the movable input device; generating multiple absolute coordinates based on the relative coordinate of each action event; estimating multiple speed vectors based on the absolute coordinates and the time stamp of each action event; estimating multiple acceleration vectors based on the speed vectors and the time stamp of each action event; and estimating a probability of abnormal operation based on the speed vectors and the acceleration vectors.

Abstract: A device includes a substrate, a semiconductor layer, a gate structure, source/drain regions, a bottom isolation layer, and a bottom spacer. The semiconductor layer is above the substrate. The gate structure is above the substrate and surrounds the semiconductor layer. The source/drain regions are on opposite sides of the semiconductor layer. The bottom isolation layer is between the substrate and the semiconductor layer. The bottom spacer is on a sidewall of the bottom isolation layer. The bottom isolation layer has a seam therein, and the seam exposes a sidewall of the bottom spacer.

Abstract: A device includes a substrate, a first nanostructure channel above the substrate and a second nanostructure channel between the first nanostructure channel and the substrate. An inner spacer is between the first nanostructure channel and the second nanostructure channel. A gate structure abuts the first nanostructure channel, the second nanostructure channel and the inner spacer. A liner layer is between the inner spacer and the gate structure.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a plurality of semiconductor layers having a first group of semiconductor layers, a second group of semiconductor layers disposed over and aligned with the first group of semiconductor layers, and a third group of semiconductor layers disposed over and aligned with the second group of semiconductor layers. The structure further includes a first source/drain epitaxial feature in contact with a first number of semiconductor layers of the first group of semiconductor layers and a second source/drain epitaxial feature in contact with a second number of semiconductor layers of the third group of semiconductor layers. The first number of semiconductor layers of the first group of semiconductor layers is different from the second number of semiconductor layers of the third group of semiconductor layers.

Abstract: A touch module includes a substrate, a bridging pattern layer, first and second insulating layers, and an electrode pattern layer. The bridging pattern layer, disposed on the substrate, includes a bridging electrode. The first insulating layer, disposed on the bridging pattern layer, includes first and second insulating blocks respectively formed at opposite ends of the bridging electrode and a third insulating block separately located between the first and second insulating blocks by two exposed regions of the first insulating layer. The electrode pattern layer, disposed on the first insulating layer, is electrically connected to the bridging electrode through the two exposed regions. The electrode pattern layer includes first and second transparent conductive layers and a metal layer and has two through hole regions directly above the bridging electrode. The second insulating layer, disposed on the electrode pattern layer, covers and fills the two through hole regions.

Abstract: An environmental state analysis method includes obtaining key data that affects an environmental state of a designated place, and determining a degree of influence of the key data on the environmental state of the designated place according to the key data by using an analysis model. The key data includes one or more of environmental protection data, pollution source data, and environmental monitoring data. The environmental state includes one or more of a diffusion speed of harmful gas and a concentration of dust in the air.

Abstract: In a method of group control and management among electronic devices, wherein the electronic devices is in communication with a control device, a projectable space instance is provided for the control device to create a workspace, wherein a control and management tool and a plurality of unified tools for driving respective electronic devices are selectively added to the projectable space instance. The projectable space instance is then parsed with a projector by the control device to automatically generate a projected workspace corresponding to the workspace to be created via the projectable space instance. The control and management tool realizes at least one status information of at least a first one of the electronic devices by way of the unified tools, and controls at least a second one of the electronic devices to execute at least one task corresponding to the at least one status information.

Abstract: A vehicle theft-prevention system can include a plurality of sensors configured to sense measurements proximate to a vehicle and a body configured to secure to a window of the vehicle. The body can include a wireless transceiver and at least one computing device coupled to the plurality of sensors and the wireless transceiver. The at least one computing device can be configured to receive, via the wireless transceiver, an indication to enter an armed mode from an unarmed mode. The at least one computing device can be configured to, in response to the indication, transition to the armed mode, wherein transitioning to the armed mode comprises setting a configuration of at least one property of a subset of the plurality of sensors.

Abstract: A power supply device includes a pulse frequency modulation controller circuitry and a cycle controller circuitry. The pulse frequency modulation controller circuitry is configured to adjust a transiting speed of a first signal according to at least one control bit, and to compare the first signal with a first reference voltage to generate a second signal, and to generate a driving signal to a power converter circuit according to an output voltage, a second reference voltage, and the second signal, in which the power converter circuit is configured to generate the output voltage according to the driving signal. The cycle controller circuitry is configured to detect a frequency of the driving signal according to a clock signal having a predetermined frequency, in which the predetermined frequency is set based on a frequency range capable of being heard by humans.

Abstract: A method for forming a semiconductor structure is provided. The method includes forming a fin structure over a substrate. The fin structure includes a protection layer and alternating first and second semiconductor layers over the protection layer. The method also includes etching the fin structure to form a source/drain recess, forming a sacrificial contact in the source/drain recess, forming a source/drain feature over the sacrificial contact in the source/drain recess, removing the first semiconductor layers of the fin structure, thereby forming a plurality of nanostructures, forming a gate stack wrapping around the nanostructures, removing the substrate thereby exposing the protection layer and the sacrificial contact and replacing the sacrificial contact with a contact plug.

Abstract: An integrated circuit includes a first nanostructure transistor including a plurality of first semiconductor nanostructures over a substrate and a source/drain region in contact with each of the first semiconductor nanostructures. The integrated circuit includes a second nanostructure transistor including a plurality of second semiconductor nanostructures and a second source/drain region in contact with one or more of the second semiconductor nanostructures but not in contact with one or more other second semiconductor nanostructures.

Abstract: An electronic device, and a method for performing fingerprint sensing control on a display panel are provided. A sensing region of the display panel is divided into a plurality of fingerprint zones. The electronic device determines at least one target fingerprint zone from the fingerprint zones according to a touch location, wherein the fingerprint zones are coupled to a plurality of scanning groups, each of the scanning groups comprises one or more scanning lines, the at least one target fingerprint zone is coupled to a first scanning group and a second scanning group other than the first scanning group among the plurality of scanning groups. The electronic device scans the first scanning group with a first speed, and scans the second scanning group with a second speed higher than the first speed or skips scanning the second scanning group.