Patents by Inventor Shih-Chin Lin
Shih-Chin Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120126418Abstract: An integrated circuit (IC) device includes a polymer substrate having a topside surface and a bottomside surface opposite the topside surface, a plurality of through-holes that extend from the topside surface to the bottomside surface, and a plurality of bottom metal pads on the bottomside surface positioned over the plurality of through-holes. At least one IC die having an active topside including a plurality of bond pads and a second side is affixed to the topside surface. Bonding features are coupled to the plurality of bond pads for coupling respective ones of the plurality of bond pads to the plurality bottom metal pads. The bonding features extend into the through-holes to contact the bottom metal pads.Type: ApplicationFiled: November 24, 2010Publication date: May 24, 2012Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Chien-Te Feng, Shih-Chin Lin
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Publication number: 20120121807Abstract: The present invention provides a film deposition system and method by combining a plurality of gas supplying apparatuses and a deposition apparatus being in communication with the plurality of gas supplying apparatuses. By means of respectively providing different types of vapor precursors with high concentration and high capacity into a process chamber of the deposition apparatus through the plurality of gas supplying apparatus, the deposition reaction is accelerated so as to improve the efficiency of film deposition. In an embodiment of the gas supplying apparatus, it utilizes a first gas for providing high pressure toward on a liquid surface of the precursor, thereby transporting the precursor into an atomizing and heating unit whereby the precursor is atomized and then is heated so as to form a high-concentration and high capacity vapor precursor transported by another carrier gas.Type: ApplicationFiled: January 21, 2011Publication date: May 17, 2012Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ming-Tung Chiang, Shih-Chin Lin
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Publication number: 20120106868Abstract: An image correction apparatus for correcting an original image captured by a photographing device is provided. The image correction apparatus includes a storage and a texture mapping module. The storage therein stores mapping data sets associated with the photographing device. The invention is able to construct and utilize mapping data associated with a particular optical lens when used as part of the photographic device. The texture mapping module corrects an original captured image using a texture mapping procedure according to the appropriate mapping data to generate a corrected image. The texture mapping procedure may use mapping data in a polygon based approach to generate corrected images more efficiently.Type: ApplicationFiled: November 1, 2011Publication date: May 3, 2012Applicant: MStar Semiconductor, Inc.Inventor: Shih-Chin Lin
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Publication number: 20120032355Abstract: Disclosed is an encapsulation film. An inorganic oxide film is formed on an organic sealing layer by an atomic layer deposition (ALD) to form the encapsulation film, wherein the organic sealing layer is a polymer containing hydrophilic groups. The organic sealing layer and the inorganic oxide layer have covalent bondings therebetween. The encapsulation film can solve the moisture absorption problem of conventional organic sealing layers, thereby being suitable for use as a package of optoelectronic devices.Type: ApplicationFiled: January 4, 2011Publication date: February 9, 2012Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ching-Chiun Wang, Kang-Feng Lee, Feng-Yu Tsai, Ming Hom Zheng, Chih-Yung Huang, Shih-Chin Lin, Jen-Rong Huang
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Publication number: 20110305846Abstract: The present disclosure provides a surface processing apparatus, comprising a reaction chamber provided to form a deposition layer on a substrate, a carrying chamber connected to the reaction chamber and comprising a slot, and a plasma generator installed in the slot and providing plasma to process the substrate surface. Whereby the disclosure further provides a surface processing method, which flatten surface of a deposition layer on the substrate when the substrate is carried form the reaction chamber to the carrying chamber after the deposition process in the reaction chamber.Type: ApplicationFiled: September 17, 2010Publication date: December 15, 2011Applicant: Industrial Technology Research InstituteInventors: JUNG-CHEN CHIEN, HUNG-JEN YANG, CHIH-CHEN CHANG, SHIH-CHIN LIN, MUH-WANG LIANG
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Publication number: 20100257741Abstract: A cigar cutter mainly formed by a bottom sheet, a left blade, a right blade and an upper sheet. The four sheets are locked by a stud, while the left and right blade are movable with respective to the bottom sheet. The centers of these sheets have holes which are aligned. When a cigar passes through the hole, the two blades can move inwards to cut the cigar. A skilled design mechanism is formed in the four sheets so that as the two blades can be received within the two blades in a storage state. When it is desired to insert a cigar into the holes of the sheets, the two blades can be compressed inwards, and than the blades will resilient outwards by resilient forces of springs.Type: ApplicationFiled: April 12, 2009Publication date: October 14, 2010Inventors: Shih-Chin Lin, Shu-Yuan Lin
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Publication number: 20100164381Abstract: A long linear-type microwave plasma source using a variably-reduced-height rectangular waveguide as the plasma reactor has been developed. Microwave power is fed from the both sides of the waveguide and is coupled into plasma through a long slot cut on the broad side of the waveguide. The reduced height of the waveguide is variable in order to control the coupling between microwave and plasma so that the plasma uniformity can remain a high quality when extending the length of the linear-type plasma source.Type: ApplicationFiled: May 22, 2009Publication date: July 1, 2010Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: CHIH-CHEN CHANG, TUNG-CHUAN WU, CHAN-HSING LO, CHING-HUEI WU, MUH-WANG LIANG, FU-CHING TUNG, SHIH-CHIN LIN, JEN-RONG HUANG
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Publication number: 20090137319Abstract: A command distribution method, and multimedia apparatus and system using the same for playing games are concerned. The game system includes a game platform, a signal transmission module and an audio/video playing device. The audio/video playing device, coupled to the game platform via the signal transmission module, receives a command from the signal transmission module, and processing the command by way of a driver. The command is then transmitted to a data processing engine to be executed so as to generate an output signal. The command distribution method comprises steps of receiving a command from a game platform by an audio/video playing device, identifying a type to which the command corresponds among a plurality of types, and transmitting the command to be processed by a corresponding data processing engine according to the identified type, thereby generating an output signal.Type: ApplicationFiled: November 12, 2008Publication date: May 28, 2009Applicant: MSTAR SEMICONDUCTOR, INC.Inventors: SHIH CHIN LIN, YI TA TSAI, SHAO CHIH WU, CHUAN WEN CHEN, NAI SHENG CHENG
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Patent number: 7499517Abstract: A shift register and a shift register are provided. The shift register comprises the switch circuit, the latch circuit, and the inverter circuit 170. The shift register set, by alternately-serially connecting two types of shift registers, can receive two clock signals and an initial pulse signal to control the output waveform. The output of the present stage shift register can be used to control the turn-on time of the nest stage shift register. Further, by changing the circuit driving signal from the dynamic signal to the static signal, the circuit can operate only when the signal is “0” or “1” without being affected by the signal rising time and the falling time so that the circuit can operate in a more stable status.Type: GrantFiled: January 13, 2005Date of Patent: March 3, 2009Assignee: TPO Displays Corp.Inventors: Shih-Chin Lin, Hsiao-Yi Lin
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Patent number: 7034819Abstract: An apparatus for generating an interleaved stereo image includes a 3D graphics engine, an interleaved data merger and a register. The 3D graphics engine generates a shrunken left-eye image and a shrunken right-eye image of a stereo image based on video source data, the vertical sizes of the shrunken left-eye image and the shrunken right-eye image are shrunk compared with the vertical size of the video source data. The interleaved data merger stores the shrunken left-eye image and the shrunken right-eye image into two consecutive memory segments, and scans the memory segments while displaying the stereo image. A register controls a line number of a display region, so that the rows of the left-eye image shrunk and the right-eye image shrunk arrive at the display region in line-interleaved order. The invention also discloses a method for generating an interleaved stereo image.Type: GrantFiled: October 4, 2002Date of Patent: April 25, 2006Assignee: Silicon Integrated Systems Corp.Inventors: Ruen-rone Lee, Li-shu Lu, Shih-chin Lin
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Publication number: 20060012357Abstract: A DC/DC converter. In the DC/DC converter, a DC/DC conversion circuit provides an output voltage to a storage capacitor upon receiving an enable signal. First and second resistors are connected in series to produce a first voltage according to the output voltage. A Schmitt trigger is coupled to the first voltage to output a first control signal through an inverter when the first voltage is smaller than a second voltage and to output a second control signal through the inverter when the first voltage is higher than a third voltage. An oscillator is turned off upon receiving the first control signal such that the DC/DC conversion circuit stops providing the output voltage, and is turned on and outputs the enable signal upon receiving the second control signal such that the DC/DC conversion circuit provides the output voltage to the storage capacitor.Type: ApplicationFiled: July 14, 2004Publication date: January 19, 2006Inventors: Shih-Chin Lin, Hsiao-Yi Lin, Wei Wang
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Publication number: 20050289422Abstract: A shift register and a shift register are provided. The shift register comprises the switch circuit, the latch circuit, and the inverter circuit 170. The shift register set, by alternately-serially connecting two types of shift registers, can receive two clock signals and an initial pulse signal to control the output waveform. The output of the present stage shift register can be used to control the turn-on time of the nest stage shift register. Further, by changing the circuit driving signal from the dynamic signal to the static signal, the circuit can operate only when the signal is “0” or “1” without being affected by the signal rising time and the falling time so that the circuit can operate in a more stable status.Type: ApplicationFiled: January 13, 2005Publication date: December 29, 2005Inventors: Shih-Chin Lin, Hsiao-Yi Lin
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Patent number: 6970374Abstract: A static random access memory (SRAM) has a plurality of SRAM cells, a first switch unit, a second switch unit, and a capacitor. During read/write operations of the SRAM cells, the first switch unit and the second switch unit are turned on so that two power terminals of the SRAM cells respectively electrically connect to VDD and VSS and that the capacitor electrically connects between VDD and VSS. When the SRAM cells are not accessed, the first switch unit and the second switch unit are turned off and the capacitor keeps a voltage gap between the two power terminals of the SRAM cells greater than a predetermined value.Type: GrantFiled: February 24, 2004Date of Patent: November 29, 2005Assignee: United Microelectronics Corp.Inventor: Shih-Chin Lin
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Publication number: 20050185448Abstract: A static random access memory (SRAM) has a plurality of SRAM cells, a first switch unit, a second switch unit, and a capacitor. During read/write operations of the SRAM cells, the first switch unit and the second switch unit are turned on so that two power terminals of the SRAM cells respectively electrically connect to VDD and VSS and that the capacitor electrically connects between VDD and VSS. When the SRAM cells are not accessed, the first switch unit and the second switch unit are turned off and the capacitor keeps a voltage gap between the two power terminals of the SRAM cells greater than a predetermined value.Type: ApplicationFiled: February 24, 2004Publication date: August 25, 2005Inventor: Shih-Chin Lin
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Publication number: 20040066450Abstract: An apparatus for generating an interleaved stereo image includes a 3D graphics engine, an interleaved data merger and a register. The 3D graphics engine generates a shrunken left-eye image and a shrunken right-eye image of a stereo image based on video source data, the vertical sizes of the shrunken left-eye image and the shrunken right-eye image are shrunk compared with the vertical size of the video source data. The interleaved data merger stores the shrunken left-eye image and the shrunken right-eye image into two consecutive memory segments, and scans the memory segments while displaying the stereo image. A register controls a line number of a display region, so that the rows of the left-eye image shrunk and the right-eye image shrunk arrive at the display region in line-interleaved order. The invention also discloses a method for generating an interleaved stereo image.Type: ApplicationFiled: October 4, 2002Publication date: April 8, 2004Inventors: Ruen-Rone Lee, Li-Shu Lu, Shih-Chin Lin
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Publication number: 20030103062Abstract: An apparatus for controlling a display, which includes an on-screen buffer, two overlay buffers and a stereo window controller. The on-screen buffer stores screen image data that includes image data of an overlay region. The two overlay buffers are of a double-buffered architecture, and one overlay buffer stores the left image data and the right image data of a current frame, and another overlay buffer stores the left image data and the right image data of a next frame. The stereo window controller controls swap operations and overlay operations, wherein the swap operations determine which one of the two overlay buffers stores the left image data and the right image data of the current frame, and the overlay operations alternatively output the left image data and the right image data of the current frame while the overlay region is being scanned.Type: ApplicationFiled: November 30, 2001Publication date: June 5, 2003Inventors: Ruen-Rone Lee, Li-Shu Lu, Shih-Chin Lin
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Publication number: 20030056800Abstract: A hole-drilling device for a cigar is disclosed. The device comprises a rotating shaft having a screw threaded top portion and a holding section, a tubular cutter having a ring blade at the edge of the top portion and a bottom portion which is threaded, a shaft cover having a cutter opening at the top portion and a plurality of screw threads at the internal wall of the cover, and a screw nut which is screwed to the screw threaded top portion of the rotating shaft. The turning of the rotating shaft cause the ring blade to protrude via the cutter opening of the shaft cover to cut a hole on a cigar.Type: ApplicationFiled: September 27, 2001Publication date: March 27, 2003Inventor: Shih Chin Lin
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Patent number: 6243308Abstract: In accordance with the present invention, a method is provided for testing dynamic random access memory under wafer-level-burn-in that substantially can overcome the disadvantage of requiring at a manufacturing period and which even further increases with the increase of the memory capacity being expanded. In the embodiment, first of all, there are pluralities of word lines that are arranged in parallel. Generally word line driver means respectively driving the word lines and concludes word line test means for receiving a test signal, and further for producing an output signal. The layout of input bit-line to bit-line can be cross-arranged. Thus, the main feature of the present invention is mentioned that voltage for bit-line can be divided as even-numbered voltage and odd-numbered voltage for cross toggling. Especially, all of the tests can be carried out in the fabrication period of a semiconductor factory.Type: GrantFiled: February 22, 2000Date of Patent: June 5, 2001Assignee: United Microelectronics Corp.Inventor: Shih-Chin Lin
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Patent number: 5995428Abstract: A circuit is provided for use on a wafer formed with a plurality of dice on each of which a memory device, such as a DRAM (dynamic random access memory) device to perform a burn-in operation on the memory device so as to test the reliability thereof. By this circuit, a plurality of pads are formed in the scribe lines that are used as reference marks in the cutting apart of the dice. These pads are used to transfer an externally generated burn-in enable signal and a DC bias voltage to each memory device. Since the pads for burn-in wiring are formed in the scribe lines, they will not take additional space on the dice where each memory device is formed. The burn-in operation is more convenient, quick, and cost-effective to implement.Type: GrantFiled: February 27, 1998Date of Patent: November 30, 1999Assignee: United Microelectronics Corp.Inventors: Pien Chien, Shih-Chin Lin, Charlie Han
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Patent number: 5946248Abstract: A method is provided for use on a wafer formed with a plurality of dice on each of which a memory device, such as a DRAM (dynamic random access memory) device to perform a burn-in operation on the memory device so as to test the reliability thereof. By this method, a plurality of pads are formed in the scribe lines that are used as reference marks in the cutting apart of the dice. These pads are used to transfer an externally generated burn-in enable signal and a DC bias voltage to each memory device. Since the pads for burn-in wiring are formed in the scribe lines, they will not take additional space on the dice where each memory device is formed. The burn-in operation is more convenient, quick, and cost-effective to implement.Type: GrantFiled: February 27, 1998Date of Patent: August 31, 1999Assignee: United Microelectronics, Corp.Inventors: Pien Chien, Shih-Chin Lin, Charlie Han