Patents by Inventor Shih-Hao Sun

Shih-Hao Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240089607
    Abstract: An image sensing device and a control device of an illumination device thereof are provided. The control device includes a control circuit, an operation circuit, and multiple driving signal generators. The control circuit generates multiple control signals. The operation circuit performs a logical operation on the control signals and an image capturing signal to generate multiple operation results. The driving signal generator respectively provides multiple driving signals to the illumination device according to the operation results, and the driving signals respectively have multiple different output powers.
    Type: Application
    Filed: May 29, 2023
    Publication date: March 14, 2024
    Applicant: HTC Corporation
    Inventors: Chao Shuan Huang, Sheng-Long Wu, Yu-Jui Hsu, Shih-Yao Tsai, Tun-Hao Chao, Sen-Lin Chung, Chih Pin Chung, Chih-Yuan Chien, Shih Hong Sun
  • Patent number: 10319610
    Abstract: A package carrier includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer and a second patterned circuit layer. The substrate has an upper surface, a lower surface and a through hole. The heat conducting element is disposed inside the through hole and has a first surface and a second surface. The insulating material has a top surface, a bottom surface and at least one cavity extending from the top surface to the heat conducting element. The heat conducting element is fixed in the through hole by the insulating material, and the cavity exposes a portion of the first surface of the heat conducting element. The first patterned circuit layer is disposed on the upper surface and the top surface, and the second patterned circuit layer is disposed on the lower surface and the bottom surface.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: June 11, 2019
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Chin-Sheng Wang, Shih-Hao Sun
  • Patent number: 10177067
    Abstract: A manufacturing method including following steps is provided. A substrate that includes a core layer, a first conductive layer, and a second conductive layer is provided. A heat conducting channel is formed in the substrate, and an adhesion layer is formed on the second conductive layer to cover a side of the heat conducting channel. A heat conducting element and a buffer layer are placed into the heat conducting channel, and a gap is formed between either the heat conducting element or the buffer layer and an inner side surface of the heat conducting channel. The gap is filled with a first insulant material, and the adhesion layer and the buffer layer are removed to form a cavity and expose the heat conducting element. The first conductive layer and the second conductive layer are patterned to form a first patterned circuit layer and a second patterned circuit layer, respectively.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: January 8, 2019
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Chin-Sheng Wang, Chih-Hsien Cheng, Shih-Hao Sun
  • Publication number: 20180114739
    Abstract: A manufacturing method including following steps is provided. A substrate that includes a core layer, a first conductive layer, and a second conductive layer is provided. A heat conducting channel is formed in the substrate, and an adhesion layer is formed on the second conductive layer to cover a side of the heat conducting channel. A heat conducting element and a buffer layer are placed into the heat conducting channel, and a gap is formed between either the heat conducting element or the buffer layer and an inner side surface of the heat conducting channel. The gap is filled with a first insulant material, and the adhesion layer and the buffer layer are removed to form a cavity and expose the heat conducting element. The first conductive layer and the second conductive layer are patterned to form a first patterned circuit layer and a second patterned circuit layer, respectively.
    Type: Application
    Filed: May 18, 2017
    Publication date: April 26, 2018
    Applicant: Subtron Technology Co., Ltd.
    Inventors: Chin-Sheng Wang, Chih-Hsien Cheng, Shih-Hao Sun
  • Publication number: 20180090339
    Abstract: A package carrier includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer and a second patterned circuit layer. The substrate has an upper surface, a lower surface and a through hole. The heat conducting element is disposed inside the through hole and has a first surface and a second surface. The insulating material has a top surface, a bottom surface and at least one cavity extending from the top surface to the heat conducting element. The heat conducting element is fixed in the through hole by the insulating material, and the cavity exposes a portion of the first surface of the heat conducting element. The first patterned circuit layer is disposed on the upper surface and the top surface, and the second patterned circuit layer is disposed on the lower surface and the bottom surface.
    Type: Application
    Filed: November 30, 2017
    Publication date: March 29, 2018
    Applicant: Subtron Technology Co., Ltd.
    Inventors: Chin-Sheng Wang, Shih-Hao Sun
  • Patent number: 9870931
    Abstract: A package carrier includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer and a second patterned circuit layer. The substrate has an upper surface, a lower surface and a through hole. The heat conducting element is disposed inside the through hole and has a first surface and a second surface. The insulating material has a top surface, a bottom surface and at least one cavity extending from the top surface to the heat conducting element. The heat conducting element is fixed in the through hole by the insulating material, and the cavity exposes a portion of the first surface of the heat conducting element. The first patterned circuit layer is disposed on the upper surface and the top surface, and the second patterned circuit layer is disposed on the lower surface and the bottom surface.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: January 16, 2018
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Chin-Sheng Wang, Shih-Hao Sun
  • Publication number: 20170079128
    Abstract: A package carrier includes a substrate, at least one heat conducting element, an insulating material, a first patterned circuit layer and a second patterned circuit layer. The substrate has an upper surface, a lower surface and a through hole. The heat conducting element is disposed inside the through hole and has a first surface and a second surface. The insulating material has a top surface, a bottom surface and at least one cavity extending from the top surface to the heat conducting element. The heat conducting element is fixed in the through hole by the insulating material, and the cavity exposes a portion of the first surface of the heat conducting element. The first patterned circuit layer is disposed on the upper surface and the top surface, and the second patterned circuit layer is disposed on the lower surface and the bottom surface.
    Type: Application
    Filed: January 19, 2016
    Publication date: March 16, 2017
    Inventors: Chin-Sheng Wang, Shih-Hao Sun
  • Patent number: 9578750
    Abstract: A manufacturing of a package carrier includes the following steps. Two base metal layers are bonded together. Two supporting layers are laminated onto the base metal layers respectively. Two release metal films are disposed on the supporting layers respectively. Each release metal film includes a first metal film and a second metal film separable from each other. Two first patterned metal layers are formed on the release metal films respectively. Each first patterned metal layer includes a pad pattern. Two dielectric layers are formed on the release metal films respectively and cover the corresponding first patterned metal layers. Each dielectric layer has a conductive via connecting to the corresponding pad pattern. Two second patterned metal layers are formed on the dielectric layers respectively. Each second patterned metal layer at least covers the conductive via. The base metal layers are separated from each other to form two independent package carriers.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: February 21, 2017
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Shih-Hao Sun
  • Patent number: 9532494
    Abstract: A manufacturing method of a package structure is provided. A substrate having an upper surface and a lower surface opposite to each other and an opening communicating the surfaces is provided. An electronic device is configured in the opening. An adhesive layer and a patterned metal layer located on the adhesive layer are laminated on the lower surface and expose a bottom surface of the electronic device. A heat-dissipating column is formed on the bottom surface exposed by the adhesive layer and the patterned metal layer and connects the patterned metal layer and the bottom surface. A first and a second laminated structures are laminated on the upper surface of the substrate and the patterned metal layer, respectively. The first laminated structure covers the upper surface of the substrate and a top surface of the electronic device. The second laminated structure covers the heat-dissipating column and the patterned metal layer.
    Type: Grant
    Filed: July 6, 2014
    Date of Patent: December 27, 2016
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Shih-Hao Sun
  • Patent number: 9510453
    Abstract: A package carrier suitable for carrying at least a chip is provided. The package carrier includes an insulating layer, a patterned circuit layer, a plurality of conductive connection structures, a plurality of pads, a solder resist layer and a surface treatment layer. The insulating layer has a first surface and a second surface opposite to each other. The patterned circuit layer is embedded in the second surface and has a bonding surface. The second surface and the bonding surface are coplanar, and the patterned circuit layer comprises at least one die pad. The conductive connection structures are embedded in the insulating layer and connected to the patterned circuit layer. The pads are disposed on the first surface and connected to the conductive connection structures respectively. The solder resist layer is disposed on the second surface, and the surface treatment layer is disposed on the bonding surface.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: November 29, 2016
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Shih-Hao Sun
  • Publication number: 20160197034
    Abstract: A package carrier suitable for carrying at least a chip is provided. The package carrier includes an insulating layer, a patterned circuit layer, a plurality of conductive connection structures, a plurality of pads, a solder resist layer and a surface treatment layer. The insulating layer has a first surface and a second surface opposite to each other. The patterned circuit layer is embedded in the second surface and has a bonding surface. The second surface and the bonding surface are coplanar, and the patterned circuit layer comprises at least one die pad. The conductive connection structures are embedded in the insulating layer and connected to the patterned circuit layer. The pads are disposed on the first surface and connected to the conductive connection structures respectively. The solder resist layer is disposed on the second surface, and the surface treatment layer is disposed on the bonding surface.
    Type: Application
    Filed: March 16, 2016
    Publication date: July 7, 2016
    Inventor: Shih-Hao Sun
  • Patent number: 9330941
    Abstract: A manufacturing method of a package carrier is provided. A supporting board having an upper surface which a patterned circuit layer formed thereon is provided. A portion of the upper surface is exposed by the patterned circuit layer. An insulating layer and a conducting layer located at a first surface of the insulating layer are laminated onto the patterned circuit layer. The patterned circuit layer and the exposed portion of the upper surface are covered by the insulating layer. Plural conductive connection structures are formed on the patterned circuit layer. Plural of pads respectively connecting the conductive connection structures and exposing a portion of the first surface of the insulating layer is defined by patterning the conductive layer. The supporting board is removed so as to expose a second surface of the insulating layer. The second surface and a bonding surface of the patterned circuit layer are coplanar.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: May 3, 2016
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Shih-Hao Sun
  • Patent number: 9236364
    Abstract: A manufacturing method of a package carrier includes the following steps. Firstly, two base metal layers are bonded together. Then, two supporting layers are laminated onto the base metal layers respectively. Next, two release metal films are disposed on the supporting layers respectively, wherein each of the release metal films includes a first metal film and a second metal film separable from each other. Next, two patterned metal layers are formed on the release metal films respectively, wherein each of the patterned metal layers is suitable for carrying and electrically connected to a chip. Then, the base metal layers are separated from each other to form two package carriers independent from each other. A package carrier formed by the manufacturing method described above is also provided.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: January 12, 2016
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Shih-Hao Sun
  • Patent number: 9204560
    Abstract: A manufacturing method of a package carrier is provided. An insulation substrate having an upper surface, a lower surface, plural cavities located at the lower surface and plural through holes passing through the insulation substrate and respectively communicating with the cavities is provided. Plural vias is defined by the cavities and the through holes. A conductive material filling up the vias is formed to define plural conductive posts. An insulation layer having a top surface and plural blind vias extending from the top surface to the conductive posts is formed on the upper surface. A patterned circuit layer filling up the blind vias, being connected to the conductive posts and exposing a portion of the top surface is formed on the top surface. A solder mask layer is formed on the patterned circuit layer and has plural openings exposing a portion of the patterned circuit layer to define plural pads.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: December 1, 2015
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Shih-Hao Sun
  • Patent number: 9153521
    Abstract: A method of manufacturing a package carrier is provided. An insulation cover is provided. The insulation cover has an inner surface and an outer surface opposite to each other, a plurality of openings, and a containing space. A patterned metal layer is formed on the outer surface of the insulation cover. A surface treatment layer is formed on the patterned metal layer. A heat dissipation element is formed in the containing space of the insulation cover and structurally connected to the insulation cover. A thermal-conductive layer is formed on a surface of the heat dissipation element, and a portion of the thermal-conductive layer is exposed by the openings of the insulation cover.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: October 6, 2015
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Shih-Hao Sun
  • Publication number: 20150090476
    Abstract: A manufacturing method of a package carrier includes the following steps. Two base metal layers are bonded together. Two supporting layers are laminated onto the base metal layers respectively. Two release metal films are disposed on the supporting layers respectively. Each release metal film includes a first metal film and a second metal film separable from each other. Two first patterned metal layers are formed on the release metal films respectively. Each first patterned metal layer includes a pad pattern. Two dielectric layers are formed on the release metal films respectively and cover the corresponding first patterned metal layers. Each dielectric layer has a conductive via connecting to the corresponding pad pattern. Two second patterned metal layers are formed on the dielectric layers respectively. Each second patterned metal layer at least covers the conductive via. The base metal layers are separated from each other to form two independent package carriers.
    Type: Application
    Filed: December 5, 2013
    Publication date: April 2, 2015
    Applicant: SUBTRON TECHNOLOGY CO., LTD.
    Inventor: Shih-Hao Sun
  • Publication number: 20150090481
    Abstract: A manufacturing method of a package carrier includes the following steps. Firstly, two base metal layers are bonded together. Then, two supporting layers are laminated onto the base metal layers respectively. Next, two release metal films are disposed on the supporting layers respectively, wherein each of the release metal films includes a first metal film and a second metal film separable from each other. Next, two patterned metal layers are formed on the release metal films respectively, wherein each of the patterned metal layers is suitable for carrying and electrically connected to a chip. Then, the base metal layers are separated from each other to form two package carriers independent from each other. A package carrier formed by the manufacturing method described above is also provided.
    Type: Application
    Filed: November 22, 2013
    Publication date: April 2, 2015
    Applicant: Subtron Technology Co., Ltd.
    Inventor: Shih-Hao Sun
  • Publication number: 20150068034
    Abstract: A manufacturing method of a package carrier is provided. An insulation substrate having an upper surface, a lower surface, plural cavities located at the lower surface and plural through holes passing through the insulation substrate and respectively communicating with the cavities is provided. Plural vias is defined by the cavities and the through holes. A conductive material filling up the vias is formed to define plural conductive posts. An insulation layer having a top surface and plural blind vias extending from the top surface to the conductive posts is formed on the upper surface. A patterned circuit layer filling up the blind vias, being connected to the conductive posts and exposing a portion of the top surface is formed on the top surface. A solder mask layer is formed on the patterned circuit layer and has plural openings exposing a portion of the patterned circuit layer to define plural pads.
    Type: Application
    Filed: November 19, 2014
    Publication date: March 12, 2015
    Applicant: SUBTRON TECHNOLOGY CO., LTD.
    Inventor: Shih-Hao Sun
  • Patent number: 8893379
    Abstract: A manufacturing method of a package structure is provided. In the manufacturing method, a metal substrate having a seed layer is provided. A patterned circuit layer is formed on a portion of the seed layer. A first patterned dry film layer is formed on the other portion of the seed layer. A surface treatment layer is electroplated on the patterned circuit layer with use of the first patterned dry film layer as an electroplating mask. The first patterned dry film layer is removed. A chip bonding process is performed to electrically connect a chip to the surface treatment layer. An encapsulant is formed on the metal substrate. The encapsulant encapsulates the chip, the surface treatment layer, and the patterned circuit layer. The metal substrate and the seed layer are removed to expose a bottom surface of the encapsulant and a lower surface of the patterned circuit layer.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: November 25, 2014
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Shih-Hao Sun, Chang-Fu Chen
  • Publication number: 20140317907
    Abstract: A manufacturing method of a package structure is provided. A substrate having an upper surface and a lower surface opposite to each other and an opening communicating the surfaces is provided. An electronic device is configured in the opening. An adhesive layer and a patterned metal layer located on the adhesive layer are laminated on the lower surface and expose a bottom surface of the electronic device. A heat-dissipating column is formed on the bottom surface exposed by the adhesive layer and the patterned metal layer and connects the patterned metal layer and the bottom surface. A first and a second laminated structures are laminated on the upper surface of the substrate and the patterned metal layer, respectively. The first laminated structure covers the upper surface of the substrate and a top surface of the electronic device. The second laminated structure covers the heat-dissipating column and the patterned metal layer.
    Type: Application
    Filed: July 6, 2014
    Publication date: October 30, 2014
    Applicant: SUBTRON TECHNOLOGY CO., LTD.
    Inventor: Shih-Hao Sun