Abstract: A memory device includes at least one memory cell. The memory cell includes first and second transistors, and first and second capacitors. The first transistor is coupled to a source line. The second transistor is coupled to the first transistor and a bit line. The first capacitor is coupled to a word line and the second transistor. The second capacitor is coupled to the second transistor and an erase gate.

Abstract: Some embodiments relate to a memory cell to store one or more bits of data. The memory cell includes a capacitor including first and second capacitor plates which are separated from one another by a dielectric. The first capacitor plate corresponds to a doped region disposed in a semiconductor substrate, and the second capacitor plate is a polysilicon or metal layer arranged over the doped region. The memory cell also includes a transistor laterally spaced apart from the capacitor and including a gate electrode arranged between first and second source/drain regions. An interconnect structure is disposed over the semiconductor substrate and couples the gate electrode of the transistor to the second capacitor plate.

Abstract: The NVM device includes a semiconductor substrate having a first region and a second region. The NVM device includes a data-storing structure formed in the first region and designed operable to retain charges. The NVM device includes a capacitor formed in the second region and coupled with the data-storing structure for data operations. The data-storing structure includes a first doped well of a first-type in the semiconductor substrate. The data-storing structure includes a first gate dielectric feature on the first doped well. The data-storing structure includes a first gate electrode disposed on the first gate dielectric feature and configured to be floating. The capacitor includes a second doped well of the first-type. The capacitor includes a second gate dielectric feature on the second doped well. The capacitor also includes a second gate electrode disposed on the second gate dielectric feature and connected to the first gate electrode.

Abstract: The NVM device includes a semiconductor substrate having a first region and a second region. The NVM device includes a data-storing structure formed in the first region and designed operable to retain charges. The NVM device includes a capacitor formed in the second region and coupled with the data-storing structure for data operations. The data-storing structure includes a first doped well of a first-type in the semiconductor substrate. The data-storing structure includes a first gate dielectric feature on the first doped well. The data-storing structure includes a first gate electrode disposed on the first gate dielectric feature and configured to be floating. The capacitor includes a second doped well of the first-type. The capacitor includes a second gate dielectric feature on the second doped well. The capacitor also includes a second gate electrode disposed on the second gate dielectric feature and connected to the first gate electrode.

Abstract: Memory cells and operation methods thereof are provided. A memory device includes a number of memory cells. Each of the memory cells includes a first transistor, a switch and a capacitor. The first transistor has a drain connected to a corresponding bit-line. The switch has a first terminal connected to a source of the first transistor and a second terminal coupled to a reference voltage. The capacitor has a first plate and a second plate, and the first plate of the capacitor is electrically connected to a gate of the first transistor. The second plate of the capacitor is connected to a corresponding word line. The switch is turned off when the memory cell is not selected to perform a write operation or a read operation.

Abstract: A fastener includes a head portion and a shank portion that extends from the head portion. The shank portion has a distal end that is distal from the head portion and that is formed with at least two bendable anchor segments. The fastener is used to fasten a base plate of a light emitting bar to a base of a light source module.

Abstract: Some embodiments relate to a memory cell to store one or more bits of data. The memory cell includes a capacitor including first and second capacitor plates which are separated from one another by a dielectric. The first capacitor plate corresponds to a doped region disposed in a semiconductor substrate, and the second capacitor plate is a polysilicon or metal layer arranged over the doped region. The memory cell also includes a transistor laterally spaced apart from the capacitor and including a gate electrode arranged between first and second source/drain regions. An interconnect structure is disposed over the semiconductor substrate and couples the gate electrode of the transistor to the second capacitor plate.

Abstract: The NVM device includes a semiconductor substrate having a first region and a second region. The NVM device includes a data-storing structure formed in the first region and designed operable to retain charges. The NVM device includes a capacitor formed in the second region and coupled with the data-storing structure for data operations. The data-storing structure includes a first doped well of a first-type in the semiconductor substrate. The data-storing structure includes a first gate dielectric feature on the first doped well. The data-storing structure includes a first gate electrode disposed on the first gate dielectric feature and configured to be floating. The capacitor includes a second doped well of the first-type. The capacitor includes a second gate dielectric feature on the second doped well. The capacitor also includes a second gate electrode disposed on the second gate dielectric feature and connected to the first gate electrode.

Abstract: One embodiment relates to a memory device including a plurality of memory units tiled together to form a memory array. A memory unit includes a plurality of memory cells, which include respective capacitors and respective transistors, disposed on a semiconductor substrate. The capacitors include respective lower plates disposed in a conductive region in the semiconductor substrate. A wordline extends over the conductive region, and a contact couples the wordline to the conductive region so as to couple the wordline to the lower plates of the respective capacitors. The respective transistors are arranged so successive gates of the transistors are arranged on alternating sides of the wordline.

Abstract: One embodiment relates to a memory device including a plurality of memory units tiled together to form a memory array. A memory unit includes a plurality of memory cells, which include respective capacitors and respective transistors, disposed on a semiconductor substrate. The capacitors include respective lower plates disposed in a conductive region in the semiconductor substrate. A wordline extends over the conductive region, and a contact couples the wordline to the conductive region so as to couple the wordline to the lower plates of the respective capacitors. The respective transistors are arranged so successive gates of the transistors are arranged on alternating sides of the wordline.

Abstract: A method of fixing a flexible circuit board. The method comprises the following steps: providing a flexible circuit board having a locating hole, providing a display module frame having a locating element corresponding to the locating hole, passing the locating element through the locating hole, bonding the flexible circuit board to the frame and deforming the locating element for to fix the flexible circuit board on the frame.

Abstract: The NVM device includes a semiconductor substrate having a first region and a second region. The NVM device includes a data-storing structure formed in the first region and designed operable to retain charges. The NVM device includes a capacitor formed in the second region and coupled with the data-storing structure for data operations. The data-storing structure includes a first doped well of a first-type in the semiconductor substrate. The data-storing structure includes a first gate dielectric feature on the first doped well. The data-storing structure includes a first gate electrode disposed on the first gate dielectric feature and configured to be floating. The capacitor includes a second doped well of the first-type. The capacitor includes a second gate dielectric feature on the second doped well. The capacitor also includes a second gate electrode disposed on the second gate dielectric feature and connected to the first gate electrode.

Abstract: A method of fixing a flexible circuit board. The method comprises the following steps: providing a flexible circuit board having a locating hole, providing a display module frame having a locating element corresponding to the locating hole, passing the locating element through the locating hole, bonding the flexible circuit board to the frame and deforming the locating element for to fix the flexible circuit board on the frame.

Abstract: An assembly structure of a membrane and a print circuit board (PCB). The assembly structure comprises a membrane, a print circuit board, a cover and bolts. A curved protrusion formed on the cover makes the golden fingers of the membrane and the PCB overlap completely when the membrane and the PCB are assembled by the bolts. Electrical contact between the membrane and the PCB is thus reliable and stable. The assemble cost is lowered, and an easy assemble method is provided.

Abstract: A flexible printed circuit comprises a first region, a second region, and a connection region. The connection region connects the first region and the second region, and has a surface. When the flexible printed circuit is used, the connection region can be bent so that part of the surface overlaps in order to present a particular angle between the first region and the second region.

Abstract: A flexible printed circuit comprises a first region, a second region, and a connection region. The connection region connects the first region and the second region, and has a surface. When the flexible printed circuit is used, the connection region can be bent so that part of the surface overlaps in order to present a particular angle between the first region and the second region.

Abstract: A light guide for an LCD system has a light incident side, and is formed with a plurality of pattern structures. Each of the pattern structures has a pair of diagonally-disposed first points defining a first length therebetween, and a pair of diagonally-disposed second points defining a second length therebetween. The second length extends transverse to and crosses the first length. A ratio of the first length and the second length of one of the pattern structures adjacent to the light incident side is greater than a ratio of the first length and the second length of one of the pattern structures distant from the light incident side.

Abstract: A method for assembling a component of a liquid crystal display device is introduced. An adhesion step is performed to adhere a flexible film to a substrate to form an assembled component by using an adhesion material covered over the overlapping area between the flexible film and the substrate. A plurality of air bubbles are trapped between the substrate and the flexible film by the adhesion material. To expel the air bubbles out of the assembled component, the assembled component is placed in an airtight chamber and a heating-pressurizing step is performed in the airtight chamber for properly raising the temperature of the assembled component and the air pressure within the airtight chamber.

Abstract: A display device, process of manufacturing same, and equipment for performing the process, the display device including a first display residing on a first panel and a second display residing on a second panel, with the displays electrically coupled via an anisotropically conductive material or combination of anisotropically conductive materials having appreciable conductivity along the direction the material is compressed. Conductive pads, having a substantial protrusion from the surface of the panel and arranged in a fan-out style, are typically patterned on the first panel and corresponding conductive pads patterned on the second panel, and the anisotropically conductive material or combination of materials is disposed and compressed so as to electrically couple corresponding pads on the two panels.

Abstract: A dazzling light device includes a shell, a gem stone and one or several lighting members. The shell comprises a holding section to hold the gem stone therein. The lighting member shines light to the gem stone which then refracts or reflects light from various angles to produce dazzling light. By rotating or moving lamp shades in relation to the gem stone, the light produces different dazzling effect.