Abstract: A data encryption and decryption method is provided. The method is used in a data encryption and decryption system and includes: establishing, by a data encryption and decryption device, a first secure sockets layer (SSL) connection with a mobile device; receiving a data transmitted from the mobile device; generating a first symmetric key, encrypting the data using the first symmetric key, and generating first encrypted data; encrypting the first symmetric key using a first public key, and generating a first encrypted key; and transmitting the first encrypted data and the first encrypted key to the mobile device.

Abstract: A semiconductor device includes first and second gate stack, a source/drain contact, and a first gate capping structure. The first gate stack and the second gate stack are over a semiconductor fin. The source/drain contact extends laterally from a first gate spacer of the first gate stack to a second gate spacer of the second gate stack, and extends vertically from a source/drain region in the semiconductor fin to above the source/drain region. The first gate capping structure is atop the first gate stack, and has a greater thickness on the first gate spacer of the first gate stack than on a gate metal of the first gate stack. The thickness is measured in a direction perpendicular to a top surface of the first gate stack.

Abstract: A character-tracking system is provided. The system includes a plurality of cameras, a first computing server, a second computing server, and a third computing server. The cameras are configured to capture scene images of a scene with different shooting ranges. The first computing server performs body tracking on a body region in the scene image to generate character data. The third computation server obtains a body region block from each scene image according to the character data for facial recognition to obtain user identity. The first computing server further performs person re-identification on different body regions to link the body regions with its person tag belonging to the same user. The first computing server further represents the linked body regions and their person tags with a corresponding user identity.

Abstract: A character-tracking system is provided. The system includes a plurality of cameras, a first computing server, a second computing server, and a third computing server. The cameras are configured to capture scene images of a scene with different shooting ranges. The first computing server performs body tracking on a body region in the scene image to generate character data. The third computation server obtains a body region block from each scene image according to the character data for facial recognition to obtain user identity. The first computing server further performs person re-identification on different body regions to link the body regions with its person tag belonging to the same user. The first computing server further represents the linked body regions and their person tags with a corresponding user identity.

Abstract: A light-emitting device, includes a substrate structure, including a base portion having a surface and a plurality of protrusions regularly formed on the base portion; a buffer layer covering the plurality of protrusions and the surface; and III-V compound semiconductor layers formed on the buffer layer; wherein one of the plurality of protrusions includes a first portion and a second portion formed on the first portion and the first portion is integrated with the base portion; and wherein the base portion includes a first material and the first portion includes the first material.

Abstract: A light-emitting device, includes a substrate structure, including a base portion having a surface and a plurality of protrusions formed on the base portion; a buffer layer covering the plurality of protrusions and the surface; and III-V compound semiconductor layers formed on the buffer layer; wherein one of the plurality of protrusions has a height not greater than 1.5 ?m; wherein the light-emitting device has a full width at half maximum (FWHM) of smaller than 250 arcsec in accordance with a (102) XRD rocking curve.

Abstract: A semiconductor device and a method for fabricating the semiconductor device are provided. In the method for fabricating the semiconductor device, at first, a FinFET (Field-Effect Transistor) device is provided. Then, spacers and various mask layers are formed on gate structures of the FinFET device to provide a self-alignment structure. Thereafter, source/drain contacts and gate contacts are formed in the self-alignment structure to enable the source/drain contacts to be electrically connected to the source/drain structures of the FinFET device, and enable the gate contacts to be electrically connected to the gate structures. Therefore, self-alignment is achieved.

Abstract: A power supply system and a power supply method are provided. The power supply system includes a target device, a power supplier module and a control circuit. The control circuit is coupled to the target device and the power supplier module. The control circuit transmits a power provided by the power supplier module to the target device and disables a sub-target device of the target device if the power supplier module does not meet a default condition. The control circuit transmits the power provided by the power supplier module to the target device and enables the sub-target device if the power supplier module meets the default condition.

Abstract: A semiconductor device includes first and second gate stack, a source/drain contact, and a first gate capping structure. The first gate stack and the second gate stack are over a semiconductor fin. The source/drain contact extends laterally from a first gate spacer of the first gate stack to a second gate spacer of the second gate stack, and extends vertically from a source/drain region in the semiconductor fin to above the source/drain region. The first gate capping structure is atop the first gate stack, and has a greater thickness on the first gate spacer of the first gate stack than on a gate metal of the first gate stack. The thickness is measured in a direction perpendicular to a top surface of the first gate stack.

Abstract: A method of treating a subject suffering from an angiogenesis-related disease, which is implemented by administering to the subject a pharmaceutical composition comprising a compound of formula I derived from Mitella formosana to inhibit the angiogenic function of endothelial progenitor cells.

Abstract: An impedance matching circuit includes a variable impedance circuit, a reference voltage generating circuit and a control circuit. The variable impedance circuit is configured for coupling to a load having an impedance and has a variable impedance; the reference voltage generating circuit coupled to the variable impedance circuit is configured to receive an input voltage of the variable impedance circuit to generate a reference voltage; and the control circuit coupled to the variable impedance circuit and configured to generate a control signal according to the reference voltage and an output voltage of the variable impedance circuit to control the variable impedance to make the variable impedance match the impedance of the load.

Abstract: An energy harvesting device includes: a rectifier circuit rectifying an AC supply voltage received between first and second input terminals thereof to generate a DC rectified voltage between first and second output terminals thereof; a converter circuit performing DC-to-DC conversion upon the DC rectified voltage based on a control signal to generate a DC output voltage; and a control circuit comparing a first to-be-compared voltage (correlated to the DC rectified voltage) and a second to-be-compared voltage (correlated to a difference voltage between one of the first and second input terminals of the rectifier circuit and one of the first and second output terminals of the rectifier circuit) to generate the control signal.

Abstract: A method includes forming gate spacers and a first interlayer dielectric (ILD) layer over a fin structure, forming a metal gate structure between the gate spacers, selectively growing a metal cap on the metal gate structure, depositing a second ILD layer over the metal cap and the first ILD layer, performing a first chemical mechanical polish (CMP) process on the second ILD layer until the metal cap is exposed, replacing the metal cap with a dielectric cap, after replacing the metal cap with the dielectric cap, etching the second and first ILD layers until source/drain regions of the fin structure are exposed, and forming source/drain contacts respectively on the source/drain regions.

Abstract: A method includes forming gate spacers and a first interlayer dielectric (ILD) layer over a fin structure, forming a metal gate structure between the gate spacers, selectively growing a metal cap on the metal gate structure, depositing a second ILD layer over the metal cap and the first ILD layer, performing a first chemical mechanical polish (CMP) process on the second ILD layer until the metal cap is exposed, replacing the metal cap with a dielectric cap, after replacing the metal cap with the dielectric cap, etching the second and first ILD layers until source/drain regions of the fin structure are exposed, and forming source/drain contacts respectively on the source/drain regions.

Abstract: A light-emitting device, includes a substrate structure, including a base portion having a surface and a plurality of protrusions formed on the base portion; a buffer layer covering the plurality of protrusions and the surface; and III-V compound semiconductor layers formed on the buffer layer; wherein one of the plurality of protrusions has a height not greater than 1.5 ?m; wherein the light-emitting device has a full width at half maximum (FWHM) of smaller than 250 arcsec in accordance with a (102) XRD rocking curve.

Abstract: A lifting mechanism is adapted to bear an expansion unit, and the expansion unit contacts or is separated from a heat dissipating module. The lifting mechanism includes an outer casing base and a bearing base. The bearing base is disposed on the outer casing base liftably along a first axis. The expansion unit is disposed on the bearing base. When the bearing base is located at an original position relative to the outer casing base, the expansion unit on the bearing base is separated from the heat dissipating module. When the bearing base is lifted relative to the outer casing base along the first axis to a lifting position, the expansion unit on the bearing base contacts the heat dissipating module. An electronic device having the lifting mechanism is further provided.

Abstract: A FinFET device includes a fin structure, a gate structure, a gate helmet, a pair of spacers and a contact structure. The fin structure protrudes from a semiconductor substrate. The gate structure crosses over the fin structure. The gate helmet includes a base and a pair of fringes. The base is disposed on a top surface of the gate structure. The pair of fringes is extended upwards from opposite sides of the base. The pair of spacers is positioned on the pair of the fringes. The contact structure is disposed between the pair of the fringes and between the pair of the spacers.

Abstract: A data encryption and decryption method is provided. The method is used in a data encryption and decryption system and includes: establishing, by a data encryption and decryption device, a first secure sockets layer (SSL) connection with a mobile device; receiving a data transmitted from the mobile device; generating a first symmetric key, encrypting the data using the first symmetric key, and generating first encrypted data; encrypting the first symmetric key using a first public key, and generating a first encrypted key; and transmitting the first encrypted data and the first encrypted key to the mobile device.

Abstract: An operation voltage testing circuit includes a voltage generating circuit, a current-to-voltage conversion circuit, and a processing circuit. The voltage generating circuit is configured to generate a first voltage signal according to a first current signal, such that a photoelectric conversion unit generates a second current signal corresponding to the first voltage signal. The current-to-voltage conversion circuit is configured to generate a second voltage signal corresponding to the second current signal. The processing circuit is configured to receive the second voltage signal and to selectively adjust and output the first current signal according to the second voltage signal and a threshold value, such that the voltage generating circuit selectively adjusts the first voltage signal according to the first current signal.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a fin structure over a substrate. The method also includes forming a gate structure over the fin structure. The method further includes forming fin spacers over sidewalls of the fin structure and gate spacers over sidewalls of the gate structure. In addition, the method includes forming a source/drain structure over the fin structure and depositing a dummy material layer to cover the source/drain structure. The dummy material layer is removed faster than the gate spacers during the removal of the dummy material layer. The method further includes forming a salicide layer over the source/drain structure and the fin spacers, and forming a contact over the salicide layer. The dummy material layer includes Ge, amorphous silicon or spin-on carbon.