Abstract: Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention.

Abstract: Plasma immersion ion implantation employing a very high RF bias voltage on an electrostatic chuck to attain a requisite implant depth profile is carried out by first depositing a partially conductive silicon-containing seasoning layer over the interior chamber surfaces prior to wafer introduction.

Abstract: The present invention pertains to methods, apparatuses, and systems for fabricating three-dimensional integrated circuits. One or more embodiments of systems, apparatuses, and/or methods according to the present invention are presented.

Abstract: The present invention relates to methods and systems for the metallization of semiconductor devices. One aspect of the present invention is a method of depositing a copper layer onto a barrier layer so as to produce a substantially oxygen free interface therebetween. In one embodiment, the method includes providing a substantially oxide free surface of the barrier layer. The method also includes depositing an amount of atomic layer deposition (ALD) copper on the oxide free surface of the barrier layer effective to prevent oxidation of the barrier layer. The method further includes depositing a gapfill copper layer over the ALD copper. Another aspect of the present invention is a system for depositing a copper layer onto barrier layer so as to produce a substantially oxygen-free interface therebetween. In one embodiment, the integrated system includes at least one barrier deposition module. The system also includes an ALD copper deposition module configured to deposit copper by atomic layer deposition.

Abstract: Embodiments of the invention generally provide apparatuses for endpoint detection of dopants. In one embodiment, the apparatus has a plasma chamber containing a body having sidewalls, a lid, and a bottom encompassing an interior volume and a substrate support assembly disposed within the body and having a substrate supporting surface configured to support a substrate. The apparatus also has a processing region disposed between the substrate supporting surface and a gas distribution assembly—which contains a perforated plate disposed above the substrate supporting surface. The apparatus also has a plasma source coupled with the body and configured to form an inductively coupled plasma within the interior region. Additionally, the apparatus has an optical sensor disposed either above or below the substrate supporting surface and coupled with a controller, wherein the controller is configured to derive a current dopant concentration relative to an amount of radiation received by the optical sensor.

Abstract: The present invention pertains to methods, apparatuses, and systems for fabricating three-dimensional integrated circuits. One embodiment of the method comprises providing a wafer or other substrate having a plurality of through holes. In addition, the method includes supporting the wafer or other substrate with a wafer or other substrate holder mounted in a process chamber. The method further includes generating a pressure differential between the front side of the wafer or other substrate and the back side of the wafer or other substrate while the wafer or other substrate is supported on the wafer or other substrate holder so that the pressure differential causes fluid flow through the through holes. Also, the method includes establishing process conditions in the process chamber for at least one process to fabricate integrated circuits. Embodiments of a system and embodiments of an apparatus according to the present invention are also presented.

Abstract: Plasma immersion ion implantation employing a very high RF bias voltage on an electrostatic chuck to attain a requisite implant depth profile is carried out by first depositing a partially conductive silicon-containing seasoning layer over the interior chamber surfaces prior to wafer introduction.

Abstract: In a first aspect, a module is provided that is adapted to process a wafer. The module includes a processing portion having one or more features such as (1) a rotatable wafer support for rotating an input wafer from a first orientation wherein the wafer is in line with a load port to a second orientation wherein the wafer is in line with an unload port; (2) a catcher adapted to contact and travel passively with a wafer as it is unloaded from the processing portion; (3) an enclosed output portion adapted to create a laminar air flow from one side thereof to the other; (4) an output portion having a plurality of wafer receivers; (5) submerged fluidnozzles; and/or (6) drying gas flow deflectors, etc. Other aspects include methods of wafer processing.

Abstract: Embodiments of the invention generally provide methods for end point detection at predetermined dopant concentrations during plasma doping processes. In one embodiment, a method includes positioning a substrate within a process chamber, generating a plasma above the substrate and transmitting a light generated by the plasma through the substrate, wherein the light enters the topside and exits the backside of the substrate, and receiving the light by a sensor positioned below the substrate. The method further provides generating a signal proportional to the light received by the sensor, implanting the substrate with a dopant during a doping process, generating multiple light signals proportional to a decreasing amount of the light received by the sensor during the doping process, generating an end point signal proportional to the light received by the sensor once the substrate has a final dopant concentration, and ceasing the doping process.

Abstract: Plasma immersion ion implantation employing a very high RF bias voltage on an electrostatic chuck to attain a requisite implant depth profile is carried out by first depositing a partially conductive silicon-containing seasoning layer over the interior chamber surfaces prior to wafer introduction.

Abstract: Methods and systems for handling a substrate through processes including an integrated electroless deposition process includes processing a surface of the substrate in an electroless deposition module to deposit a layer over conductive features of the substrate using a deposition fluid. The surface of the substrate is then rinsed in the electroless deposition module with a rinsing fluid. The rinsing is controlled to prevent de-wetting of the surface so that a transfer film defined from the rinsing fluid remains coated over the surface of the substrate. The substrate is removed from the electroless deposition module while maintaining the transfer film over the surface of the substrate. The transfer film over the surface of the substrate prevents drying of the surface of the substrate so that the removing is wet. The substrate, once removed from the electroless deposition module, is moved into a post-deposition module while maintaining the transfer film over the surface of the substrate.

Abstract: The present invention relates to methods and systems for the metallization of semiconductor devices. One aspect of the present invention is a method of depositing a copper layer onto a barrier layer so as to produce a substantially oxygen free interface therebetween. In one embodiment, the method includes providing a substantially oxide free surface of the barrier layer. The method also includes depositing an amount of atomic layer deposition (ALD) copper on the oxide free surface of the barrier layer effective to prevent oxidation of the barrier layer. The method further includes depositing a gapfill copper layer over the ALD copper. Another aspect of the present invention is a system for depositing a copper layer onto barrier layer so as to produce a substantially oxygen-free interface therebetween. In one embodiment, the integrated system includes at least one barrier deposition module. The system also includes an ALD copper deposition module configured to deposit copper by atomic layer deposition.

Abstract: Embodiments of the invention generally provide methods for end point detection at predetermined dopant concentrations during plasma doping processes. In one embodiment, a method includes positioning a substrate within a process chamber, generating a plasma above the substrate and transmitting a light generated by the plasma through the substrate, wherein the light enters the topside and exits the backside of the substrate, and receiving the light by a sensor positioned below the substrate. The method further provides generating a signal proportional to the light received by the sensor, implanting the substrate with a dopant during a doping process, generating multiple light signals proportional to a decreasing amount of the light received by the sensor during the doping process, generating an end point signal proportional to the light received by the sensor once the substrate has a final dopant concentration, and ceasing the doping process.

Abstract: The present invention relates to methods and systems for the metallization of semiconductor devices. One aspect of the present invention is a method of depositing a copper layer onto a barrier layer so as to produce a substantially oxygen free interface therebetween. In one embodiment, the method includes providing a substantially oxide free surface of the barrier layer. The method also includes depositing an amount of atomic layer deposition (ALD) copper on the oxide free surface of the barrier layer effective to prevent oxidation of the barrier layer. The method further includes depositing a gapfill copper layer over the ALD copper. Another aspect of the present invention is a system for depositing a copper layer onto barrier layer so as to produce a substantially oxygen-free interface therebetween. In one embodiment, the integrated system includes at least one barrier deposition module. The system also includes an ALD copper deposition module configured to deposit copper by atomic layer deposition.

Abstract: Methods for implanting ions into a substrate by a plasma immersion ion implanting process are provided. In one embodiment, the method for implanting ions into a substrate by a plasma immersion ion implantation process includes providing a substrate into a processing chamber, supplying a gas mixture including a reacting gas and a reducing gas into the chamber, and implanting ions from the gas mixture into the substrate. In another embodiment, the method includes providing a substrate into a processing chamber, supplying a gas mixture including reacting gas and a hydrogen containing reducing gas into the chamber, and implanting ions from the gas mixture into the substrate.

Abstract: Embodiments of the invention generally provide methods for end point detection at predetermined dopant concentrations during plasma doping processes. In one embodiment, a method includes positioning a substrate within a process chamber, generating a plasma above the substrate and transmitting a light generated by the plasma through the substrate, wherein the light enters the topside and exits the backside of the substrate, and receiving the light by a sensor positioned below the substrate. The method further provides generating a signal proportional to the light received by the sensor, implanting the substrate with a dopant during a doping process, generating multiple light signals proportional to a decreasing amount of the light received by the sensor during the doping process, generating an end point signal proportional to the light received by the sensor once the substrate has a final dopant concentration, and ceasing the doping process.

Abstract: A method is provided for performing plasma immersion ion implantation with a highly uniform seasoning film on the interior of a reactor chamber having a ceiling and a cylindrical side wall and a wafer support pedestal facing the ceiling. The method includes providing a gas distribution ring with plural gas injection orifices on a periphery of a wafer support pedestal, the orifices facing radially outwardly from the wafer support pedestal. Silicon-containing gas is introduced through the gas distribution orifices of the ring to establish a radially outward flow pattern of the silicon-containing gas. The reactor includes pairs of conduit ports in the ceiling adjacent the side wall at opposing sides thereof and respective external conduits generally spanning the diameter of the chamber and coupled to respective pairs of the ports. The method further includes injecting oxygen gas through the conduit ports into the chamber to establish an axially downward flow pattern of oxygen gas in the chamber.

Abstract: Methods and solutions for preventing the formation of metal particulate defect matter upon a substrate after plating processes are provided. In particular, solutions are provided which are free of oxidizing agents and include a non-metal pH adjusting agent in sufficient concentration such that the solution has a pH between approximately 7.5 and approximately 12.0. In some cases, a solution may include a chelating agent. In addition or alternatively, a solution may include at least two different types of complexing agents each offering a single point of attachment for binding metal ions via respectively different functional groups. In any case, at least one of the complexing agents or the chelating agent includes a non-amine or non-imine functional group. An embodiment of a method for processing a substrate includes plating a metal layer upon the substrate and subsequently exposing the substrate to a solution comprising the aforementioned make-up.

Abstract: Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention.

Abstract: In a first aspect, a module is provided that is adapted to process a wafer. The module includes a processing portion having one or more features such as (1) a rotatable wafer support for rotating an input wafer from a first orientation wherein the wafer is in line with a load port to a second orientation wherein the wafer is in line with an unload port; (2) a catcher adapted to contact and travel passively with a wafer as it is unloaded from the processing portion; (3) an enclosed output portion adapted to create a laminar air flow from one side thereof to the other; (4) an output portion having a plurality of wafer receivers; (5) submerged fluid nozzles; and/or (6) drying gas flow deflectors, etc. Other aspects include methods of wafer processing.