Patents by Inventor Shijian Luo

Shijian Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955346
    Abstract: A semiconductor device includes a substrate including traces, wherein the traces protrude above a top surface of the substrate; a prefill material over the substrate and between the traces; a die attached over the substrate; and a wafer-level underfill between the prefill material and the die.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: April 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Shijian Luo, Jonathan S. Hacker
  • Patent number: 11594462
    Abstract: Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: February 28, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Steven K. Groothuis, Jian Li, Haojun Zhang, Paul A. Silvestri, Xiao Li, Shijian Luo, Luke G. England, Brent Keeth, Jaspreet S. Gandhi
  • Patent number: 11539823
    Abstract: A muffling device includes an acquisition circuit, configured to obtain reference sound wave information of a user. The muffling device includes a modulation circuit, configured to analyze an acoustic wave characteristic of the reference sound wave information to obtain a characteristic parameter of the reference sound wave information. The muffling device includes a muffling circuit, configured to generate compensated sound wave information according to the characteristic parameter of the reference sound wave information. The muffling device includes a correction circuit, configured to compare muffed sound wave information superimposed by the compensated sound wave information and the reference sound wave information with the reference sound wave information, and feed back a comparison result to the muffling circuit. The muffling circuit can adjust the compensated sound wave information according to a fed back comparison result.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: December 27, 2022
    Assignees: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD., FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yang Yu, Jiamin Liao, Shijian Luo, Tao Luo, Heyuan Qiu, Xiaowei Liu, Haiguang Li, Fan Chen
  • Publication number: 20220375902
    Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface having bond pads operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate. Methods of fabrication and related electronic systems are also disclosed.
    Type: Application
    Filed: August 5, 2022
    Publication date: November 24, 2022
    Inventors: Owen R. Fay, Randon K. Richards, Aparna U. Limaye, Dong Soon Lim, Chan H. Yoo, Bret K. Street, Eiichi Nakano, Shijian Luo
  • Patent number: 11410973
    Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface having bond pads operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate. Methods of fabrication and related electronic systems are also disclosed.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: August 9, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Owen R. Fay, Randon K. Richards, Aparna U. Limaye, Dong Soon Lim, Chan H. Yoo, Bret K. Street, Eiichi Nakano, Shijian Luo
  • Publication number: 20220140468
    Abstract: A semiconductor device, or semiconductor device package, that includes a substrate having an antenna structure on a surface of the substrate and a wire bond that electrically connects the antenna structure to the substrate to form an antenna or a first antenna configuration. The substrate may include a second antenna structure with the wire bond connected to the second antenna structure forming a second antenna or antenna configuration. The semiconductor device may include a radio communication device electrically connected to the substrate. The antenna or antenna configuration may be tuned to the requirements of the radio communication device. The antenna configuration may be tuned by connected to different antenna structures on the surface of the substrate. The antenna configuration may be tuned by changing a length of the wire bond, changing a diameter of the wire bond, and/or changing the material of the wire bond.
    Type: Application
    Filed: January 18, 2022
    Publication date: May 5, 2022
    Inventors: Shijian Luo, Owen R. Fay
  • Patent number: 11302653
    Abstract: A semiconductor device assembly that includes a substrate having a first side and a second side, the first side having at least one dummy pad and at least one electrical pad. The semiconductor device assembly includes a first semiconductor device having a first side and a second side and at least one electrical pillar extending from the second side. The electrical pillar is connected to the electrical pad via solder to form an electrical interconnect. The semiconductor device assembly includes at least one dummy pillar extending from the second side of the first semiconductor device and a liquid positioned between an end of the dummy pillar and the dummy pad. The surface tension of the liquid pulls the dummy pillar towards the dummy pad. The surface tension may reduce or minimize a warpage of the semiconductor device assembly and/or align the dummy pillar and the dummy pad.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: April 12, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Bret K. Street, Wei Zhou, Christopher J. Gambee, Jonathan S. Hacker, Shijian Luo
  • Patent number: 11251516
    Abstract: A semiconductor device, or semiconductor device package, that includes a substrate having an antenna structure on a surface of the substrate and a wire bond that electrically connects the antenna structure to the substrate to form an antenna or a first antenna configuration. The substrate may include a second antenna structure with the wire bond connected to the second antenna structure forming a second antenna or antenna configuration. The semiconductor device may include a radio communication device electrically connected to the substrate. The antenna or antenna configuration may be tuned to the requirements of the radio communication device. The antenna configuration may be tuned by connected to different antenna structures on the surface of the substrate. The antenna configuration may be tuned by changing a length of the wire bond, changing a diameter of the wire bond, and/or changing the material of the wire bond.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: February 15, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Shijian Luo, Owen R. Fay
  • Publication number: 20220028820
    Abstract: A semiconductor device assembly has a first substrate, a second substrate, and an anisotropic conductive film. The first substrate includes a first plurality of connectors. The second substrate includes a second plurality of connectors. The anisotropic conductive film is positioned between the first plurality of connectors and the second plurality of connectors. The anisotropic conductive film has an electrically insulative material and a plurality of interconnects laterally separated by the electrically insulative material. The plurality of interconnects forms electrically conductive channels extending from the first plurality of connectors to the second plurality of connectors. A method includes connecting the plurality of interconnects to the first plurality of connectors and the second plurality of connectors, such that the electrically conductive channels are operable to conduct electricity from the first substrate to the second substrate.
    Type: Application
    Filed: September 30, 2021
    Publication date: January 27, 2022
    Inventors: Mark E. Tuttle, John F. Kaeding, Owen R. Fay, Eiichi Nakano, Shijian Luo
  • Patent number: 11139262
    Abstract: A semiconductor device assembly has a first substrate, a second substrate, and an anisotropic conductive film. The first substrate includes a first plurality of connectors. The second substrate includes a second plurality of connectors. The anisotropic conductive film is positioned between the first plurality of connectors and the second plurality of connectors. The anisotropic conductive film has an electrically insulative material and a plurality of interconnects laterally separated by the electrically insulative material. The plurality of interconnects forms electrically conductive channels extending from the first plurality of connectors to the second plurality of connectors. A method includes connecting the plurality of interconnects to the first plurality of connectors and the second plurality of connectors, such that the electrically conductive channels are operable to conduct electricity from the first substrate to the second substrate.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: October 5, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Mark E. Tuttle, John F. Kaeding, Owen R. Fay, Eiichi Nakano, Shijian Luo
  • Publication number: 20210257226
    Abstract: A semiconductor device includes a substrate including traces, wherein the traces protrude above a top surface of the substrate; a prefill material over the substrate and between the traces; a die attached over the substrate; and a wafer-level underfill between the prefill material and the die.
    Type: Application
    Filed: April 12, 2021
    Publication date: August 19, 2021
    Inventors: Shijian Luo, Jonathan S. Hacker
  • Publication number: 20210231841
    Abstract: Embodiments of the present disclosure provide a transparent display device and a manufacturing method thereof. The transparent display device includes a display panel and a total internal reflection photonic crystal backplate, the display panel includes a display side and an incident side opposite to the display side, the total internal reflection photonic crystal backplate is disposed at the incident side of the display panel; the total internal reflection photonic crystal backplate includes a substrate and a plurality of pillar structures periodically arranged in the substrate, wherein a refractive index of the plurality of pillar structures is different from a refractive index of the substrate.
    Type: Application
    Filed: March 7, 2018
    Publication date: July 29, 2021
    Inventors: Qiaoni WANG, Hui CHEN, Shijian LUO, Xinyu ZHANG, Yabin LIN
  • Publication number: 20210199862
    Abstract: A color film substrate includes a substrate, a light-shielding matrix, and a functional composite layer. The light-shielding matrix is over the substrate. The functional composite layer is over the substrate and is electrically conductive. The functional composite layer includes a composite material including a quantum dot and a graphene and is configured to convert white light into color light.
    Type: Application
    Filed: December 15, 2017
    Publication date: July 1, 2021
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., Fuzhou BOE Optoelectronics Technology Co., Ltd.
    Inventors: Shijian Luo, Hui Chen, Xinyu Zhang
  • Patent number: 11004697
    Abstract: A semiconductor device includes a substrate including traces, wherein the traces protrude above a top surface of the substrate; a prefill material over the substrate and between the traces, wherein the prefill material directly contacts peripheral surfaces of the traces; a die attached over the substrate; and a wafer-level underfill between the prefill material and the die.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: May 11, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Shijian Luo, Jonathan S. Hacker
  • Patent number: 10990062
    Abstract: A display system includes: a display screen having a first display area; a processor configured to modulate laser beams to be emitted from a laser projector according to a pre-stored holographic image data source to obtain modulated laser beams; the laser projector configured to project the modulated laser beams to create a first holographic image in front of the first display area; and at least one photodetector configured to collect first gesture information about a first gesture through which the first holographic image is controlled by a viewer. The processor is further configured to generate a first control signal according to the first gesture information, and re-modulate the laser beams to be emitted from the laser projector, so as to create a second holographic image corresponding to the first control signal.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: April 27, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Qiaoni Wang, Hui Chen, Shijian Luo, Yabin Lin, Xin Xie, Chunmei Yang, Xingming Chen, Zhijian Chen, Xinyu Zhang
  • Publication number: 20210118852
    Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface having bond pads operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate. Methods of fabrication and related electronic systems are also disclosed.
    Type: Application
    Filed: July 27, 2020
    Publication date: April 22, 2021
    Inventors: Owen R. Fay, Randon K. Richards, Aparna U. Limaye, Dong Soon Lim, Chan H. Yoo, Bret K. Street, Eiichi Nakano, Shijian Luo
  • Patent number: 10937757
    Abstract: Provided are a device packing facility and method using DEHT and a device processing apparatus utilizing the DEHT. The device packaging facility includes a mounting unit providing bis(2-ethylhexyl) terephthalate (DEHT) between first and second devices to attach the first and second devices to each other, a processing unit thermally processing the first and second devices that are attached to each other to remove the DEHT and fix the first and second devices to each other, and a transfer unit transferring the first and second devices that are attached to each other from the mounting unit to the processing unit.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: March 2, 2021
    Assignee: SEMIgear, Inc.
    Inventors: Jian Zhang, Joshua Pinnolis, Shijian Luo
  • Publication number: 20200373252
    Abstract: A semiconductor device assembly that includes a substrate having a first side and a second side, the first side having at least one dummy pad and at least one electrical pad. The semiconductor device assembly includes a first semiconductor device having a first side and a second side and at least one electrical pillar extending from the second side. The electrical pillar is connected to the electrical pad via solder to form an electrical interconnect. The semiconductor device assembly includes at least one dummy pillar extending from the second side of the first semiconductor device and a liquid positioned between an end of the dummy pillar and the dummy pad. The surface tension of the liquid pulls the dummy pillar towards the dummy pad. The surface tension may reduce or minimize a warpage of the semiconductor device assembly and/or align the dummy pillar and the dummy pad.
    Type: Application
    Filed: August 14, 2020
    Publication date: November 26, 2020
    Inventors: Bret K. Street, Wei Zhou, Christopher J. Gambee, Jonathan S. Hacker, Shijian Luo
  • Publication number: 20200350224
    Abstract: Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.
    Type: Application
    Filed: July 23, 2020
    Publication date: November 5, 2020
    Inventors: Steven K. Groothuis, Jian Li, Haojun Zhang, Paul A. Silvestri, Xiao Li, Shijian Luo, Luke G. England, Brent Keeth, Jaspreet S. Gandhi
  • Patent number: 10763131
    Abstract: A semiconductor device includes a substrate including traces, wherein the traces protrude above a top surface of the substrate; a prefill material over the substrate and between the traces, wherein the prefill material directly contacts peripheral surfaces of the traces; a die attached over the substrate; and a wafer-level underfill between the prefill material and the die.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: September 1, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Shijian Luo, Jonathan S. Hacker