Abstract: Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.

Abstract: A muffling device includes an acquisition circuit, configured to obtain reference sound wave information of a user. The muffling device includes a modulation circuit, configured to analyze an acoustic wave characteristic of the reference sound wave information to obtain a characteristic parameter of the reference sound wave information. The muffling device includes a muffling circuit, configured to generate compensated sound wave information according to the characteristic parameter of the reference sound wave information. The muffling device includes a correction circuit, configured to compare muffed sound wave information superimposed by the compensated sound wave information and the reference sound wave information with the reference sound wave information, and feed back a comparison result to the muffling circuit. The muffling circuit can adjust the compensated sound wave information according to a fed back comparison result.

Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface having bond pads operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate. Methods of fabrication and related electronic systems are also disclosed.

Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface having bond pads operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate. Methods of fabrication and related electronic systems are also disclosed.

Abstract: A semiconductor device, or semiconductor device package, that includes a substrate having an antenna structure on a surface of the substrate and a wire bond that electrically connects the antenna structure to the substrate to form an antenna or a first antenna configuration. The substrate may include a second antenna structure with the wire bond connected to the second antenna structure forming a second antenna or antenna configuration. The semiconductor device may include a radio communication device electrically connected to the substrate. The antenna or antenna configuration may be tuned to the requirements of the radio communication device. The antenna configuration may be tuned by connected to different antenna structures on the surface of the substrate. The antenna configuration may be tuned by changing a length of the wire bond, changing a diameter of the wire bond, and/or changing the material of the wire bond.

Abstract: A semiconductor device assembly that includes a substrate having a first side and a second side, the first side having at least one dummy pad and at least one electrical pad. The semiconductor device assembly includes a first semiconductor device having a first side and a second side and at least one electrical pillar extending from the second side. The electrical pillar is connected to the electrical pad via solder to form an electrical interconnect. The semiconductor device assembly includes at least one dummy pillar extending from the second side of the first semiconductor device and a liquid positioned between an end of the dummy pillar and the dummy pad. The surface tension of the liquid pulls the dummy pillar towards the dummy pad. The surface tension may reduce or minimize a warpage of the semiconductor device assembly and/or align the dummy pillar and the dummy pad.

Abstract: A semiconductor device, or semiconductor device package, that includes a substrate having an antenna structure on a surface of the substrate and a wire bond that electrically connects the antenna structure to the substrate to form an antenna or a first antenna configuration. The substrate may include a second antenna structure with the wire bond connected to the second antenna structure forming a second antenna or antenna configuration. The semiconductor device may include a radio communication device electrically connected to the substrate. The antenna or antenna configuration may be tuned to the requirements of the radio communication device. The antenna configuration may be tuned by connected to different antenna structures on the surface of the substrate. The antenna configuration may be tuned by changing a length of the wire bond, changing a diameter of the wire bond, and/or changing the material of the wire bond.

Abstract: A semiconductor device assembly has a first substrate, a second substrate, and an anisotropic conductive film. The first substrate includes a first plurality of connectors. The second substrate includes a second plurality of connectors. The anisotropic conductive film is positioned between the first plurality of connectors and the second plurality of connectors. The anisotropic conductive film has an electrically insulative material and a plurality of interconnects laterally separated by the electrically insulative material. The plurality of interconnects forms electrically conductive channels extending from the first plurality of connectors to the second plurality of connectors. A method includes connecting the plurality of interconnects to the first plurality of connectors and the second plurality of connectors, such that the electrically conductive channels are operable to conduct electricity from the first substrate to the second substrate.

Abstract: A semiconductor device assembly has a first substrate, a second substrate, and an anisotropic conductive film. The first substrate includes a first plurality of connectors. The second substrate includes a second plurality of connectors. The anisotropic conductive film is positioned between the first plurality of connectors and the second plurality of connectors. The anisotropic conductive film has an electrically insulative material and a plurality of interconnects laterally separated by the electrically insulative material. The plurality of interconnects forms electrically conductive channels extending from the first plurality of connectors to the second plurality of connectors. A method includes connecting the plurality of interconnects to the first plurality of connectors and the second plurality of connectors, such that the electrically conductive channels are operable to conduct electricity from the first substrate to the second substrate.

Abstract: A semiconductor device includes a substrate including traces, wherein the traces protrude above a top surface of the substrate; a prefill material over the substrate and between the traces; a die attached over the substrate; and a wafer-level underfill between the prefill material and the die.

Abstract: Embodiments of the present disclosure provide a transparent display device and a manufacturing method thereof. The transparent display device includes a display panel and a total internal reflection photonic crystal backplate, the display panel includes a display side and an incident side opposite to the display side, the total internal reflection photonic crystal backplate is disposed at the incident side of the display panel; the total internal reflection photonic crystal backplate includes a substrate and a plurality of pillar structures periodically arranged in the substrate, wherein a refractive index of the plurality of pillar structures is different from a refractive index of the substrate.

Abstract: A color film substrate includes a substrate, a light-shielding matrix, and a functional composite layer. The light-shielding matrix is over the substrate. The functional composite layer is over the substrate and is electrically conductive. The functional composite layer includes a composite material including a quantum dot and a graphene and is configured to convert white light into color light.

Abstract: A semiconductor device includes a substrate including traces, wherein the traces protrude above a top surface of the substrate; a prefill material over the substrate and between the traces, wherein the prefill material directly contacts peripheral surfaces of the traces; a die attached over the substrate; and a wafer-level underfill between the prefill material and the die.

Abstract: A display system includes: a display screen having a first display area; a processor configured to modulate laser beams to be emitted from a laser projector according to a pre-stored holographic image data source to obtain modulated laser beams; the laser projector configured to project the modulated laser beams to create a first holographic image in front of the first display area; and at least one photodetector configured to collect first gesture information about a first gesture through which the first holographic image is controlled by a viewer. The processor is further configured to generate a first control signal according to the first gesture information, and re-modulate the laser beams to be emitted from the laser projector, so as to create a second holographic image corresponding to the first control signal.

Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface having bond pads operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate. Methods of fabrication and related electronic systems are also disclosed.

Abstract: Provided are a device packing facility and method using DEHT and a device processing apparatus utilizing the DEHT. The device packaging facility includes a mounting unit providing bis(2-ethylhexyl) terephthalate (DEHT) between first and second devices to attach the first and second devices to each other, a processing unit thermally processing the first and second devices that are attached to each other to remove the DEHT and fix the first and second devices to each other, and a transfer unit transferring the first and second devices that are attached to each other from the mounting unit to the processing unit.

Abstract: A semiconductor device assembly that includes a substrate having a first side and a second side, the first side having at least one dummy pad and at least one electrical pad. The semiconductor device assembly includes a first semiconductor device having a first side and a second side and at least one electrical pillar extending from the second side. The electrical pillar is connected to the electrical pad via solder to form an electrical interconnect. The semiconductor device assembly includes at least one dummy pillar extending from the second side of the first semiconductor device and a liquid positioned between an end of the dummy pillar and the dummy pad. The surface tension of the liquid pulls the dummy pillar towards the dummy pad. The surface tension may reduce or minimize a warpage of the semiconductor device assembly and/or align the dummy pillar and the dummy pad.

Abstract: Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.

Abstract: A semiconductor device includes a substrate including traces, wherein the traces protrude above a top surface of the substrate; a prefill material over the substrate and between the traces, wherein the prefill material directly contacts peripheral surfaces of the traces; a die attached over the substrate; and a wafer-level underfill between the prefill material and the die.

Abstract: A semiconductor device assembly that includes a substrate having a first side and a second side, the first side having at least one dummy pad and at least one electrical pad. The semiconductor device assembly includes a first semiconductor device having a first side and a second side and at least one electrical pillar extending from the second side. The electrical pillar is connected to the electrical pad via solder to form an electrical interconnect. The semiconductor device assembly includes at least one dummy pillar extending from the second side of the first semiconductor device and a liquid positioned between an end of the dummy pillar and the dummy pad. The surface tension of the liquid pulls the dummy pillar towards the dummy pad. The surface tension may reduce or minimize a warpage of the semiconductor device assembly and/or align the dummy pillar and the dummy pad.