Abstract: Methods of forming devices, including LED devices, are described. The devices may include fluorinated compound layers. The methods described may utilize a plasma treatment to form the fluorinated compound layers. The methods described may operate to produce an intermetallic layer that bonds two substrates such as semiconductor wafers together in a relatively efficient and inexpensive manner.

Abstract: A plasma ashing process for removing photoresist, polymers and/or residues from a substrate comprises placing the substrate including the photoresist, polymers, and/or residues into a reaction chamber; generating a plasma from a gas mixture comprising oxygen gas (O2) and/or an oxygen containing gas; suppressing and/or reducing fast diffusing species in the plasma; and exposing the substrate to the plasma to selectively remove the photoresist, polymers, and/or residues from the substrate, wherein the plasma is substantially free from fast diffusing species.

Abstract: Non-oxidizing plasma treatment devices for treating a semiconductor workpiece generally include a substantially non-oxidizing gas source; a plasma generating component in fluid communication with the non-oxidizing gas source; a process chamber in fluid communication with the plasma generating component, and an exhaust conduit centrally located in a bottom wall of the process chamber. In one embodiment, the process chamber is formed of an aluminum alloy containing less than 0.15% copper by weight; In other embodiments, the process chamber includes a coating of a non-copper containing material to prevent formation of copper hydride during processing with substantially non-oxidizing plasma. In still other embodiments, the process chamber walls are configured to be heated during plasma processing. Also disclosed are non-oxidizing plasma processes.

Abstract: A microelectronic device wafer includes an adhesive molded in-situ on the wafer. Adhesives and wafers are positioned in molds and a method that includes drawing in the molds at least a partial vacuum and partially curing the adhesive provides an in-situ molded adhesive that is positioned on the wafer. The adhesives can be in liquid, solid, or other forms prior to molding. During molding, the adhesive can be partially cured by heating or irradiating.

Abstract: Front end of line (FEOL) plasma mediated ashing processes for removing organic material from a substrate generally includes exposing the substrate to the plasma to selectively remove photoresist, implanted photoresist, polymers and/or residues from the substrate, wherein the plasma contains a ratio of active nitrogen and active oxygen that is larger than a ratio of active nitrogen and active oxygen obtainable from plasmas of gas mixtures comprising oxygen gas and nitrogen gas. The plasma exhibits high throughput while minimizing and/or preventing substrate oxidation and dopant bleaching. Plasma apparatuses are also described.

Abstract: A microelectronic device wafer includes an adhesive molded in-situ on the wafer. Adhesives and wafers are positioned in molds and a method that includes drawing in the molds at least a partial vacuum and partially curing the adhesive provides an in-situ molded adhesive that is positioned on the wafer. The adhesives can be in liquid, solid, or other forms prior to molding. During molding, the adhesive can be partially cured by heating or irradiating.

Abstract: Methods for applying a dielectric protective layer to a wafer in wafer-level chip-scale package manufacture are disclosed. A flowable dielectric protective material with fluxing capability is applied over the active surface of an unbumped semiconductor wafer to cover active device areas, bond pads, test socket contact locations, and optional pre-scribed wafer street trenches. Preformed solder balls are then disposed over the bond pads, and the wafer is subjected to a heating process to reflow the solder balls and at least partially cure the dielectric protective material. During the heating process, the dielectric protective material provides a fluxing capability to enable the solder balls to wet the bond pads. In other exemplary embodiments, the dielectric protective material is applied over only intended physical contact locations and/or pre-scribed wafer street trenches, in which case the dielectric protective material need not include flux material and may additionally include a filler material.

Abstract: An electrical condition monitoring method utilizes measurement of electrical resistivity of a conductive composite degradation sensor to monitor environmentally induced degradation of a polymeric product such as insulated wire and cable. The degradation sensor comprises a polymeric matrix and conductive filler. The polymeric matrix may be a polymer used in the product, or it may be a polymer with degradation properties similar to that of a polymer used in the product. The method comprises a means for communicating the resistivity to a measuring instrument and a means to correlate resistivity of the degradation sensor with environmentally induced degradation of the product.

Abstract: A stacked semiconductor die assembly includes at least two partially offset semiconductor dice with bond pads located adjacent at least one peripheral side thereof supported on a redistribution element formed of a material of substantially similar CTE to that of the dice, and a paddle-less lead frame secured to the redistribution element during fabrication, including encapsulation. The assembly is configured to be substantially vertically symmetrical with respect to inner ends of lead fingers of the lead frame to facilitate uniform encapsulant flow. The semiconductor die assembly may be configured in a package with leads extending from two sides thereof, such as a thin small outline package (TSOP), or four sides thereof, such as a quad flat pack (QFP).

Abstract: Processes for stripping high dose ion implanted photoresist while minimizing substrate loss. The processes generally include passivation of the substrate surface before and/or during a plasma mediated stripping process. By passivating the substrate surface before and/or during the plasma mediated stripping process, oxidation is substantially reduced during plasma stripping thereby leading to reduced substrate loss.

Abstract: A stacked semiconductor die assembly includes at least two partially offset semiconductor dice with bond pads located adjacent at least one peripheral side thereof supported on a redistribution element formed of a material of substantially similar CTE to that of the dice, and a paddle-less lead frame secured to the redistribution element during fabrication, including encapsulation. The assembly is configured to be substantially vertically symmetrical with respect to inner ends of lead fingers of the lead frame to facilitate uniform encapsulant flow. The semiconductor die assembly may be configured in a package with leads extending from two sides thereof, such as a thin small outline package (TSOP), or four sides thereof, such as a quad flat pack (QFP).

Abstract: Infrared (IR) absorbing layers and microelectronic imaging units that employ such layers are disclosed herein. In one embodiment, a method of manufacturing a microelectronic imaging unit includes attaching an IR-absorbing lamina having a filler material to a backside die surface of an imager workpiece. An individual imaging die is singulated from the workpiece such that a section of the infrared-absorbing lamina remains attached to the individual imaging die. The individual imaging die is coupled to an interposer substrate with a portion of the IR-absorbing lamina positioned therebetween. In another embodiment, the IR-absorbing lamina is a die attach film and the filler material is carbon black.

Abstract: An electrical condition monitoring method utilizes measurement of electrical resistivity of a conductive composite degradation sensor to monitor environmentally induced degradation of a polymeric product such as insulated wire and cable. The degradation sensor comprises a polymeric matrix and conductive filler. The polymeric matrix may be a polymer used in the product, or it may be a polymer with degradation properties similar to that of a polymer used in the product. The method comprises a means for communicating the resistivity to a measuring instrument and a means to correlate resistivity of the degradation sensor with environmentally induced degradation of the product.

Abstract: Methods for applying a dielectric protective layer to a wafer in wafer-level chip scale package manufacture are disclosed. A flowable dielectric protective material with fluxing capability is applied over the active surface of an unbumped semiconductor wafer to cover active device areas, bond pads, test socket contact locations, and optional pre-scribed wafer street trenches. Preformed solder balls are then disposed over the bond pads, and the wafer is subjected to a heating process to reflow the solder balls and at least partially cure the dielectric protective material. During the heating process, the dielectric protective material provides a fluxing capability to enable the solder balls to wet the bond pads. In other exemplary embodiments, the dielectric protective material is applied over only intended physical contact locations and/or pre-scribed wafer street trenches, in which case the dielectric protective material need not include flux material and may additionally include a filler material.

Abstract: An electrical condition monitoring method utilizes measurement of electrical resistivity of an age sensor made of a conductive matrix or composite disposed in a polymeric structure such as an electrical cable. The conductive matrix comprises a base polymer and conductive filler. The method includes communicating the resistivity to a measuring instrument and correlating resistivity of the conductive matrix of the polymeric structure with resistivity of an accelerated-aged conductive composite.

Abstract: Microfeature devices, microfeature workpieces, and methods for manufacturing microfeature devices and microfeature workpieces are disclosed herein. The microfeature workpieces have an integrated circuit, a surface, and a plurality of interconnect elements projecting from the surface and arranged in arrays on the surface. In one embodiment, a method includes forming a coating on the interconnect elements of the microfeature workpiece, producing a layer over the surface of the microfeature workpiece after forming the coating, and removing the coating from at least a portion of the individual interconnect elements. The coating has a surface tension less than a surface tension of the interconnect elements to reduce the extent to which the material in the layer wicks up the interconnect elements and produces a fillet at the base of the individual interconnect elements.

Abstract: A stacked semiconductor die assembly includes at least two partially offset semiconductor dice with bond pads located adjacent at least one peripheral side thereof supported on a redistribution element formed of a material of substantially similar CTE to that of the dice, and a paddle-less lead frame secured to the redistribution element during fabrication, including encapsulation. The assembly is configured to be substantially vertically symmetrical with respect to inner ends of lead fingers of the lead frame to facilitate uniform encapsulant flow. The semiconductor die assembly may be configured in a package with leads extending from two sides thereof, such as a thin small outline package (TSOP), or four sides thereof, such as a quad flat pack (QFP).

Abstract: Microfeature devices, microfeature workpieces, and methods for manufacturing microfeature devices and microfeature workpieces are disclosed herein. The microfeature workpieces have an integrated circuit, a surface, and a plurality of interconnect elements projecting from the surface and arranged in arrays on the surface. In one embodiment, a method includes forming a coating on the interconnect elements of the microfeature workpiece, producing a layer over the surface of the microfeature workpiece after forming the coating, and removing the coating from at least a portion of the individual interconnect elements. The coating has a surface tension less than a surface tension of the interconnect elements to reduce the extent to which the material in the layer wicks up the interconnect elements and produces a fillet at the base of the individual interconnect elements.

Abstract: Microfeature devices, microfeature workpieces, and methods for manufacturing microfeature devices and microfeature workpieces are disclosed herein. The microfeature workpieces have an integrated circuit, a surface, and a plurality of interconnect elements projecting from the surface and arranged in arrays on the surface. In one embodiment, a method includes forming a coating on the interconnect elements of the microfeature workpiece, producing a layer over the surface of the microfeature workpiece after forming the coating, and removing the coating from at least a portion of the individual interconnect elements. The coating has a surface tension less than a surface tension of the interconnect elements to reduce the extent to which the material in the layer wicks up the interconnect elements and produces a fillet at the base of the individual interconnect elements.

Abstract: Semiconductor device structures include protective layers that are formed from healable or healed materials. The healable materials are configured to eliminate cracks and delamination, including singulation-induced cracks and delamination. The protective layers may be formed by applying a layer of protective material to surfaces of semiconductor device components that are carried by a fabrication substrate. The layer of protective material is then severed and the fabrication substrate is at least partially severed. Cracks and delaminated regions that are formed during severing are then healed. If a curable polymer is employed as the protective material, it may be partially cured before severing is effected, then self-healed before being fully cured. Alternatively, a thermoplastic material may be used as the protective material, with healing being effected by heating at least regions of the thermoplastic material.