Abstract: The present disclosure provides a shift register, a display device, and a method for driving the display device. A pull-down module and a stop module are added in the shift register. When a full screen picture is displayed, the signal output port outputs a high-level signal to the gate line connected with the signal output port, such that the gate line scans the display panel of the display device normally. The pull-down module may maintain the pull-up node and the signal output port at a low-level during the non-working time of the shift register, so as to prevent the shift register from outputting noise. When a local picture is displayed, under the control of the stop signal input port Stop, the stop module outputs the low-level signal to the gate line connected with the signal output port, such that the gate line stops scanning the display panel.

Abstract: An array substrate and a manufacturing method thereof and a display are disclosed. The array substrate includes a base substrate, a plurality of sub-pixels disposed on the base substrate, and a phase shift pattern disposed on the base substrate to separate the sub-pixels; the phase shift pattern is disposed to allow light passing through the phase shift pattern to undergo phase shift, and positions corresponding to the phase shift pattern are substantially opaque to light. Lateral light leakage is reduced by the phase shift pattern, and transmission rate of products become uniform, and therefore stability of products are increased.

Abstract: A sealant, a preparation method and a curing method thereof, and a display apparatus are provided. The sealant includes a viscous transparent base material and electrochromic material doped in the base material. The electrochromic material is mutually linked to form a conductive chain and can change color in the case that an electric field is applied upon the electrochromic material, to prevent light from passing through.

Abstract: In one embodiment, a bi-directional punch-through semiconductor device can include: a first transistor in a first region of a semiconductor substrate of a first conductivity type, where the first transistor includes a semiconductor buried layer of a second conductivity type in the semiconductor substrate, and a first epitaxy region of an epitaxy semiconductor layer above the semiconductor buried layer, the semiconductor buried layer being configured as a base of the first transistor; and a second transistor coupled in parallel with the first transistor, where the second transistor is in a second region of the semiconductor substrate of the first conductivity type, where the second transistor comprises a second epitaxy region of the epitaxy semiconductor layer above the semiconductor substrate, and a first doped region of the second conductivity type in the second epitaxy region, the first doped region being configured as a base of the second transistor.

Abstract: The present disclosure describes a display Q_panel, a display panel and a manufacturing method thereof, as well as a display apparatus. The display Q_panel comprises a first and a second substrate for cell assembling to pre-form a plurality of display panels. The display Q_panel is provided, between the first substrate and the second substrate, with a blocking wall at the edge region on at least one side thereof, the blocking wall being located externally to the outmost cutting line on that side where it is located, and the sealant on that side being provided internally to the blocking wall. By providing a blocking wall externally to the outmost cutting line on the display Q_panel, the blocking wall blocks the spill-out of the sealant on that side, reduces the undesirable phenomena of sealant puncture, sealant break, etc. arising from the display panels after the cutting, can respond better to the Peel-off, Bending or other tests, and improves the robustness of glass cell assembling.

Abstract: A shift register unit includes a pull-down maintenance module configured to pull down potentials at a pull-up node and a gate signal output end; a reset module configured to, at a touch stage within one frame of time, reset a potential of a signal from the gate signal output end to a potential of a fourth signal; a first signal output control module configured to, at a display stage within one frame of time, control a first signal output end to output a first common electrode signal, and at the touch stage within one frame of time, control the first signal output end to output a first signal input in the first signal input end. The first signal is a signal inputted at the touch stage to a common electrode connected to the shift register unit.

Abstract: According to the present disclosure, there are disclosed a pixel structure, a dual-gate pixel structure and a display device. The pixel structure comprises: a thin film transistor, a passivation layer that is located over the thin film transistor, an upper pixel electrode that is located over the passivation layer, a lower pixel electrode that is located under a gate insulating layer of the thin film transistor; and a common voltage line that is located between the passivation layer and the gate insulating layer. The common voltage line overlaps with the lower pixel electrode and the upper pixel electrode at least in part with the gate insulating layer and the passivation layer interposed therebetween, respectively, so as to form a storage capacitance.

Abstract: A shift register unit, a shift register circuit, an array substrate and a display device can avoid a phenomenon that light lines and dark lines appear alternately in a horizontal direction in a gray scale state when the display device is lighted up normally, wherein the phenomenon is generated because a clock signal causes an abnormal output of a gate scanning voltage of the shift register unit when a frame start signal comes. The shift register unit comprises a capacitor (C1), a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), and a voltage pulling-down control module. The shift register unit, the shift register circuit, the array substrate and the display device can be used for the manufacture of a display.

Abstract: A fiber link recognition method, device, and system, to recognize different fiber links where the method includes sending, by a link recognition device, a first test optical signal, receiving a second test optical signal that is returned after the first test optical signal is sent to a connection port of a first optical node, acquiring a reflection peak of the second test optical signal on a fiber link, determining a port identifier of the connection port of the first optical node according to the reflection peak of the second test optical signal on the fiber link, and recognizing, the fiber link corresponding to the second test optical signal that is returned by the connection port of the first optical node. The method embodiment is used to recognize a fiber link.

Abstract: Embodiments of the present disclosure relate to a technique of liquid crystal display, and provide a shift register unit circuit, a shift register, an array substrate and a display apparatus. A first TFT is added in the shift register unit circuit and is used to pull down the level of a node PU when a frame start signal is at a high level and a forward clock signal changes from a low level to the high level, such that a H-line defect generated in an output signal caused by a coupling effect of a coupling circuit can be avoided, which is advantageous for increasing productivity and yield rate of products.

Abstract: An integrated circuit (IC) electromagnetic interference (EMI) filter with electrostatic discharge (ESD) protection incorporating inductor-capacitor (LC) resonance tanks is disclosed. The filter comprises at least one circuit composed of a diode and an inductor connected in series, wherein the diode induces a parasitic capacitance and the circuit is grounded. When a number of the circuit is two, a passive element is coupled between the two inductors and cooperates with them to induce two parasitic capacitances connected with the circuits. When a number of the circuit is one, two diodes respectively connect with the inductor through two passive elements. Each diode can induce a parasitic capacitance. The two passive elements and the inductor can induce a parasitic capacitance connected with the circuit.

Abstract: The present disclosure discloses a gate driving circuit, a gate driving method and a display device. The gate driving circuit includes a plurality of cascaded shift register units for outputting gate driving signals, each of the gate driving signals being output by a gate driving signal output terminal of each shift register unit; the gate driving circuit further includes: a gate driving control unit connected with the shift register unit for controlling the gate driving signal to be transmitted to N rows of pixel circuits time-divisionally, wherein N is a positive integer greater than or equal to 2.

Abstract: The disclosure of the present invention discloses a touch display panel. The touch display panel comprises a color filter substrate, an array substrate, a liquid crystal layer and a touch sensing film positioned at a side of the color filter substrate which is away from the liquid crystal layer, wherein the color filter substrate comprises a substrate and a black matrix provided with a plurality of opening areas which are in array distribution; the touch sensing film comprises a substrate, one side of the substrate is provided with a plurality of first electrodes, the other side surface of the substrate is provided with a plurality of second electrodes, the projections of the first electrodes and the second electrodes on the color filter substrate are intersected with each other, the first electrodes are color filter electrodes, and the projections on the color filter substrate are opposite to the opening areas.

Abstract: An in-cell touch panel and a display device are disclosed. In the in-cell touch panel, a plurality of mutually independent self-capacitance electrodes arranged in the same layer are disposed on an array substrate in accordance the self-capacitance principle; a touch detection chip can determine the touch position by the detection of the capacitance variation of the self-capacitance electrodes; leads arranged in the same layer as pixel electrodes are disposed at gaps between the pixel electrodes and configured to connect the self-capacitance electrodes to the touch detection chip. The touch panel can reduce the manufacturing cost and improve the productivity.

Abstract: An integrated electromagnetic interference (EMI) filter circuit with electrostatic discharge (ESD) protection and incorporating capacitors is provided. At least one passive element, i.e. resistor or inductor is connected between an input terminal and an output terminal. A first capacitor is connected between ground and the input terminal, and a second capacitor is connected between ground and the output terminal. A first diode and a second diode are connected in parallel to the first capacitor and the second capacitor. One or multiple parallel capacitors are connected in parallel to the passive element and between the input terminal and the output terminal for frequency compensation by employing the novel EMI LPF circuit, it is extraordinarily advantageous of enhancing its rejection band attenuation and meanwhile maintaining high cut-off frequency while implementation.

Abstract: The present disclosure provides a shift register, a display device, and a method for driving the display device. A pull-down module and a stop module are added in the shift register. When a full screen picture is displayed, the signal output port outputs a high-level signal to the gate line connected with the signal output port, such that the gate line scans the display panel of the display device normally. The pull-down module may maintain the pull-up node and the signal output port at a low-level during the non-working time of the shift register, so as to prevent the shift register from outputting noise. When a local picture is displayed, under the control of the stop signal input port Stop, the stop module outputs the low-level signal to the gate line connected with the signal output port, such that the gate line stops scanning the display panel.

Abstract: The present invention provides an optical path processing method and apparatus. The apparatus includes an FA, an LA, an aspheric lens, a filter, and a reflector, where the FA includes a test optical channel, where the test optical channel is configured to receive test light, and enable the test light to be incident through the LA and the aspheric lens to a surface of the filter; the filter is located between the aspheric lens and the reflector, and is configured to perform transmission on the test light; and the reflector is at a distance of less than or equal to a first preset value away from a focus of light transmitted through the aspheric lens, and is configured to reflect, at a preset angle, the test light transmitted through the filter to a specular surface of the reflector.

Abstract: The present disclosure discloses a gate driving circuit, a gate driving method and a display device. The gate driving circuit includes a plurality of cascaded shift register units for outputting gate driving signals, each of the gate driving signals being output by a gate driving signal output terminal of each shift register unit; the gate driving circuit further includes: a gate driving control unit connected with the shift register unit for controlling the gate driving signal to be transmitted to N rows of pixel circuits time-divisionally, wherein N is a positive integer greater than or equal to 2.

Abstract: The embodiment of present invention discloses a liquid crystal display panel and a liquid crystal display. The liquid crystal display panel comprises: a color filter substrate and an array substrate, which are assembled oppositely to form a cell; a liquid crystal layer provided between the color filter substrate and the array substrate; and a layered structure adapted to drive rotation of liquid crystal in the liquid crystal layer and comprising a gate metallic layer, a pixel electrode layer and a common electrode layer, wherein the gate metallic layer comprises a gate wiring, the common electrode layer comprises a first auxiliary electrode and a common electrode that are electrically-insulated, the pixel electrode layer comprises a pixel electrode, and the common electrode and the pixel electrodes are used to form an electric field for driving the liquid crystal; and wherein the first auxiliary electrode and the gate wiring are electrically connected so as to be connected in parallel in circuit.

Abstract: The present invention provides an optical component and an optical device, and the optical component includes a two-dimensional fiber array and a compensation block, where an end face of the two-dimensional fiber array is obliquely polished as a whole; the compensation block is disposed between the two-dimensional fiber array and another optical component; any two light beams that pass through the two-dimensional fiber array and are emitted from the obliquely polished end face of the two-dimensional fiber array are incident to an end face of the compensation block in parallel, and are incident to an end face of the another optical component in parallel after being refracted by another end face of the compensation block.