Abstract: A thin film packaging structure includes a first inorganic packaging layer, an organic packaging layer provided at a side of the first inorganic packaging layer, a second inorganic packaging layer provided at a side of the organic packaging layer facing away from the first inorganic packaging layer, and at least one first inorganic adjusting layer. An oxygen content of the at least one first inorganic adjusting layer is greater than an oxygen content of the first inorganic packaging layer and/or the second inorganic packaging layer; the at least one first inorganic adjusting layer includes two first inorganic adjusting layers; one of the two first inorganic adjusting layers is provided between the organic packaging layer and the second inorganic packaging layer; and another one of the two first inorganic adjusting layers is provided on a side of the second inorganic packaging layer facing away from the organic packaging layer.

Abstract: An array substrate includes a substrate, first power supply signal lines, data lines and fan-out lines. The fan-out lines each include a first sub-line and a second sub-line; an end of the second sub-line is electrically connected to the first sub-line, another end of the second sub-line is electrically connected to a single data line, and the second sub-line is insulated from remaining data lines of the data lines. The first sub-line and main structures of the data lines are disposed in a same layer. An orthographic projection, on the substrate, of a first sub-line passing through a column of sub-pixel regions is substantially located between an orthographic projection, on the substrate, of a first power supply signal line passing through the column of sub-pixel regions and an orthographic projection, on the substrate, of a data line passing through the column of sub-pixel regions.

Abstract: A display substrate and a manufacturing method therefor, and a display device are provided in the present disclosure. The display substrate includes a drive circuit layer disposed on a substrate, the drive circuit layer includes a plurality of circuit units, at least one circuit unit of the plurality of circuit units includes a pixel drive circuit, a first power supply line providing a power supply signal to the pixel drive circuit, a data signal line providing a data signal to the pixel drive circuit, and a data fan-out line connected with the data signal line; at least a portion of the first power supply line, the data signal line, and the data fan-out line extends along a second direction and is arranged at intervals along a first direction.

Abstract: The present disclosure provides a worm gear machine, including a workbench, a cutter holder and a cutter holder adjusting system, where the cutter holder includes a big bracket, a first slide rail is disposed on the big bracket, a slide seat in sliding fit with the first slide rail is disposed on the first slide rail, a second slide rail is disposed on the slide seat, a small bracket in sliding fit with the second slide rail is disposed on the second slide rail; and a cutter holder spindle is disposed between the big bracket and the slide seat, a cutter bar synchronously rotating with the cutter holder spindle is disposed between an end of the cutter holder spindle facing toward the small bracket and the small bracket, and a gearbox for driving the cutter spindle to rotate is disposed in the big bracket.

Abstract: A display substrate, a manufacturing method therefor, and a display device are disclosed. The display substrate includes multiple circuit units constituting multiple unit rows and multiple unit columns, multiple data signal lines and multiple data connection lines, the data connection lines include first connection lines extending along a first direction and second connection lines extending along a second direction, and the first connection lines are connected to the second connection lines; and in at least one circuit unit, the first connection lines are connected to the data signal lines through first connection holes, and at least one data signal line is provided between two first connection holes adjacent in the first direction.

Abstract: A thin film packaging structure includes a first inorganic packaging layer for covering a device to be packaged; an organic packaging layer formed at a side of the first inorganic packaging layer; a second inorganic packaging layer formed at a side of the organic packaging layer facing away from the first inorganic packaging layer; and at least one first inorganic layer formed at a side of the first inorganic packaging layer facing away from the device to be packaged. The at least one first inorganic layer has an elasticity modulus greater than that of the first inorganic packaging layer or the second inorganic packaging layer. The present disclosure also provides a display panel.

Abstract: A method for constructing a body-in-white (BiW) spot welding deformation prediction model based on a graph convolutional network (GCN) includes: 1) acquiring a welding feature and 3D coordinates of a spot weld to form an eigenvector and extracting designed 3D coordinates at each 3D coordinate measurement point; 2) encoding, by an encoder, eigenvectors and designed 3D coordinate vectors into hidden space vectors of spot welds and hidden space vectors of the coordinate measurement points, respectively, and constructing a graph topology G through a k-nearest neighbors algorithm; 3) decomposing a Laplacian eigenvector of the constructed graph topology G to acquire frequency domain components, and linearly transforming eigenvalues corresponding to the frequency domain components to construct a multi-layer GCN; 4) inputting the thermodynamic and kinetic information of each coordinate measurement point into a deep neural network and decoding a final deformation at each coordinate measurement point; and 5) optimizing

Abstract: A display panel having a bonding region for bonding an integrated circuit is provided. The display panel includes a base substrate; and a plurality of bonding pin structures on the base substrate arranged in a plurality of columns, respectively. A respective bonding pin structure includes a respective bonding pin and connection lines on two ends of the respective bonding pin, respectively. Bonding pins of the plurality of bonding pin structures are arranged in N rows, N is a positive integer equal to or greater than 4. (N?1) number of connection lines pass through a region between two adjacent bonding pins arranged in a same row.

Abstract: A method for identifying a critical error of a worm gear machine, step 1: obtaining an actual forward kinematic model T27a and an ideal forward kinematic model T27i from a coordinate system of a worm gear hob to a coordinate system of a worm gear, thereby establishing a geometric error-pose error model of the worm gear machine; step 2: regarding the geometric error-pose error model of the worm gear machine as a multi-input multi-output (MIMO) nonlinear system, and solving, by taking the geometric error of each motion axis of the worm gear machine as an input feature X, and a pose error between the worm gear hob and the worm gear as an output variable Y, an importance coefficient of each input feature with a random forest algorithm; and step 3: determining a critical error affecting a machining accuracy of the worm gear machine.

Abstract: An array substrate is provided. The array substrate includes a plurality of first reset signal lines configured to provide a plurality of first reset signals, a plurality of second reset signal lines configured to provide a plurality of second reset signals, a plurality of third reset signal lines, and a plurality of first connecting lines. A respective first reset signal line is connected to a row of first connecting lines, which in turn are connected to source electrodes of first reset transistors in a row of subpixels, respectively. The plurality of second reset signal lines and the plurality of third reset signal lines form an interconnected reset signal supply network. A respective second reset signal line is connected to one or more of the plurality of third reset signal lines. A respective third reset signal line is connected to one or more of the plurality of second reset signal lines.

Abstract: Provided are a driver IC and a display device. The driver IC includes at least one GOA pad area. Each of the at least one GOA pad area includes a plurality of first pads arranged in a plurality of rows and a plurality of columns. Each of the plurality of columns of the first pads is divided into at least two first pad groups arranged independently of each other. Each of the at least two of the first pad groups includes at least two of the first pads adjacent to each other, and the first pads in each of the first pad groups are electrically connected with each other. The driver IC further includes a plurality of leads electrically connected with the first pad groups, and each of the first pad groups is electrically connected with a different lead.

Abstract: A display substrate has a display area and a peripheral area. The display substrate includes a base substrate; an insulating layer on the base substrate and in at least the peripheral area; a plurality of light emitting elements on the base substrate and in the display area; an encapsulating layer on a side of the plurality of light emitting elements distal to the base substrate to encapsulate the plurality of light emitting elements; and a dam layer on a side of the insulating layer distal to the base substrate. The encapsulating layer includes a first inorganic encapsulating sublayer extending from the display area into the peripheral area. The display substrate has a groove extending into the first insulating layer in the peripheral area, and substantially surrounding the display area. The first inorganic encapsulating sublayer extends into at least a portion of the groove.

Abstract: Disclosed are a display substrate, a preparation method thereof, and a display apparatus. The display substrate includes a display region and a non-display region surrounding the display region, wherein the non-display region includes a first border region at least partially surrounding the display region, a second border region and a lead convergence region located on a side of the display region, the lead convergence region is located between the first border region and the second border region, and the lead convergence region includes two corner regions and an intermediate convergence region located between the two corner regions; a plurality of data line leads, at least located in the first border region and the lead convergence region, and electrically connected with a plurality of data lines in the display region.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of subpixels provided on the base substrate. Each subpixel includes a pixel circuit. The plurality of subpixels include first subpixels. The display substrate further includes power lines. Each power line is configured to provide a first supply voltage for the corresponding first subpixels, the power line is provided on a side of the pixel electrode of the first subpixel near the base substrate, and the power line includes a power line main body and a power line protrusion protruded from the power line main body. The power line protrusion is at least partially overlapped with the pixel electrode of the first subpixel in a direction perpendicular to the base substrate. The display substrate can effectively improve the display quality.

Abstract: A display substrate and a manufacturing method therefor, and a display device are provided in the present disclosure. The display substrate includes a drive circuit layer disposed on a substrate, the drive circuit layer includes a plurality of circuit units, at least one circuit unit of the plurality of circuit units includes a pixel drive circuit, a first power supply line providing a power supply signal to the pixel drive circuit, a data signal line providing a data signal to the pixel drive circuit, and a data fan-out line connected with the data signal line; at least a portion of the first power supply line, the data signal line, and the data fan-out line extends along a second direction and is arranged at intervals along a first direction.

Abstract: A display substrate and a preparation method thereof, and a display apparatus is provided in the present disclosure. The display substrate include a drive circuit layer disposed on the substrate, the drive circuit layer includes a plurality of circuit units, the circuit units include a pixel drive circuit and a data signal wire providing a data signal to the pixel drive circuit and an initial signal wire providing an initial signal; the plurality of circuit units includes at least one normal circuit unit and at least one tracing circuit unit, the normal circuit unit is provided with a first compensation line extending along a first direction and a second compensation line extending along a second direction.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of subpixels provided on the base substrate. Each subpixel includes a pixel circuit. The plurality of subpixels include first subpixels. The display substrate further includes power lines. Each power line is configured to provide a first supply voltage for the corresponding first subpixels, the power line is provided on a side of the pixel electrode of the first subpixel near the base substrate, and the power line includes a power line main body and a power line protrusion protruded from the power line main body. The power line protrusion is at least partially overlapped with the pixel electrode of the first subpixel in a direction perpendicular to the base substrate. The display substrate can effectively improve the display quality.

Abstract: A display panel, a manufacturing method thereof, and a display device are provided. The display panel comprises a base substrate, an effective region provided on the base substrate and a bonding region located on one side of the effective region; the bonding region comprises a bonding pin region including a bonding pin, a virtual pin and test signal lines; an orthographic projection of at least one of the test signal lines on the base substrate is within a range of an orthographic projection of the virtual pin on the base substrate, and the orthographic projection of the virtual pin on the base substrate does not overlap with an orthographic projection of the bonding pin on the base substrate.

Abstract: A display substrate and a preparation method therefor, and a display device, the display substrate including a base as well as a display area, a binding needle area, a first unit test electrode and a second unit test electrode which are on one side of the base. The binding needle area is on one side of the display area; the first unit test electrode is on the side, away from the display area, of the binding needle area; the second unit test electrode is on the side, away from the binding needle area, of the first unit test electrode; the display substrate comprises a first metal layer, a second metal layer and an insulating layer between the first metal layer and the second metal layer; the first unit test electrode is on the first metal layer, and the second unit test electrode is on the second metal layer.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of subpixels provided on the base substrate. Each subpixel includes a pixel circuit. The plurality of subpixels include first subpixels. The display substrate further includes power lines. Each power line is configured to provide a first supply voltage for the corresponding first subpixels, the power line is provided on a side of the pixel electrode of the first subpixel near the base substrate, and the power line includes a power line main body and a power line protrusion protruded from the power line main body. The power line protrusion is at least partially overlapped with the pixel electrode of the first subpixel in a direction perpendicular to the base substrate. The display substrate can effectively improve the display quality.