Patents by Inventor Shinichi Saito

Shinichi Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240068380
    Abstract: There is provided a pit initiation evaluation system or the like capable of predicting pit initiation effectively and at low cost. In a pit initiation evaluation system of an embodiment, a pit initiation evaluation unit creates and retains, based on a dry-wet alternate time data, a deposit impurity concentration data, and a pit initiation data on pitting corrosion initiated in each of a plurality of turbine stages when an operation is actually performed in the steam turbine, a pit initiation evaluation table presenting a relationship between a dry-wet alternate time, a deposit impurity concentration, and pit initiation. Further, the pit initiation evaluation unit is configured to evaluate, by using the pit initiation evaluation table, pitting corrosion to be initiated in each of the plurality of turbine stages in an operation planned for the steam turbine.
    Type: Application
    Filed: November 2, 2022
    Publication date: February 29, 2024
    Applicant: TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Yuka TSUKADA, Kazuhiro SAITO, Yusuke SUZUKI, Yoshikazu NINOMIYA, Osamu TANAKA, Yasuteru KAWAI, Shinichi TERADA, Makoto SASAKI
  • Patent number: 11916164
    Abstract: A method for manufacturing a light-emitting element includes providing the light-emitting element that includes a light-emitting layer with an emission wavelength of not more than 306 nm and a p-type layer including AlGaInN including Mg as an acceptor, and removing hydrogen in the p-type layer from the light-emitting element by irradiating the light-emitting element with ultraviolet light at a wavelength of not more than 306 nm from outside and treating the light-emitting element with heat in a state in which a reverse voltage, or a forward voltage lower than a threshold voltage of the light-emitting element, or no voltage is applied to the light-emitting element. The removing of hydrogen in the p-type layer from the light-emitting element is performed in a N2 atmosphere at not less than 650° C. or in a N2+O2 atmosphere at not less than 500° C.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: February 27, 2024
    Assignees: TOYODA GOSEI CO., LTD., MEIJO UNIVERSITY
    Inventors: Yoshiki Saito, Shinya Boyama, Shinichi Matsui, Hiroshi Miwa, Kengo Nagata, Tetsuya Takeuchi, Hisanori Ishiguro
  • Publication number: 20240039495
    Abstract: An equalizer circuit includes a variable gain equalizer circuit. A third transistor MN for gain adjustment is coupled between a source of a first transistor that constitutes an input differential pair of the variable gain equalizer circuit, and a first current source IB. A fourth transistor MN for gain adjustment is coupled between a source of a second transistor that constitutes the input differential pair, and a second current source IB. A first bias voltage Vb is supplied to the gates of the third transistor MN and the fourth transistor MN, so as to enable DC gain control of the variable gain equalizer circuit.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 1, 2024
    Inventor: Shinichi SAITO
  • Publication number: 20240039522
    Abstract: The first stage of the differential interface circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The gates of the first transistor and the second transistor are coupled to input terminals, respectively. The third transistor and the fourth transistor are coupled in parallel with the first transistor and the second transistor, respectively. The gate of the third transistor is coupled to the drain of the second transistor, and the gate of the fourth transistor is coupled to the drain of the first transistor.
    Type: Application
    Filed: July 24, 2023
    Publication date: February 1, 2024
    Inventor: Shinichi SAITO
  • Patent number: 11874540
    Abstract: A resonator modulator for modulating light in a photonic circuit, the modulator comprising: a capacitor formed of a ring-shaped insulating region sandwiched between an outer conductive region and an inner conductive region, wherein at least one of the outer conductive regions or the inner conductive regions is a polycrystalline semiconductor material.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: January 16, 2024
    Assignee: University of Southampton
    Inventors: Weiwei Zhang, Graham Reed, David Thomson, Martin Ebert, Shinichi Saito
  • Publication number: 20230401888
    Abstract: A contactless biometric authentication device including an insertion chamber with an opening in one side and a space into which an authenticator's finger is inserted; a shooting device positioned to capture the ventral side of the finger inserted into the insertion chamber; a first light source installed in the insertion chamber at a position on the far side of the shooting device and emits light toward the shooting device, the light being blocked by the inserted finger; a second light source provided at a position higher than a height at which the finger is inserted and emits light within a predetermined range including the shooting device when the light from the first light source is blocked by the finger, the light being absorbed by a blood vessel of the finger; and a reflection surface provided in the insertion chamber and receives and reflects the light from the second light source.
    Type: Application
    Filed: June 8, 2023
    Publication date: December 14, 2023
    Inventors: Yo NONOMURA, Akio NAGASAKA, Naoto MIURA, Yusuke MATSUDA, Keiichiro NAKAZAKI, Masahiro KATO, Shinichi SAITO, Kyoichi TAKAHASHI
  • Publication number: 20230075435
    Abstract: A macroscopic entanglement state in which a polarization state has a strong quantum correlation is realized by use of a macroscopic laser light. A laser oscillator includes a ring resonator having an optical fiber ring, an optical amplifier for maintaining an amplitude of a laser pulsed light propagating on the optical fiber ring, and three optical fibers that are connected with respective polarization controllers, and, after changing a polarization state of the laser pulsed light being a qubit extracted at a predetermined branch ratio from the optical fiber ring by the polarization controllers, couples the changed laser pulsed light whose polarization state has been changed with the laser pulsed light propagating on the optical fiber ring, and each polarization controller rotates the polarization state of the laser pulsed light with an S1 axis, an S2 axis, and an S3 axis, which are orthogonal to each other, as a rotation axis.
    Type: Application
    Filed: March 7, 2022
    Publication date: March 9, 2023
    Inventor: Shinichi SAITO
  • Publication number: 20220271213
    Abstract: A semiconductor device includes an active region famed in a semiconductor layer formed on an insulating film famed in a semiconductor substrate and having a first extension portion extending in a first direction and a second extension portion extending in a second direction intersecting with the first direction, a first diffusion layer electrode of a first conductivity type provided in the first extension portion, second and third diffusion layer electrodes of a second conductivity type provided in the second extension portion so as to interpose a first connecting portion connecting the first extension portion and the second extension portion, a first gate electrode famed on the first extension portion between the first diffusion layer electrode and the first connecting portion through an insulating film famed on the semiconductor layer, and a second gate electrode famed on the first connecting portion through the insulating film famed on the semiconductor layer.
    Type: Application
    Filed: February 2, 2022
    Publication date: August 25, 2022
    Inventors: Digh HISAMOTO, Satoru AKIYAMA, Toshiyuki MINE, Noriyuki LEE, Gou SHINKAI, Shinichi SAITO, Ryuta TSUCHIYA
  • Publication number: 20220244580
    Abstract: A resonator modulator for modulating light in a photonic circuit, the modulator comprising: a capacitor formed of a ring-shaped insulating region sandwiched between an outer conductive region and an inner conductive region, wherein at least one of the outer conductive regions or the inner conductive regions is a polycrystalline semiconductor material.
    Type: Application
    Filed: January 28, 2022
    Publication date: August 4, 2022
    Inventors: Weiwei ZHANG, Graham REED, David THOMSON, Martin EBERT, Shinichi SAITO
  • Publication number: 20220171251
    Abstract: An optical modulator includes first and second waveguides; a first phase shifter provided in at least one of the first and second waveguides and configured to control a phase of the laser beam; a first optical element configured to combine the laser beam propagating through the first waveguide and the laser beam propagating through the second waveguide and separate the combined laser beam into two laser beams; a third (fourth) waveguide on which one (the other) of the laser beams separated by the first optical element is incident; a second phase shifter provided in at least one of the third and fourth waveguides and configured to control a phase of the laser beam; and a second optical element configured to combine the laser beam propagating through the third waveguide and the laser beam propagating through the fourth waveguide and emit the laser beam in the superposition state.
    Type: Application
    Filed: October 29, 2021
    Publication date: June 2, 2022
    Inventor: Shinichi SAITO
  • Patent number: 11256113
    Abstract: A method of fabricating an optical structure comprises providing a layer of single crystal crystalline silicon supported on an insulating surface of a silicon substrate; using etching to remove part of the silicon layer and define a side wall which is non-parallel to the insulating surface of the substrate; forming a layer of insulating material over the side wall; forming a further layer of silicon over at least the insulating material; and removing the silicon of the further layer to a level of the layer of silicon such that the layer of insulating material occupies a slot between a portion of silicon in the layer and a portion of silicon in the further layer, a thickness of the layer of insulating material defining a width of the slot.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: February 22, 2022
    Assignee: University of Southampton
    Inventors: Kapil Debnath, Graham Reed, Shinichi Saito
  • Patent number: 10559407
    Abstract: There are provided a process for producing an electrical wire molded body comprising: step I of melting and kneading a polyethylene-based resin (a), a polypropylene-based resin (b), a block copolymer (c) of an aromatic vinyl-based compound and a conjugated diene-based compound and the like, and a silane coupling agent (g), and other components, to produce a silane crosslinkable flame retardant polyolefin (A); step II of melting and kneading a polymer selected from the components (a) to (c) and a silanol condensation catalyst (i), to produce a silanol catalyst rein composition (B); and step III of mixing the components (A) and (B), melt molding the mixture on a conductor and then crosslinking the molded body in the presence of water.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: February 11, 2020
    Assignee: Riken Technos Corporation
    Inventors: Shinichi Kishimoto, Shinichi Saito, Hideo Ohsawa
  • Publication number: 20190250434
    Abstract: A method of fabricating an optical structure comprises providing a layer of single crystal crystalline silicon supported on an insulating surface of a silicon substrate; using etching to remove part of the silicon layer and define a side wall which is non-parallel to the insulating surface of the substrate; forming a layer of insulating material over the side wall; forming a further layer of silicon over at least the insulating material; and removing the silicon of the further layer to a level of the layer of silicon such that the layer of insulating material occupies a slot between a portion of silicon in the layer and a portion of silicon in the further layer, a thickness of the layer of insulating material defining a width of the slot.
    Type: Application
    Filed: August 9, 2017
    Publication date: August 15, 2019
    Inventors: Kapil DEBNATH, Graham REED, Shinichi SAITO
  • Patent number: 10050611
    Abstract: An oscillation circuit includes: an oscillator configured to generate N phase clocks (where N is an integer of 2 or more) including a first phase clock to Nth phase clock whose phases are shifted by 360°/N at regular intervals; a pulse generating part configured to receive a plurality of the N phase clocks and generate a plurality of intermediate pulses each having a duty ratio of 25%; and a clock synthesizing part configured to synthesize the plurality of intermediate pulses to generate a single phase output clock or multi-phase output clocks, the single phase output clock and the multi-phase output clocks having a frequency that is twice an oscillation frequency of the oscillator.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: August 14, 2018
    Assignee: ROHM CO., LTD.
    Inventor: Shinichi Saito
  • Patent number: 9653478
    Abstract: Provided is a semiconductor element having, while maintaining the same integratability as a conventional MOSFET, excellent switch characteristics compared with the MOSFET, that is, having the S-value less than 60 mV/order at room temperature. Combining the MOSFET and a tunnel bipolar transistor having a tunnel junction configures a semiconductor element that shows an abrupt change in the drain current with respect to a change in the gate voltage (an S-value of less than 60 mV/order) even at a low voltage.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: May 16, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Digh Hisamoto, Shinichi Saito, Akio Shima, Hiroyuki Yoshimoto
  • Publication number: 20160344378
    Abstract: An oscillation circuit includes: an oscillator configured to generate N phase clocks (where N is an integer of 2 or more) including a first phase clock to Nth phase clock whose phases are shifted by 360°/N at regular intervals; a pulse generating part configured to receive a plurality of the N phase clocks and generate a plurality of intermediate pulses each having a duty ratio of 25%; and a clock synthesizing part configured to synthesize the plurality of intermediate pulses to generate a single phase output clock or multi-phase output clocks, the single phase output clock and the multi-phase output clocks having a frequency that is twice an oscillation frequency of the oscillator.
    Type: Application
    Filed: May 4, 2016
    Publication date: November 24, 2016
    Inventor: Shinichi SAITO
  • Patent number: 9503253
    Abstract: Transmission circuit for transmitting serial data with superposed clock signal includes encoder to scramble parallel data of information and apply predetermined coding scheme to generate D symbols having clock signal embedded therein, and to output alternately continuous predetermined number of the D symbols and one of K symbols as synchronization control codes for the scrambling; and parallel-to-serial converter configured to convert the D symbols and the K symbols output from the encoder into serial data, wherein, for each period of the scrambling, the encoder outputs K symbols, each of which is allocated to one of the first code indicating beginning of the period of the scrambling, the second code allocated at equal interval among remaining ones of the K symbols other than that for the first code, and a third code allocated among remaining ones of the K symbols other than those for the first code and the second code.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: November 22, 2016
    Assignee: ROHM CO., LTD.
    Inventor: Shinichi Saito
  • Patent number: 9461774
    Abstract: A reception circuit for receiving serial data including first pixel data constituting image data from a transmission circuit, wherein the serial data has a format allowing the reception circuit to detect a transmission error, the reception circuit including a serial-to-parallel converter configured to receive the serial data and convert the received serial data into first parallel data, an error detector configured to determine whether the first parallel data is correct or erroneous based on the first parallel data, a correcting buffer configured to maintain the first pixel data included in the first parallel data if the first parallel data is determined to be correct by the error detector, and a correcting unit configured to substitute the first pixel data included in the first parallel data determined to be erroneous by the error detector with a value corresponding to second pixel data stored in the correcting buffer.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: October 4, 2016
    Assignee: ROHM CO., LTD.
    Inventor: Shinichi Saito
  • Patent number: 9422844
    Abstract: An exhaust purification device for an engine comprises a catalyst device that purifies the exhaust gas of the engine by using an additive; a venturi-shaped mixing chamber that is disposed upstream from the catalyst device and extends from a taper portion with a diameter tapering downstream to continue to a constricted portion with a minimum diameter and then to a flared portion with a diameter that is increased in the downstream direction; a swirl-generating device that is disposed in vicinity of a most upstream section of the taper portion of the mixing chamber and generates a swirling flow in the exhaust gas; and an additive-injection device that is disposed upstream from the constricted portion of the mixing chamber and downstream from the swirl-generating device, and injects the additive into the mixing chamber.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: August 23, 2016
    Assignee: MITSUBISHI FUSO TRUCK AND BUS CORPORATION
    Inventors: Yasuko Suzuki, Hiroaki Fujita, Satoshi Hiranuma, Shinichi Saito, Yoshio Nakayama
  • Publication number: 20160127120
    Abstract: Transmission circuit for transmitting serial data with superposed clock signal includes encoder to scramble parallel data of information and apply predetermined coding scheme to generate D symbols having clock signal embedded therein, and to output alternately continuous predetermined number of the D symbols and one of K symbols as synchronization control codes for the scrambling; and parallel-to-serial converter configured to convert the D symbols and the K symbols output from the encoder into serial data, wherein, for each period of the scrambling, the encoder outputs K symbols, each of which is allocated to one of the first code indicating beginning of the period of the scrambling, the second code allocated at equal interval among remaining ones of the K symbols other than that for the first code, and a third code allocated among remaining ones of the K symbols other than those for the first code and the second code.
    Type: Application
    Filed: January 13, 2016
    Publication date: May 5, 2016
    Inventor: Shinichi SAITO