Abstract: The present invention discloses an image sensor circuit and a ramp signal generator thereof. The image sensor circuit includes: an active pixel sensor (APS) array which includes plural pixel circuits arranged in an array of columns and rows; plural slope analog-to-digital converter (ADC), wherein each of the slope ADC is coupled to the corresponding column, and generates a digital sampling signal according to a ramp signal together with a pixel signal including a reset signal and a image signal which are generated by the pixel circuit located in the selected row and in the column corresponding to the slope ADC; and the ramp signal generator, which generates the ramp signal, wherein the ramp signal generator includes an active integrator, and the active integrator generates the ramp signal by charging an integration capacitor with a gain current.

Abstract: A method for determining locations of supporting points for a machine tool is proposed. Multiple test coordinate sets in relation to the machine tool are used in cooperation with corresponding deformation index values for multiple components of the machine tool to obtain a deformation index equation that relates to assessed deformation of the components in response to different coordinates for the supporting points. The deformation index equation is used to acquire an optimal coordinate set for the supporting points.

Abstract: A method for determining locations of supporting points for a machine tool is proposed. Multiple test coordinate sets in relation to the machine tool are used in cooperation with corresponding deformation index values for multiple components of the machine tool to obtain a deformation index equation that relates to assessed deformation of the components in response to different coordinates for the supporting points. The deformation index equation is used to acquire an optimal coordinate set for the supporting points.

Abstract: A composition and a coating structure applying with the same are provided. The composition includes 3 wt % to less than 15 wt % of Al, 10 wt % to less than 30 wt % of Cr, higher than 0 wt % to 15 wt % of O, higher than 0 wt % to 15 wt % of Y, and the remainder being at least one of Co or Ni.

Abstract: A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus.

Abstract: A clock and data recovery circuit includes a sampler, a skew compensation block, a pulse generator, and an injection locked oscillator. The injection locked oscillator generates a recovered clock signal, the pulse generator generates a pulse signal according to input data for controlling the injection locked oscillator, the skew compensation block compensates the input data and generate compensated data, and the sampler samples the compensated data according to the recovered clock signal.

Abstract: A clock and data recovery circuit includes a sampler, a skew compensation block, a pulse generator, and an injection locked oscillator. The injection locked oscillator generates a recovered clock signal, the pulse generator generates a pulse signal according to input data for controlling the injection locked oscillator, the skew compensation block compensates the input data and generate compensated data, and the sampler samples the compensated data according to the recovered clock signal.

Abstract: A clock and data recovery circuit includes a sampler, a skew compensation block, a pulse generator, and an injection locked oscillator. The injection locked oscillator generates a recovered clock signal, the pulse generator generates a pulse signal according to input data for controlling the injection locked oscillator, the skew compensation block compensates the input data and generate compensated data, and the sampler samples the compensated data according to the recovered clock signal.

Abstract: A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus.

Abstract: A photocatalytic film structure is provided. The photocatalytic film includes a plurality of micron particles; a plurality of nano particles; and a plurality of block bodies, wherein the volume of each of the block bodies is greater than that of each of the nano particles, and each of the micron particles, the nano particles and the block bodies contains zinc oxide and a doping metal, and wherein the amount of the doping metal is 1 to 5 wt % of the photocatalytic film, and the plurality of micron particles and micron particles take up 10 to 50% of the volume of the photocatalytic film.

Abstract: A composition and a coating structure applying with the same are provided. The composition includes 3 wt % to less than 15 wt % of Al, 10 wt % to less than 30 wt % of Cr, higher than 0 wt % to 15 wt % of O, higher than 0 wt % to 15 wt % of Y, and the remainder being at least one of Co or Ni.

Abstract: An oscillating signal generator includes: a controllable oscillator arranged to output an oscillating signal according to a control signal and a band adjusting signal; a control circuit arranged to generate a continuous signal having a specific slew-rate when the control signal reaches a boundary of a control signal interval; and a current mirror arranged to generate the band adjusting signal according to at least the continuous signal.

Abstract: A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus.

Abstract: A coating layer with well protection and thermal conductivity has a workpiece; and a coating layer with a thickness ranged between 160˜500 micrometer deposited on the workpiece; wherein, the coating layer is formed by the feedstock material, the feedstock material is Al—Cu—Mo—W, Al/B4C, CoCrAlY/Al2O3, Cr3C2—NiCr/SiC—Ni, Cr3C2—NiCr/SiC—Ni treated with Ball mill or Ni—Al—Mo—W. The coating layer is able to avoid wear of the surface of the workpiece, and has well protection and thermal conductivity, to avoid the situation of damage or mechanical property changing occurred due to the temperature of the surface rising caused by the friction.

Abstract: An oscillating signal generator includes: a controllable oscillator arranged to output an oscillating signal according to a control signal and a band adjusting signal; a control circuit arranged to generate a continuous signal having a specific slew-rate when the control signal reaches a boundary of a control signal interval; and a current mirror arranged to generate the band adjusting signal according to at least the continuous signal.

Abstract: A clock and data recovery circuit includes a sampler, a skew compensation block, a pulse generator, and an injection locked oscillator. The injection locked oscillator generates a recovered clock signal, the pulse generator generates a pulse signal according to input data for controlling the injection locked oscillator, the skew compensation block compensates the input data and generate compensated data, and the sampler samples the compensated data according to the recovered clock signal.

Abstract: A photocatalytic film structure is provided. The photocatalytic film includes a plurality of micron particles; a plurality of nano particles; and a plurality of block bodies, wherein the volume of each of the block bodies is greater than that of each of the nano particles, and each of the micron particles, the nano particles and the block bodies contains zinc oxide and a doping metal, and wherein the amount of the doping metal is 1 to 5 wt % of the photocatalytic film, and the plurality of micron particles and micron particles take up 10 to 50% of the volume of the photocatalytic film.

Abstract: A cooking utensil and a manufacturing method thereof are provided. The cooking utensil includes a cooking body, a first metal-ceramic composite layer having an electromagnetic property and a second metal-ceramic composite layer having a heat conductive property. The cooking body has an external bottom surface. The first metal-ceramic composite layer is disposed on the external bottom surface of the cooking body. The second metal-ceramic composite layer is disposed on the first metal-ceramic composite layer. The cooking utensil is suitable for both an induction cooker and a gas burner.

Abstract: A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus.

Abstract: Disclosed is a method for wafer-level testing a plurality of diced multi-chip stacked packages. Each package includes a plurality of chips with vertically electrical connections such as TSVs. Next, according to a die-on-wafer array arrangement, the multi-chip stacked packages are fixed on a transparent reconstructed wafer by a photo-sensitive adhesive, and the packages are located within the component-bonding area of the wafer. Then, the transparent reconstructed wafer carrying the multi-chip stacked packages can be loaded into a wafer tester for probing. Accordingly, the wafer testing probers in the wafer tester can be utilized to probe the testing electrodes of the stacked packages so that it is easy to integrate this wafer-level testing method especially into TSV packaging processes.