Patents by Inventor Shin Liu

Shin Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8669808
    Abstract: A bias circuit for generating an output bias current includes a first transistor, a passive component, a second transistor, and a bias current generator. The first transistor has a first node coupled to a first reference voltage, a second node, and a control node. The passive component is coupled between the first reference voltage and the control node of the first transistor. The second transistor has a first node coupled to the control node of the first transistor, a control node coupled to the second node of the first transistor, and a second node for providing the output bias current according to a current passing through the passive component. The bias current generator is coupled to the second node of the first transistor, and implemented for providing the first transistor with a bias current.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: March 11, 2014
    Assignee: MediaTek Inc.
    Inventor: Shiue-Shin Liu
  • Patent number: 8526559
    Abstract: A clock generation circuit for a transmitter which transmits data according to an output clock signal is provided. The clock generation circuit include a clock generator and a phase locked loop (PLL). The clock generator generates a first clock signal. The PLL initially generates the output clock signal according to the first clock signal. When a frequency of the output clock signal generated according to the first clock signal is not within a range required for specification of the transmitter, the PLL generates the output clock signal according to a second clock signal.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: September 3, 2013
    Assignee: Mediatek Inc.
    Inventors: Kuan-Hua Chao, Shiue-Shin Liu, Tse-Hsiang Hsu
  • Publication number: 20130224392
    Abstract: A method for providing a coating layer with well protection and thermal conductivity, providing a coating layer material, the coating layer material set on a workpiece to form a coating layer with thickness 160˜500 micrometer. The coating layer is able to avoid wear of the surface of the workpiece, and has well protection and thermal conductivity, to avoid the situation of damage or mechanical property changing occurred due to the temperature of the surface rising caused by the friction.
    Type: Application
    Filed: May 7, 2012
    Publication date: August 29, 2013
    Inventors: Wei-Tien HSIAO, Mao-Shin Liu, Wu-Han Liu, Ming-Sheng Leu
  • Patent number: 8451971
    Abstract: A clock generation circuit is provided and includes a phase locked loop (PLL) and a calibrator. The PLL is arranged to receive a first clock signal and generate the output clock signal. The PLL adjusts the frequency of the output clock signal according to a control signal. The calibrator is arranged to receive the output clock signal and a second clock signal, execute a frequency calibration between the output clock signal and the second clock signal, and generate the control signal according to results of the frequency calibration.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: May 28, 2013
    Assignee: Mediatek Inc.
    Inventors: Kuan-Hua Chao, Shiue-Shin Liu, Jeng-Horng Tsai, Chih-Ching Chen, Chuan Liu, Tse-Hsiang Hsu
  • Publication number: 20120111872
    Abstract: A cooking utensil and a manufacturing method thereof are provided. The cooking utensil includes a cooking body, a first metal-ceramic composite layer having an electromagnetic property and a second metal-ceramic composite layer having a heat conductive property. The cooking body has an external bottom surface. The first metal-ceramic composite layer is disposed on the external bottom surface of the cooking body. The second metal-ceramic composite layer is disposed on the first metal-ceramic composite layer. The cooking utensil is suitable for both an induction cooker and a gas burner.
    Type: Application
    Filed: December 21, 2010
    Publication date: May 10, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ming-Sheng Leu, Wu-Han Liu, Wei-Tien Hsiao, Chang-Chih Hsu, Mao-Shin Liu, Zhong-Ren Wu
  • Patent number: 8169265
    Abstract: A phase lock loop circuit is provided. A phase frequency detector detects a phase difference between a feedback signal and a reference signal, and generates a phase error signal in response to the detected phase difference. A charge pump consists of at least one core device and outputs a current signal based on the phase error signal. An active loop filter receives and transfers the current signal into a control signal. Operating voltage of the active loop filter is higher than operating voltage of the charge pump. A controlled oscillator receives the control signal and generates an output signal in response to the control signal. A feedback divider receives the output signal to generate the feedback signal.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: May 1, 2012
    Assignee: Mediatek Inc.
    Inventor: Shiue-Shin Liu
  • Patent number: 8070479
    Abstract: An injection mold device includes: a stationary mold plate including a stationary mold body, a protrusion, and a sprue having a sprue open end; a movable mold plate formed with a first forming part; and a stripper plate including a stripper mold body, a recess, a second forming part, and a plurality of runners. When the stationary mold plate, the movable mold plate, and the stripper plate are assembled, the protrusion is received within the recess such that the sprue open end is in fluid communication with the runners, and the first forming part and the second forming part form a mold cavity.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: December 6, 2011
    Assignees: Silitek Electronic (Guangzhou) Co., Ltd., Lite-On Technology Corp.
    Inventors: Yuing Chang, Chung-Shin Liu, Li-Wei Chen
  • Patent number: 8008900
    Abstract: A DC-DC converter providing a DC output voltage at an output node. The DC-DC converter comprises an output stage, a digital controller, and a controller. The output stage comprises a pull-up circuit having a control terminal and coupled between a first fixed voltage and a internal node, a pull-down circuit coupled between the internal node and a second fixed voltage, and a low pass filter coupled between the internal node and the output node. The digital controller is powered by the DC output voltage and adjusts the DC output voltage by controlling the output stage. The controller controls a connection of a feedback path, comprising the digital controller, between the output node and the control terminal according to the DC output voltage.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: August 30, 2011
    Assignee: Mediatek Inc.
    Inventors: Shiue Shin Liu, Tse-Hsiang Hsu
  • Patent number: 8004038
    Abstract: A semiconductor device includes a first high-voltage well having a first dopant disposed in a semiconductor substrate; a second high-voltage well having a second dopant disposed in the semiconductor substrate, laterally adjacent to the first high-voltage well; a low-voltage well having the second dopant disposed overlying the second high-voltage well; a drain region having the first dopant disposed in the first high-voltage well; a source having the first dopant disposed in the low-voltage well; and a gate disposed on the semiconductor substrate and laterally between the source and the drain, wherein the gate includes a thin gate dielectric and a gate electrode.
    Type: Grant
    Filed: May 22, 2006
    Date of Patent: August 23, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsing-Yi Chien, Yu-Chang Jong, Te-Yin Hsia, Ruey-Shin Liu
  • Patent number: 7969168
    Abstract: An embodiment of the invention provides an integrated circuit. The integrated circuit has an analog device-under-test (DUT), a memory receiving and storing a test program and a processor. The processor tests the analog DUT and outputs a test result in digital format by executing the test program, wherein the test result indicates whether the analog DUT workable according to a specification.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: June 28, 2011
    Assignee: Mediatek Inc.
    Inventors: Chun-Yu Lin, Shiue-Shin Liu, Hsin-Yi Chen, Kang-Nin Lin
  • Publication number: 20110100975
    Abstract: A carrier for heating and keeping warm used for directly carrying food to-be kept warm is provided. The carrier for heating and keeping warm includes a carrier and at least a high melt point-electric heating alloy pattern. The carrier has a first surface and a second surface opposite to the first surface. The food is suitable for being directly placed on the first surface. A material of the second surface is ceramics or glass so that the second surface 114 and the first surface 112 can respectively have a characteristic of ceramic or glass. The high melt point-electric heating alloy pattern is coated on the second surface. A resistance of the high melt point-electric heating alloy pattern is substantially 0.5 ohm to 50 ohm, and a melt point of the high melt point-electric heating alloy pattern is equal to or higher than 1100° C.
    Type: Application
    Filed: November 2, 2010
    Publication date: May 5, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wu-Han Liu, Wei-Tien Hsiao, Mao-Shin Liu, Zhong-Ren Wu, Ming-Sheng Leu, Chang-Chih Hsu
  • Publication number: 20110063002
    Abstract: A bias circuit for generating an output bias current includes a first transistor, a passive component, a second transistor, and a bias current generator. The first transistor has a first node coupled to a first reference voltage, a second node, and a control node. The passive component is coupled between the first reference voltage and the control node of the first transistor. The second transistor has a first node coupled to the control node of the first transistor, a control node coupled to the second node of the first transistor, and a second node for providing the output bias current according to a current passing through the passive component. The bias current generator is coupled to the second node of the first transistor, and implemented for providing the first transistor with a bias current.
    Type: Application
    Filed: April 9, 2010
    Publication date: March 17, 2011
    Inventor: Shiue-Shin Liu
  • Publication number: 20110043179
    Abstract: A DC-DC converter providing a DC output voltage at an output node. The DC-DC converter comprises an output stage, a digital controller, and a controller. The output stage comprises a pull-up circuit having a control terminal and coupled between a first fixed voltage and a internal node, a pull-down circuit coupled between the internal node and a second fixed voltage, and a low pass filter coupled between the internal node and the output node. The digital controller is powered by the DC output voltage and adjusts the DC output voltage by controlling the output stage. The controller controls a connection of a feedback path, comprising the digital controller, between the output node and the control terminal according to the DC output voltage.
    Type: Application
    Filed: November 2, 2010
    Publication date: February 24, 2011
    Applicant: MEDIATEK INC.
    Inventors: Shiue Shin Liu, Tse-Hsiang Hsu
  • Patent number: 7890020
    Abstract: An organic photoconductor (OPC) drum includes a support member formed as a unitary molded body, a pair of mounting members, a pair of rollers, and an OPC belt. The support member includes a plurality of support plates, a plurality of groove-defining U-shaped segments, and first and second sidewalls. Each of the support plates extends in a first direction. Adjacent ones of the support plates are spaced apart from each other in a second direction transverse to the first direction. Each of the U-shaped segments interconnects a corresponding adjacent pair of the support plates. Each of the mounting members is coupled to a respective one of the first and second sidewalls. The rollers flank the support member in the second direction. The OPC belt is trained on an assembly of the support member and the rollers, and is driven by the rollers to move on the support plates.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: February 15, 2011
    Assignees: Silitek Electronic (Guangzhou) Co., Ltd., Lite-On Technology Corp.
    Inventors: Yuing Chang, Chung-Shin Liu, Hung-Huang Tai
  • Publication number: 20100332887
    Abstract: One exemplary storage control device for a storage medium includes a controller and a voltage detector, where the controller controls data access of the storage medium, and the voltage detector monitors a power signal and asserts a detection signal to notify the controller when anomaly of the power signal is detected. Another exemplary storage control device for a storage medium includes a voltage detector and a controller, where the voltage detector monitors a power signal to generate a detection signal, and the controller controls data access of the storage medium. In addition, the controller enters a first operational state when the detection signal indicates that a voltage level of the power signal falls within a first voltage range, and enters a second operational state when the detection signal indicates that the voltage level of the power signal falls within a second voltage range.
    Type: Application
    Filed: March 19, 2010
    Publication date: December 30, 2010
    Inventors: Tzu-Chieh Lin, Tzu-Li Hung, Kuan-Hua Chao, Shiue-Shin Liu, Hong-Ching Chen, Li-Chun Tu
  • Patent number: 7852057
    Abstract: A DC-DC converter providing a DC output voltage at an output node. The DC-DC converter comprises an output stage, a digital controller, and a controller. The output stage comprises a pull-up circuit having a control terminal and coupled between a first fixed voltage and a internal node, a pull-down circuit coupled between the internal node and a second fixed voltage, and a low pass filter coupled between the internal node and the output node. The digital controller is powered by the DC output voltage and adjusts the DC output voltage by controlling the output stage. The controller controls a connection of a feedback path, comprising the digital controller, between the output node and the control terminal according to the DC output voltage.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: December 14, 2010
    Assignee: Mediatek Inc.
    Inventors: Shiue Shin Liu, Tse-Hsiang Hsu
  • Publication number: 20100308882
    Abstract: A fine delay adjustment device is disclosed. The fine delay adjustment device in accordance with the present invention has at least one delay buffer having an output impedance; a capacitor connected to the delay buffer in series; and a variable resistive unit connected with the capacitor in series. The variable resistive unit has a variable resistance of the same order as the output impedance of the delay buffer. The fine delay adjustment of the present invention is capable of providing sub-ps adjustment steps. In the mean while, an increment due to the fine delay adjustment added to delay time is limited.
    Type: Application
    Filed: June 3, 2009
    Publication date: December 9, 2010
    Applicant: MEDIATEK INC.
    Inventor: Shiue-shin Liu
  • Publication number: 20100277245
    Abstract: A phase lock loop circuit is provided. A phase frequency detector detects a phase difference between a feedback signal and a reference signal, and generates a phase error signal in response to the detected phase difference. A charge pump consists of at least one core device and outputs a current signal based on the phase error signal. An active loop filter receives and transfers the current signal into a control signal. Operating voltage of the active loop filter is higher than operating voltage of the charge pump. A controlled oscillator receives the control signal and generates an output signal in response to the control signal. A feedback divider receives the output signal to generate the feedback signal.
    Type: Application
    Filed: April 29, 2009
    Publication date: November 4, 2010
    Applicant: MEDIATEK INC.
    Inventor: Shiue-Shin Liu
  • Publication number: 20100178376
    Abstract: An injection mold device includes: a stationary mold plate including a stationary mold body, a protrusion, and a sprue having a sprue open end; a movable mold plate formed with a first forming part; and a stripper plate including a stripper mold body, a recess, a second forming part, and a plurality of runners. When the stationary mold plate, the movable mold plate, and the stripper plate are assembled, the protrusion is received within the recess such that the sprue open end is in fluid communication with the runners, and the first forming part and the second forming part form a mold cavity.
    Type: Application
    Filed: April 29, 2009
    Publication date: July 15, 2010
    Inventors: Yuing Chang, Chung-Shin Liu, Li-Wei Chen
  • Patent number: 7733671
    Abstract: A switching regulator. A pulse width modulation (PWM) unit comprises an output stage and generates a PWM driving signal to control the output stage, such that an inductor delivers an inductor current signal to the load, and a slope compensation unit outputs a slope compensation signal with a compensation slope proportional to a falling slope of the inductor current signal to the PWM unit according to the inductor current signal.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: June 8, 2010
    Assignee: Mediatek Inc.
    Inventors: Hung-I Chen, Shiue Shin Liu