Patents by Inventor Shin To

Shin To has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12217802
    Abstract: A non-volatile memory device includes a meta area having a first region storing first initial data, and second regions storing second initial data, different from each other; a user area configured to store user data; an initialization register configured to store the first initial data or update the second initial data in whole or in part; and control logic configured to perform a read operation, a program operation, or an erase operation using the initial data stored in the initialization register.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: February 4, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jooyong Park, Sangwon Park, Dongjin Shin, Suchang Jeon, Seungyong Choi
  • Patent number: 12217112
    Abstract: An IC card provided with an IC chip, and configured to enable at least one of contact communication and contactless communication, the IC card including an ultrasonic fingerprint sensor connected to the IC chip and a storage unit in which fingerprint data for matching is stored. An outer surface of the IC card is formed of synthetic resin, and the ultrasonic fingerprint sensor is covered with the synthetic resin.
    Type: Grant
    Filed: April 14, 2023
    Date of Patent: February 4, 2025
    Assignee: TOPPAN INC.
    Inventors: Yukiko Katano, Tetsuya Tsukada, Shin Kataoka
  • Patent number: 12216914
    Abstract: A memory system includes a memory device including a first memory block used for power-loss data protection and a controller coupled to the memory device. The controller includes a hardware layer and a firmware layer. The hardware layer checks whether at least one write data entry belongs to a programmable range in the memory device after power loss occurs, determines whether a logical address associated with the at least one write data entry is repeated, and programs the at least one write data entry in the first memory block.
    Type: Grant
    Filed: October 3, 2022
    Date of Patent: February 4, 2025
    Assignee: SK hynix Inc.
    Inventors: Jin Pyo Kim, Ju Hyun Kim, Jong Soon Park, Woong Sik Shin, Woo Young Yang
  • Patent number: 12217014
    Abstract: Provided is a method of providing an interpretation result using visual information, and the method includes: acquiring a spatial domain image including line-of-sight information of a user and gaze position information in the spatial domain image; segmenting the acquired spatial domain image into a plurality of images; detecting text areas including text for each of the segmented images; generating text blocks, each of which is a text recognition result for each of the detected text areas, and determining the text block corresponding to the gaze position information; converting a first language included in the determined text block into a second language that is a target language; and providing the user with a conversion result of the second language.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: February 4, 2025
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jinxia Huang, Jong Hun Shin
  • Patent number: 12216916
    Abstract: Provided are a storage device and an operating method thereof. The storage device includes a non-volatile memory including a plurality of memory regions and a storage controller configured to control the non-volatile memory through a performance path and at least one direct path, the storage controller including a buffer memory configured to store recovery data, wherein the storage controller writes the recovery data to the non-volatile memory through the at least one direct path in response to power being cut off and a fault being detected in the performance path, the performance path is a path for performing a write operation, a read operation, and an erase operation, and the at least one direct path is a path for performing only a write operation.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: February 4, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youngsik Lee, Seunghyun Shin, Sunmi Yoo
  • Patent number: 12218106
    Abstract: In some embodiments, the present disclosure relates to a 3D integrated circuit (IC) stack that includes a first IC die bonded to a second IC die. The first IC die includes a first semiconductor substrate, a first interconnect structure arranged on a frontside of the first semiconductor substrate, and a first bonding structure arranged over the first interconnect structure. The second IC die includes a second semiconductor substrate, a second interconnect structure arranged on a frontside of the second semiconductor substrate, and a second bonding structure arranged on a backside of the second semiconductor substrate. The first bonding structure faces the second bonding structure. Further, the 3D IC stack includes a first backside contact that extends from the second bonding structure to the backside of the second semiconductor substrate and is thermally coupled to at least one of the first or second interconnect structures.
    Type: Grant
    Filed: July 25, 2023
    Date of Patent: February 4, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Yi-Shin Chu, Ping-Tzu Chen, Che-Wei Chen
  • Patent number: 12217680
    Abstract: A display device includes a first vertical power line extending in a first direction and receiving a first power source; and a first horizontal power line extending in a second direction intersecting the first direction between a first pixel and a second pixel and receiving the first power source, each of the first pixel and the second pixel includes first to third sub-pixels sequentially disposed in the first direction, the first pixel includes a first common pattern between the first sub-pixel and the second sub-pixel extending in the second direction, the first sub-pixel of the first pixel and the second sub-pixel of the first pixel share the first common pattern and are connected to the first vertical power line, and the third sub-pixel of the first pixel shares the first horizontal power line with the first sub-pixel of the second pixel.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: February 4, 2025
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dong Hee Shin, Sun Kwun Son, Sang Yong No
  • Patent number: 12218303
    Abstract: An energy storage device can include a first electrode, a second electrode and a separator between the first electrode and the second electrode wherein the first electrode includes an electrochemically active material and a porous carbon material, and the second electrode includes elemental lithium metal and carbon particles. A method for fabricating an energy storage device can include forming a first electrode and a second electrode, and inserting a separator between the first electrode and the second electrode, where forming the first electrode includes combining an electrochemically active material and a porous carbon material, and forming the second electrode includes combining elemental lithium metal and a plurality of carbon particles.
    Type: Grant
    Filed: December 26, 2023
    Date of Patent: February 4, 2025
    Assignee: Tesla, Inc.
    Inventors: Hieu Minh Duong, Porter Mitchell, Mohammed-Yazid Saidi, Joon Ho Shin, Haim Feigenbaum
  • Patent number: 12217709
    Abstract: A display apparatus includes a liquid crystal panel; a plurality of light sources configured to emit light; a substrate including a plurality of dimming blocks arranged in rows and columns, each dimming block of the plurality of dimming blocks including at least one light source of the plurality of light sources; a first driving device configured to control a driving current applied to light sources in first dimming blocks of the plurality of dimming blocks; and a second driving device configured to control a driving current applied to light sources in second dimming blocks of the plurality of dimming blocks, wherein the first dimming blocks, the second dimming blocks, the first driving device, and the second driving device are arranged on a first side of the substrate, and a layout of the first dimming blocks is different from a layout of the second dimming blocks.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: February 4, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seungyong Shin, Jungmo Kang, Changhoon Kim, Yongmin Jung
  • Patent number: 12218881
    Abstract: The disclosure relates to a wireless communication system, in which a method performed by a user equipment includes receiving, from a base station, information configuring a plurality of sounding reference signal (SRS) resources that are related with one channel state information-reference signal (CSI-RS) resource, receiving an SRS resource indicator (SRI) indicating at least one SRS resource from among the plurality of SRS resources, obtaining, based on an implicit precoding being indicated for an uplink channel, precoding information for the uplink channel based on the CSI-RS resource related with a most recently transmitted SRS of the at least one SRS resource indicated by the SRI, and transmitting, to the base station, the uplink channel based on the precoding information.
    Type: Grant
    Filed: December 22, 2023
    Date of Patent: February 4, 2025
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Hoon-dong Noh, Young-woo Kwak, Cheol-kyu Shin
  • Patent number: 12216467
    Abstract: A self-location estimation device includes a first self-location estimation unit, a second self-location estimation unit, and a first integration unit. The first self-location estimation unit estimates a current first self-location of an autonomous mobile body based on current image information acquired by an image sensor and environmental map information stored in an environmental map information storage unit. The second self-location estimation unit estimates a current second self-location of the autonomous mobile body based on the current image information and a learned parameter learned using the environmental map information. The first integration unit estimates a current self-location of the autonomous mobile body by integrating the first self-location and the second self-location.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: February 4, 2025
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Shin Yoshimura
  • Patent number: 12218302
    Abstract: An aspect of the present invention provides a rechargeable battery which makes placement of the electrode assembly in the case during assembly easy. The rechargeable battery includes an electrode assembly including a first electrode, a separator, and a second electrode, a case housing the electrode assembly and having an opening in a plane parallel to a flat side surface of the electrode assembly, the case being electrically connected to the first electrode, a cover closing the opening in the case, and an electrode terminal mounted to a terminal opening in the case and connected to the second electrode, wherein the electrode terminal and the second electrode are insulated from the case.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: February 4, 2025
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Hyun-Soo Lee, Jeong-Won Oh, Sang-Shin Choi
  • Patent number: 12219755
    Abstract: An IC device includes an active area positioned in a substrate, first and second contact structures overlying and electrically connected to the active area, a conductive element overlying and electrically connected to each of the first and second contact structures, an anti-fuse transistor device including a dielectric layer between a gate structure and the active area, a first selection transistor overlying the active area adjacent to each of the anti-fuse transistor device and the first contact structure, and a second selection transistor overlying the active area adjacent to each of the anti-fuse transistor device and the second contact structure.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: February 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Min-Shin Wu, Meng-Sheng Chang, Shao-Yu Chou, Yao-Jen Yang
  • Patent number: 12217977
    Abstract: A substrate treating method includes moving a first component of a substrate treatment device to a preset position in response to a treating process of the substrate treatment device, detecting, by a plurality of position detection sensors, a position of the first component, vision-testing, by a vision sensor, a positional state of the first component, and determining an operational state of an error in the detection of the plurality of position detection sensors or a malfunction of the substrate treatment device based on a detection result obtained by the plurality of position detection sensor and a test result obtained by the vision sensor.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: February 4, 2025
    Assignee: SEMES CO., LTD.
    Inventors: Oh Yeol Kwon, Soo Young Park, Soo Yeon Shin
  • Patent number: 12218080
    Abstract: A package structure is provided. The package structure includes a reinforced plate and multiple conductive structures penetrating through the reinforced plate. The package structure also includes a redistribution structure over the reinforced plate. The redistribution structure has multiple polymer-containing layers and multiple conductive features. The package structure further includes multiple chip structures bonded to the redistribution structure through multiple solder bumps. In addition, the package structure includes a protective layer surrounding the chip structures.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: February 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shin-Puu Jeng, Po-Yao Lin, Shuo-Mao Chen, Chia-Hsiang Lin
  • Patent number: 12217958
    Abstract: A method of pre-treating a substrate on which graphene will be directly formed may include pre-treating the substrate using a pre-treatment gas including at least a carbon source and hydrogen.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: February 4, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keunwook Shin, Janghee Lee, Seunggeol Nam, Hyeonjin Shin, Hyunseok Lim, Alum Jung, Kyung-Eun Byun, Jeonil Lee, Yeonchoo Cho
  • Patent number: 12218060
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate. A first conductive feature is over the substrate. A second conductive feature is over the substrate and is adjacent to the first conductive feature. The first and second conductive features are separated by a cavity. A dielectric liner extends from the first conductive feature to the second conductive feature along a bottom of the cavity and further extends along opposing sidewalls of the first and second conductive features. A dielectric cap covers and seals the cavity. The dielectric cap has a top surface that is approximately planar with top surfaces of the first and second conductive features. The first conductive feature and the second conductive feature comprise graphene intercalated with one or more metals.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: February 4, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shin-Yi Yang, Meng-Pei Lu, Chin-Lung Chung, Ming-Han Lee, Shau-Lin Shue
  • Patent number: 12217943
    Abstract: A substrate processing apparatus is provided. The apparatus comprises a chamber; a substrate support which is arranged in the chamber and has at least one first gas supply path; and at least one control valve configured to control a flow rate or pressure of gas supplied through the at least one first gas supply path. The substrate support includes a base, and an electrostatic chuck which is arranged on the base and has an upper surface. The upper surface has a plurality of protrusions and a first annular groove group. The first annular groove group comprises a first inner annular groove, a first intermediate annular groove, and a first outer annular groove. Any one of the first inner annular groove, the first intermediate annular groove, and the first outer annular groove communicates with the at least one first gas supply path.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: February 4, 2025
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kohei Otsuki, Shin Yamaguchi, Daisuke Satake
  • Patent number: 12218023
    Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface.
    Type: Grant
    Filed: November 21, 2023
    Date of Patent: February 4, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Sheng Lin, Chin-Hua Wang, Shu-Shen Yeh, Chien-Hung Chen, Po-Yao Lin, Shin-Puu Jeng
  • Patent number: 12219717
    Abstract: According to one embodiment of the present disclosure, an antenna device, an apparatus for manufacturing the same, and a method for manufacturing the same are disclosed. The antenna device according to one embodiment of the present disclosure comprises an antenna substrate sheet and an antenna pattern. A connecting PCB is attached on the antenna substrate sheet. The antenna pattern starts from one of a plurality of connecting terminals of the connecting PCB and ends at another one of the plurality of connecting terminals. The antenna pattern comprises a plurality of wires which functions as one line and a bridge. The plurality of wires is embedded on the antenna substrate sheet. The bridge connects the connecting PCB and a point where winding of the plurality of wires on the antenna substrate sheet is completed.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: February 4, 2025
    Assignee: Passcon Co., LTD.
    Inventor: Hyejoong Shin