Abstract: Various embodiments of the present disclosure relate to systems and methods for delivering various types of content (such as news articles) to users. Among other things, embodiments of the present disclosure help provide users with concise articles containing the best content from a variety of sources, and present such content in a task-oriented manner that is finite and incentivizes the user to review the content.

Abstract: A method of treating a condition related to iron deficiency. The method includes steps of identifying a patient having a condition related to iron deficiency and administering an effective amount of biocompatible iron oxide nanoparticles to the patient. The biocompatible iron oxide nanoparticles each contains an iron oxide core that is covered by one or more biocompatible polymers, each of which has a polyethylene glycol group, a silane group, and a linker linking, via a covalent bond, the polyethylene glycol group and the silane group.

Abstract: Various embodiments of the present disclosure relate to systems and methods for presenting content to users using expanding menus. Among other things, the expanding menus allow a range of categories of content to be simultaneously presented to a user on a display, even on smaller devices where display space is at a premium.

Abstract: A method of treating a condition related to iron deficiency. The method includes steps of identifying a patient having a condition related to iron deficiency and administering an effective amount of biocompatible iron oxide nanoparticles to the patient. The biocompatible iron oxide nanoparticles each contains an iron oxide core that is covered by one or more biocompatible polymers, each of which has a polyethylene glycol group, a silane group, and a linker linking, via a covalent bond, the polyethylene glycol group and the silane group.

Abstract: A power module for high/low voltage insulation is provided. The power module includes a first substrate, a second substrate and an insulating substrate. The first substrate includes a first control circuit and a light source, wherein the first control circuit controls the light source to emit light. The second substrate includes a light-sensing part, a second control circuit and a power device. The light-sensing part receives the light of the light source of the first substrate to send a sensing information. The second control circuit correspondingly drives the power device in accordance with the sensing information. The insulating substrate is disposed between the first substrate and second substrate.

Abstract: Various embodiments of the present disclosure relate to systems and methods for delivering various types of content (such as news articles) to users. Among other things, embodiments of the present disclosure help provide users with concise articles containing the best content from a variety of sources, and present such content in a task-oriented manner that is finite and incentivizes the user to review the content.

Abstract: A power module for high/low voltage insulation is provided. The power module includes a first substrate, a second substrate and an insulating substrate. The first substrate includes a first control circuit and a light source, wherein the first control circuit controls the light source to emit light. The second substrate includes a light-sensing part, a second control circuit and a power device. The light-sensing part receives the light of the light source of the first substrate to send a sensing information. The second control circuit correspondingly drives the power device in accordance with the sensing information. The insulating substrate is disposed between the first substrate and second substrate.

Abstract: A first back surface of a first chip faces toward a carrier. A first active surface of the first chip has first pads and a first insulting layer thereon. A second chip is disposed on the first chip and electrically connected to the carrier. A second active surface of the second chip faces toward the first active surface. The second active surface has second pads and a second insulting layer thereon. Bumps connect the first and second pads. First and second daisy chain circuits are respectively disposed on the first and second insulting layers. Hetero thermoelectric device pairs are disposed between the first and second chips and connected in series by the first and second daisy chain circuits, and constitute a circuit with an external device. First and second heat sinks are respectively disposed on a second surface of the carrier and a second back surface of the second chip.

Abstract: Chip package processes and chip package structures are provided. The chip package structure includes a substrate, a chip, an insulating layer, a third patterned conductive layer and an electronic element. The substrate has a first patterned conductive layer. The chip is disposed on the substrate. A second patterned conductive layer of the chip is bonded to the first patterned conductive layer of the substrate. The chip has a first through hole. The insulating layer is disposed on the chip and filled into the first through hole. The insulating layer has a second through hole which passes through the first through hole. The third patterned conductive layer is disposed on the insulating layer and filled into the second through hole to electrically connect to the first patterned conductive layer. The electronic element is disposed on the third patterned conductive layer and electrically connects to the third patterned conductive layer.

Abstract: A three dimensional display panel and a phase retardation film thereof are provided. The three dimensional display panel includes pixel units and a phase retardation film. Each pixel unit includes sub-pixel units corresponding to different color display areas. The phase retardation film includes a plurality of first phase regions and a plurality of second phase adjusting regions. The first phase regions and the second phase regions alternately arranged both in horizontal and vertical directions as a chessboard-like pattern for corresponding to the sub-pixel units, wherein a difference between a phase retardation of the first phase regions and a phase retardation of second phase regions is ½ wavelength (?).