Patents by Inventor Shinan Wang

Shinan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11673797
    Abstract: A microstructure and a method for manufacturing the same includes: disposing a liquid film on a surface of a substrate, wherein a solid-liquid interface is formed where the liquid film is in contact with the substrate; and irradiating the substrate with a laser of a predetermined waveband to etch the substrate at the solid-liquid interface, wherein the position where the laser is irradiated on the solid-liquid interface moves at least along a direction parallel to the surface of the substrate, and the absorption rate of the liquid film for the laser is greater than the absorption rate of the substrate for the laser.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: June 13, 2023
    Assignee: SHANGHAI INDUSTRIAL UTECHNOLOGY RESEARCH INSTITUTE
    Inventor: Shinan Wang
  • Publication number: 20220340412
    Abstract: The present application provides a thin film getter structure having a miniature heater and a manufacturing method thereof, the thin film getter structure comprising: a substrate; a heater formed at a side of a main face of the substrate; and a getter thin film formed on a surface of the heater, wherein the heater comprises: a first insulating thin film; a thin film resistance formed on an upper surface of the first insulating thin film; and a second insulating thin film covering the thin film resistance, both ends of the thin film resistance being electrodes exposed from the second insulating thin film.
    Type: Application
    Filed: April 18, 2022
    Publication date: October 27, 2022
    Inventors: Shinan WANG, Tao LU
  • Publication number: 20210284528
    Abstract: This present disclosure provides a microstructure and a method for manufacturing the same. The method includes: disposing a liquid film on a surface of a substrate, wherein a solid-liquid interface is formed where the liquid film is in contact with the substrate; and irradiating the substrate with a laser of a predetermined waveband to etch the substrate at the solid-liquid interface, wherein the position where the laser is irradiated on the solid-liquid interface moves at least along a direction parallel to the surface of the substrate, and the absorption rate of the liquid film for the laser is greater than the absorption rate of the substrate for the laser.
    Type: Application
    Filed: March 4, 2021
    Publication date: September 16, 2021
    Applicant: Shanghai Industrial ?Technology Research Institute
    Inventor: SHINAN WANG
  • Publication number: 20210229218
    Abstract: The present disclosure provides a laser processing device and a processing method for forming a fine structure on a substrate. The laser processing device includes a laser, a stage, an optical system, a pattern generation system, and a control system. The laser emits laser light. The stage supports the substrate. The optical system guides the laser light emitted by the laser to the substrate, thereby irradiating a light beam to the substrate, and the light beam is inclined relative to a surface of the substrate. The pattern generation system prepares a processing pattern of the fine structure. The control system controls the laser, the stage, and the optical system according to the processing pattern.
    Type: Application
    Filed: January 19, 2021
    Publication date: July 29, 2021
    Applicant: SHANGHAI INDUSTRIAL ยต TECHNOLOGY RESEARCH INSTITUTE
    Inventors: LI FENG, SHINAN WANG
  • Patent number: 10667392
    Abstract: The present invention offers a device requiring a reduced number of manufacturing processes and providing high electrical reliability, and a method for manufacturing the device. The method for manufacturing the device forms through holes in a substrate, fills the through holes with a conductive material through electroplating from a first surface side of the substrate, polishes the conductive material to form through wirings, and forms an element portion on the first surface side. Then, the method processes the substrate so that the positions of the end faces of the through wirings measured from the substrate surface on the first surface side are made smaller in depth than the positions of the end faces of the through wirings measured from the substrate surface on the second surface side.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: May 26, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shinan Wang, Yutaka Setomoto
  • Patent number: 10338034
    Abstract: A method for creating an electronic device including a semiconductor substrate, an element unit, a through wiring line, and a wiring portion includes forming interstitial via holes in a first surface of the substrate, forming a first insulating film on the inner walls of the via holes, forming openings that reach the first insulating film on the bottoms of the via holes from a second surface of the substrate, forming a second insulating film on the bottoms of the openings, forming a through wiring line in the via holes, forming an element unit that electrically connects the through wiring line, reducing the thickness of the substrate from the second surface so that the second surface becomes flush with the second insulating film on the bottoms of the openings, and forming a wiring portion, on the second insulating film, that electrically connects to the through wiring line.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: July 2, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shinan Wang, Yutaka Setomoto
  • Patent number: 10090780
    Abstract: A capacitive transducer includes a substrate having a first surface and a second surface opposite the first surface, the substrate including a through wire extending therethrough between the first surface and the second surface, and a cell on the first surface, the cell including a first electrode and a second electrode spaced apart from the first electrode with a gap between the first electrode and the second electrode. Conductive protective films are disposed over surfaces of the through wire on the first surface side and the second surface side of the substrate.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: October 2, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shinan Wang, Yutaka Setomoto
  • Patent number: 10073064
    Abstract: According to a method for manufacturing a device in which an electrode of an element is electrically connected to a penetrating wire in a substrate, a structure is prepared in which the element is arranged on the first substrate having a through hole formed therein: and a second substrate is prepared which has an electroconductive seed layer formed thereon. Then, a wall part is formed on the first substrate; a seed layer is joined to a face on an element side of the structure through a bonding layer; the bonding layer is removed; and the seed layer is exposed in the inside of the opening. The inside of the wall part and the through hole is filled with a conductor, with the use of the seed layer through electrolytic plating.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: September 11, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Shinichiro Watanabe, Shinan Wang
  • Patent number: 10018599
    Abstract: The present inventions provide a capacitive transducer that can reduce film damage on a substrate surface on a vibration film side due to a difference in thermal expansion coefficient between a through wiring and a substrate and a method of manufacturing the same. The capacitive transducer consists of a plurality of cells with each cell comprising a first electrode and a vibration film on a first surface side of a substrate having a through wiring that penetrates the substrate from a first surface to a second surface of the substrate, the vibration film including a second electrode that is formed with a gap from the first electrode. A holding member that holds a leading end of the through wiring is provided on the first surface side of the substrate.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: July 10, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Shinan Wang, Shinichiro Watanabe
  • Patent number: 9953734
    Abstract: A microstructure manufacturing method includes forming a first insulating film on an Si substrate, exposing an Si surface by removing a part of the first insulating film, forming a recessed portion by etching the Si substrate from the exposed Si surface, forming a second insulating film on a sidewall and a bottom of the recessed portion, forming an Si exposed surface by removing at least a part of the second insulating film formed on the bottom of the recessed portion, and filling the recessed portion with a metal from the Si exposed surface by electrolytic plating.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: April 24, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shinan Wang, Takashi Nakamura, Takayuki Teshima, Yutaka Setomoto, Shinichiro Watanabe
  • Patent number: 9927349
    Abstract: In a method of producing a device in which an element structure is provided on a substrate including a through wiring, a through hole is formed so as to extend from a first surface of the substrate to a second surface of the substrate disposed on an opposite side of the substrate to the first surface, the through wiring is formed by filling the through hole with an electrically conductive material, and the element structure is formed on a first surface side. In the step of forming the through hole, a degree of surface irregularities of an inner wall of the through hole is larger on the first surface side than on a second surface side.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: March 27, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shinan Wang, Yutaka Setomoto
  • Publication number: 20170167970
    Abstract: In a method of producing a device in which an element structure is provided on a substrate including a through wiring, a through hole is formed so as to extend from a first surface of the substrate to a second surface of the substrate disposed on an opposite side of the substrate to the first surface, the through wiring is formed by filling the through hole with an electrically conductive material, and the element structure is formed on a first surface side. In the step of forming the through hole, a degree of surface irregularities of an inner wall of the through hole is larger on the first surface side than on a second surface side.
    Type: Application
    Filed: December 14, 2016
    Publication date: June 15, 2017
    Inventors: Shinan Wang, Yutaka Setomoto
  • Publication number: 20170168025
    Abstract: A manufacturing method for a device includes a step of forming a through hole configured to extend from a first surface of a substrate to a second surface located on a side opposite from the first surface, a step of forming an insulating film on a surface of the substrate including an inner wall of the through hole, a step of filling the through hole with a conductive material so that the conductive material is in contact with the insulating film formed on the inner wall, a step of polishing the first surface of the substrate so that the conductive material filled in the through hole does not protrude from a surface of the insulating film on the surface of the substrate, and a step of forming an element to be connected to the conductive material on the polished first surface of the substrate.
    Type: Application
    Filed: December 9, 2016
    Publication date: June 15, 2017
    Inventors: Shinan Wang, Yutaka Setomoto
  • Publication number: 20170156209
    Abstract: The present invention offers a device requiring a reduced number of manufacturing processes and providing high electrical reliability, and a method for manufacturing the device. The method for manufacturing the device forms through holes in a substrate, fills the through holes with a conductive material through electroplating from a first surface side of the substrate, polishes the conductive material to form through wirings, and forms an element portion on the first surface side. Then, the method processes the substrate so that the positions of the end faces of the through wirings measured from the substrate surface on the first surface side are made smaller in depth than the positions of the end faces of the through wirings measured from the substrate surface on the second surface side.
    Type: Application
    Filed: November 29, 2016
    Publication date: June 1, 2017
    Inventors: Shinan Wang, Yutaka Setomoto
  • Patent number: 9530692
    Abstract: Provided is a method of forming a through wiring, including forming a first insulating film on a first surface and a second surface of a substrate; forming a through hole to pass through the first insulating film formed on the first surface side and the substrate; forming a second insulating film formed from a material different from that of the first insulating film on an inner wall of the through hole; forming a conductive film on the first insulating film formed on the second surface; forming an opening in the first insulating film by processing the first insulating film formed on the second surface; and filling an inner portion of the through hole with a conductive material by electrolytic plating using the conductive film exposed at the bottom portion of the through hole as a seed layer.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: December 27, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Shinan Wang, Hideshi Kawasaki
  • Publication number: 20160187299
    Abstract: A method for creating an electronic device including a semiconductor substrate, an element unit, a through wiring line, and a wiring portion includes forming interstitial via holes in a first surface of the substrate, forming a first insulating film on the inner walls of the via holes, forming openings that reach the first insulating film on the bottoms of the via holes from a second surface of the substrate, forming a second insulating film on the bottoms of the openings, forming a through wiring line in the via holes, forming an element unit that electrically connects the through wiring line, reducing the thickness of the substrate from the second surface so that the second surface becomes flush with the second insulating film on the bottoms of the openings, and forming a wiring portion, on the second insulating film, that electrically connects to the through wiring line.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 30, 2016
    Inventors: Shinan Wang, Yutaka Setomoto
  • Publication number: 20160163408
    Abstract: A microstructure manufacturing method includes forming a first insulating film on an Si substrate, exposing an Si surface by removing a part of the first insulating film, forming a recessed portion by etching the Si substrate from the exposed Si surface, forming a second insulating film on a sidewall and a bottom of the recessed portion, forming an Si exposed surface by removing at least a part of the second insulating film formed on the bottom of the recessed portion, and filling the recessed portion with a metal from the Si exposed surface by electrolytic plating.
    Type: Application
    Filed: January 27, 2016
    Publication date: June 9, 2016
    Inventors: Shinan Wang, Takashi Nakamura, Takayuki Teshima, Yutaka Setomoto, Shinichiro Watanabe
  • Publication number: 20160043660
    Abstract: A capacitive transducer includes a substrate having a first surface and a second surface opposite the first surface, the substrate including a through wire extending therethrough between the first surface and the second surface, and a cell on the first surface, the cell including a first electrode and a second electrode spaced apart from the first electrode with a gap between the first electrode and the second electrode. Conductive protective films are disposed over surfaces of the through wire on the first surface side and the second surface side of the substrate.
    Type: Application
    Filed: August 4, 2015
    Publication date: February 11, 2016
    Inventors: Shinan Wang, Yutaka Setomoto
  • Patent number: 9227406
    Abstract: A method of manufacturing an ejection orifice member includes: preparing a substrate including a first layer, a second layer, and a third layer, the first layer protruding in a first direction crossing a principal surface of the substrate, the second and third layers being formed on the first direction side of the first layer, the preparing a substrate including forming the second layer to follow a contour of a first direction side surface of the first layer, and then forming the third layer on a surface of the second layer which protrudes on the first direction side; performing plating using the second layer as a seed to form a fourth layer on the first direction side of the second layer; removing the third layer from the fourth layer to form a hole as the ejection orifice in the fourth layer; and thinning the fourth layer at least around the hole.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: January 5, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shinan Wang, Yasuto Kodera, Yasuyuki Tamura
  • Publication number: 20150263647
    Abstract: According to a method for manufacturing a device in which an electrode of an element is electrically connected to a penetrating wire in a substrate, a structure is prepared in which the element is arranged on the first substrate having a through hole formed therein: and a second substrate is prepared which has an electroconductive seed layer formed thereon. Then, a wall part is formed on the first substrate; a seed layer is joined to a face on an element side of the structure through a bonding layer; the bonding layer is removed; and the seed layer is exposed in the inside of the opening. The inside of the wall part and the through hole is filled with a conductor, with the use of the seed layer through electrolytic plating.
    Type: Application
    Filed: March 6, 2015
    Publication date: September 17, 2015
    Inventors: Shinichiro Watanabe, Shinan Wang