Patents by Inventor Shingo Inoue
Shingo Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240116115Abstract: A workpiece holder 1 includes a holder head 11 and a holder body 12. The holder head 11 includes a chuck unit 13 for holding a workpiece W, a support pedestal 111 for supporting the chuck unit 13, and a hook 113 provided on a distal end portion of an arm 112 extending from the support pedestal 111. The holder body 12 includes a cylindrical body portion 121, a retained portion 123 that is arranged inside the body portion 121 and rotated around the cylinder axis J1 to be in either a retained state in which the retained portion 123 is retained by the hook 113 on the ?Z direction side or in the released state in which retaining by the hook 113 is released, and a disk spring 126 for biasing the retained portion 123 in the ?Z direction.Type: ApplicationFiled: June 15, 2023Publication date: April 11, 2024Inventors: Koji Tanaka, Chiori Mochizuki, Shingo Funai, Kenji Inoue
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Patent number: 11932111Abstract: A rectifier and a vehicle AC generator that can suppress the cost, the rectification loss, and the leakage current from increasing are provided. A rectifier is configured in such a way that in each of n sets, one of a positive electrode side semiconductor device and a negative electrode side semiconductor device is a MOSFET, in such a way that in at least one of the n sets, the other one of the positive electrode side semiconductor device and the negative electrode side semiconductor device is a specific diode, and in such a way that the specific diode is a Schottky barrier diode or a MOS diode, which is a MOSFET whose drain terminal and gate terminal are short-circuited.Type: GrantFiled: August 3, 2018Date of Patent: March 19, 2024Assignee: Mitsubishi Electric CorporationInventors: Shinichiro Minami, Katsuya Tsujimoto, Keiichi Komurasaki, Shingo Inoue
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Patent number: 11935848Abstract: Disclosed is a package for a semiconductor device including a semiconductor die. The package includes a base member, a side wall, first and second conductive films, and first and second conductive leads. The base member has a conductive main surface including a region that mounts the semiconductor die. The side wall surrounds the region and is made of a dielectric. The side wall includes first and second portions. The first and second conductive films are provided on the first and second portions, respectively and are electrically connected to the semiconductor die. The first and second conductive leads are conductively bonded to the first and second conductive films, respectively. At least one of the first and second portions includes a recess in its back surface facing the base member, and the recess defines a gap between the at least one of the first and second portions below the corresponding conductive film and the base member.Type: GrantFiled: November 10, 2022Date of Patent: March 19, 2024Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventors: Ikuo Nakashima, Shingo Inoue
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Publication number: 20240085250Abstract: There is provided an information processing apparatus that enables a more effective reduction in a load imposed on a user, with the use of force applied to the user in relation to a tangible object. The information processing apparatus includes a control unit configured to estimate, on the basis of a state of a user, a first amount that is predicted by the user with regard to force applied to the user in relation to a tangible object, and control presentation of information to the user on the basis of the first amount and a second amount that is preliminarily registered with regard to the force.Type: ApplicationFiled: November 26, 2021Publication date: March 14, 2024Applicant: Sony Group CorporationInventors: Shingo UTSUKI, Tsuyoshi ISHIKAWA, Junki INOUE, Takayuki KURIHARA, Takanobu OMATA, Shin SHIROMA, Kaoru KOIKE
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Patent number: 11922650Abstract: It is possible to estimate a slack level accurately in consideration of a shape of a deformed cable. A point cloud analysis device sets a plurality of regions of interest obtained by window-searching a wire model including a quadratic curve model representing a cable obtained from a point cloud consisting of three-dimensional points on an object, the region of interest being divided into a first region and a second region.Type: GrantFiled: May 8, 2019Date of Patent: March 5, 2024Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Hitoshi Niigaki, Masaki Waki, Masaaki Inoue, Yasuhiro Yao, Tomoya Shimizu, Hiroyuki Oshida, Kana Kurata, Shingo Ando, Atsushi Sagata
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Publication number: 20230108221Abstract: It is an object to provide a technique capable of performing appropriate fitting in a base plate and a case. A semiconductor device includes: a semiconductor element, an insulating substrate on which the semiconductor element is mounted; a base plate on which the insulating substrate is mounted; and a case mounted on the base plate to surround the semiconductor element and the insulating substrate. One or more convex portions each having a tapered shape are provided in one of a surface of the base plate and a surface of the case, and one or more concave portions each having a tapered shape to be fitted to the one or more convex portions are provided in the other one of the surface of the base plate and the surface of the case.Type: ApplicationFiled: June 28, 2022Publication date: April 6, 2023Applicant: Mitsubishi Electric CorporationInventor: Shingo INOUE
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Publication number: 20230097270Abstract: A package for a semiconductor device includes a metal base plate, a wall portion, a first metal film, and a lead portion. The base plate has a first region and a second region surrounding the first region. The wall portion has a first frame body comprising metal and a second frame body comprising resin. The first frame body is provided on the second region. The second frame body is provided on the first frame body. The first metal film is provided on the second frame body. The lead portion is conductively bonded to the first metal film. The first frame body is conductively bonded to the base plate. A thickness of the first frame body in a first direction that is a direction in which the first frame body and the second frame body are arranged is larger than a thickness of the first metal film in the first direction.Type: ApplicationFiled: September 26, 2022Publication date: March 30, 2023Applicant: Sumitomo Electric Device Innovations, Inc.Inventor: Shingo INOUE
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Publication number: 20230076573Abstract: Disclosed is a package for a semiconductor device including a semiconductor die. The package includes a base member, a side wall, first and second conductive films, and first and second conductive leads. The base member has a conductive main surface including a region that mounts the semiconductor die. The side wall surrounds the region and is made of a dielectric. The side wall includes first and second portions. The first and second conductive films are provided on the first and second portions, respectively and are electrically connected to the semiconductor die. The first and second conductive leads are conductively bonded to the first and second conductive films, respectively. At least one of the first and second portions includes a recess in its back surface facing the base member, and the recess defines a gap between the at least one of the first and second portions below the corresponding conductive film and the base member.Type: ApplicationFiled: November 10, 2022Publication date: March 9, 2023Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventors: Ikuo NAKASHIMA, Shingo INOUE
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Patent number: 11581246Abstract: A semiconductor device package is disclosed. The package according to one example includes a base having a main surface made of a metal, a dielectric side wall having a bottom surface facing the main surface, a joining material containing silver (Ag) and joining the main surface of the base and the bottom surface of the side wall to each other, a lead made of a metal joined to an upper surface of the side wall on a side opposite to the bottom surface, and a conductive layer not containing silver (Ag). The conductive layer is provided between the bottom surface and the upper surface of the side wall at a position overlapping the lead when viewed from a normal direction of the main surface. The conductive layer is electrically connected to the joining material, extends along the bottom surface, and is exposed from a lateral surface of the side wall.Type: GrantFiled: February 13, 2020Date of Patent: February 14, 2023Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventors: Shingo Inoue, Kaname Ebihara
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Patent number: 11557553Abstract: Disclosed is a semiconductor device including a semiconductor die, a base member, a side wall, first and second conductive films, and first and second conductive leads. The base member has a conductive main surface including a region that mounts the semiconductor die. The side wall surrounds the region and is made of a dielectric. The side wall includes first and second portions. The first and second conductive films are provided on the first and second portions, respectively and are electrically connected to the semiconductor die. The first and second conductive leads are conductively bonded to the first and second conductive films, respectively. At least one of the first and second portions includes a recess on its back surface facing the base member, and the recess defines a gap between the at least one of the first and second portions below the corresponding conductive film and the base member.Type: GrantFiled: July 29, 2020Date of Patent: January 17, 2023Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventors: Ikuo Nakashima, Shingo Inoue
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Publication number: 20220220971Abstract: A centrifugal fan includes: a main plate; and a plurality of blades extending from the main plate in the rotation-axis direction. The plurality of blades include, at least partially, an arrangement in which intervals between the adjacent blades are unequal intervals. A length direction of each blade extends from an inner circumferential side to an outer circumferential side of the main plate. In a pair of the blades adjacent to each other with a smallest interval in a rotation direction among the plurality of blades, the blades positioned on a backward side and a forward side in the rotation direction are different in outer-circumferential-side shapes, and an action of discharging a fluid toward the outer circumferential side by the blade positioned on the backward side in the rotation direction is made smaller as compared to the blade positioned on the forward side in the rotation direction.Type: ApplicationFiled: June 20, 2019Publication date: July 14, 2022Applicant: Mitsubishi Electric CorporationInventors: Keisuke TAKEISHI, Shinichiro MINAMI, Shingo INOUE
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Publication number: 20220005751Abstract: A semiconductor device package is disclosed. The package according to one example includes a base having a main surface made of a metal, a dielectric side wall having a bottom surface facing the main surface, a joining material containing silver (Ag) and joining the main surface of the base and the bottom surface of the side wall to each other, a lead made of a metal joined to an upper surface of the side wall on a side opposite to the bottom surface, and a conductive layer not containing silver (Ag). The conductive layer is provided between the bottom surface and the upper surface of the side wall at a position overlapping the lead when viewed from a normal direction of the main surface. The conductive layer is electrically connected to the joining material, extends along the bottom surface, and is exposed from a lateral surface of the side wall.Type: ApplicationFiled: February 13, 2020Publication date: January 6, 2022Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventors: Shingo INOUE, Kaname EBIHARA
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Publication number: 20210257888Abstract: A rectifier and a vehicle AC generator that can suppress the cost, the rectification loss, and the leakage current from increasing are provided. A rectifier is configured in such a way that in each of n sets, one of a positive electrode side semiconductor device and a negative electrode side semiconductor device is a MOSFET, in such a way that in at least one of the n sets, the other one of the positive electrode side semiconductor device and the negative electrode side semiconductor device is a specific diode, and in such a way that the specific diode is a Schottky barrier diode or a MOS diode, which is a MOSFET whose drain terminal and gate terminal are short-circuited.Type: ApplicationFiled: August 3, 2018Publication date: August 19, 2021Applicant: Mitsubishi Electric CorporationInventors: Shinichiro MINAMI, Katsuya TSUJIMOTO, Keiichi KOMURASAKI, Shingo INOUE
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Publication number: 20210035931Abstract: Disclosed is a semiconductor device including a semiconductor die, a base member, a side wall, first and second conductive films, and first and second conductive leads. The base member has a conductive main surface including a region that mounts the semiconductor die. The side wall surrounds the region and is made of a dielectric. The side wall includes first and second portions. The first and second conductive films are provided on the first and second portions, respectively and are electrically connected to the semiconductor die. The first and second conductive leads are conductively bonded to the first and second conductive films, respectively. At least one of the first and second portions includes a recess on its back surface facing the base member, and the recess defines a gap between the at least one of the first and second portions below the corresponding conductive film and the base member.Type: ApplicationFiled: July 29, 2020Publication date: February 4, 2021Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventors: Ikuo NAKASHIMA, Shingo INOUE
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Publication number: 20200404794Abstract: A semiconductor device includes a metal base, a semiconductor chip provided on the metal base, and a frame work located on the metal base and having a metal pattern of an input pattern, an output pattern, and a bias pad. The bias pad and the input pattern or the output pattern are electrically connected by a conductor located on the frame work. The conductor has a characteristic of isolation at a frequency around an input signal or an output signal of the semiconductor device.Type: ApplicationFiled: July 8, 2020Publication date: December 24, 2020Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: Shingo INOUE
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Patent number: 10750621Abstract: A process of assembling a semiconductor device is disclosed. The process includes steps of arraying metal bases on a carrier; applying sintered metal paste simultaneously onto the bases; disposing a substrate simultaneously onto the sintered metal paste where the substrate includes side walls corresponding to the bases and a wiring layer common the bases; and volatilizing solvent contained in the sintered metal paste.Type: GrantFiled: August 1, 2018Date of Patent: August 18, 2020Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: Shingo Inoue
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Publication number: 20200053883Abstract: A process of assembling a semiconductor device is disclosed. The process includes steps of arraying metal bases on a carrier; applying sintered metal paste simultaneously onto the bases; disposing a substrate simultaneously onto the sintered metal paste where the substrate includes side walls corresponding to the bases and a wiring layer common the bases; and volatilizing solvent contained in the sintered metal paste.Type: ApplicationFiled: August 1, 2018Publication date: February 13, 2020Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: Shingo INOUE
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Patent number: 9537451Abstract: An RF amplifier with enhance power efficiency is disclosed. The RF amplifier traces the envelope of the input RF signal and varies the supply voltage to the final FET depending on the detected envelope through a linear power supply and a switching power supply superposed on the linear power supply. The linear power supply promptly responds the change of the envelope and gradually decreases the supply current as maintaining the supply voltage. The switching power supply takes over the supplement of the supply current to the final FET.Type: GrantFiled: December 2, 2014Date of Patent: January 3, 2017Assignee: Sumitomo Electric Device Innovations, Inc.Inventor: Shingo Inoue
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Patent number: 9531331Abstract: An RF amplifier that compensates the drift appearing after a sudden decrease of the drain current is disclosed. The RF amplifier detects the drain current by the bias control unit that feeds the change of the drain current back to the gate bias of the FET. The bias control unit responds to the sudden increase of the drain current by a relatively longer time constant; while, to the sudden decrease thereof by the second time constant enough shorter than the first time constant to compensate the drift appearing after the sudden decrease of the drain current.Type: GrantFiled: February 19, 2015Date of Patent: December 27, 2016Assignee: Sumitomo Electric Device Innovations, Inc.Inventor: Shingo Inoue
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Patent number: D1022418Type: GrantFiled: October 6, 2022Date of Patent: April 16, 2024Assignee: ASICS CORPORATIONInventors: Genki Hatano, Kenta Tateno, Waka Inoue, Shingo Takahashi, Masaki Oohara, Norihiko Taniguchi