Patents by Inventor Shingo Iwasaki

Shingo Iwasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11164841
    Abstract: A semiconductor device may be provided with a first member, a second member joined to a first region of the first member via a first solder layer and a third member joined to a second region of the first member via a second solder layer. The first region and the second region are located on one side of the first member. The first solder layer contains a plurality of support particles that is constituted of a material having a higher melting point than the first solder layer. The second solder layer does not contain any support particles.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: November 2, 2021
    Assignee: DENSO CORPORATION
    Inventors: Shingo Iwasaki, Keita Hatasa, Satoshi Takahagi
  • Patent number: 10879141
    Abstract: An insulated heat dissipation substrate including: a ceramic substrate; and a conductor layer bonded onto at least one of main surfaces of the ceramic substrate, wherein the conductor layer includes: an upper surface; a lower surface; and a side surface 1 connecting the upper surface with the lower surface; the ceramic substrate includes: a lowest portion; a side surface 2 connecting the lowest portion with the side surface 1 of the conductor layer; and a bonding surface at a position higher than the lowest portion, the bonding surface being bonded to the lower surface of the conductor layer; an absolute value (|???|) is 20° or less on average; and the side surface 1 has a receding portion from an end of the upper surface in the normal direction relative to the tangential line of the contour of the conductor layer as viewed in plane.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: December 29, 2020
    Assignee: NGK Insulators, Ltd.
    Inventors: Shingo Iwasaki, Takashi Ebigase
  • Patent number: 10861769
    Abstract: An insulated heat dissipation substrate including: a ceramic substrate; and a conductor layer bonded onto at least one of main surfaces of the ceramic substrate, wherein the conductor layer includes an upper surface, a lower surface bonded to the ceramic substrate, and a side surface connecting the upper surface with the lower surface wherein, a tip of the upper surface recedes in the normal direction of the conductor layer from a tip of the lower surface, the side surface has a contour having an inwardly recessed curve line and having a portion receding in the normal direction of the conductor layer from the tip of the upper surface, and a connection portion between the upper surface and the side surface has a rounded shape such that a maximum radius R of a circle is 0.1 ?m?R?5 ?m on average.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: December 8, 2020
    Assignee: NGK Insulators, Ltd.
    Inventors: Shingo Iwasaki, Takashi Ebigase
  • Patent number: 10763240
    Abstract: A semiconductor device may include a first semiconductor chip, a second semiconductor chip, an encapsulant encapsulating the first and second semiconductor chips, a first signal terminal extending over inside and outside of the encapsulant and connected to the first semiconductor chip inside the encapsulant, and a second signal terminal extending over the inside and the outside of the encapsulant and connected to the second semiconductor chip inside the encapsulant. The first and second signal terminals may protrude from the encapsulant in a same direction. The first signal terminal may include, inside the encapsulant, a section where the first signal terminal extends farther away from the second signal terminal along a direction toward the first semiconductor chip. The second signal terminal may include, inside the encapsulant, a section where the second signal terminal extends farther away from the first signal terminal along a direction toward the second semiconductor chip.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: September 1, 2020
    Assignee: DENSO CORPORATION
    Inventors: Shingo Iwasaki, Kaisei Satou, Yuri Imai
  • Publication number: 20200185348
    Abstract: A semiconductor device may be provided with a first member, a second member joined to a first region of the first member via a first solder layer and a third member joined to a second region of the first member via a second solder layer. The first region and the second region are located on one side of the first member. The first solder layer contains a plurality of support particles that is constituted of a material having a higher melting point than the first solder layer. The second solder layer does not contain any support particles.
    Type: Application
    Filed: November 4, 2019
    Publication date: June 11, 2020
    Applicant: DENSO CORPORATION
    Inventors: Shingo Iwasaki, Keita Hatasa, Satoshi Takahagi
  • Patent number: 10546760
    Abstract: A method of manufacturing a semiconductor device that includes a resin package sealing a semiconductor element and a pair of metal plates interposing the semiconductor element therebetween, in which each of the pair of metal plates is exposed at corresponding one of both surfaces of the resin package is disclosed. The method may include preparing an assembly in which the semiconductor element is connected to the pair of metal plates; setting the assembly in a cavity of a mold, wherein one metal plate is in contact with a bottom surface of the cavity and a space is provided above the other metal plate; forming the resin package by injecting a molten resin into the cavity so as to cover an upper side of the other metal plate, stopping the injecting of the molten resin with a part of the space on an upper side of the cavity unfilled.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: January 28, 2020
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takuya Kadoguchi, Yuuji Hanaki, Atsuko Yamanaka, Shou Funano, Satoshi Takahagi, Shingo Iwasaki
  • Publication number: 20190371701
    Abstract: An insulated heat dissipation substrate including: a ceramic substrate; and a conductor layer bonded onto at least one of main surfaces of the ceramic substrate, wherein the conductor layer includes an upper surface, a lower surface bonded to the ceramic substrate, and a side surface connecting the upper surface with the lower surface wherein, a tip of the upper surface recedes in the normal direction of the conductor layer from a tip of the lower surface, the side surface has a contour having an inwardly recessed curve line and having a portion receding in the normal direction of the conductor layer from the tip of the upper surface, and a connection portion between the upper surface and the side surface has a rounded shape such that a maximum radius R of a circle is 0.1 ?m?R?5 ?m on average.
    Type: Application
    Filed: August 14, 2019
    Publication date: December 5, 2019
    Applicant: NGK INSULATORS, LTD.
    Inventors: Shingo IWASAKI, Takashi EBIGASE
  • Publication number: 20190371690
    Abstract: An insulated heat dissipation substrate including: a ceramic substrate; and a conductor layer bonded onto at least one of main surfaces of the ceramic substrate, wherein the conductor layer includes: an upper surface; a lower surface; and a side surface 1 connecting the upper surface with the lower surface; the ceramic substrate includes: a lowest portion; a side surface 2 connecting the lowest portion with the side surface 1 of the conductor layer; and a bonding surface at a position higher than the lowest portion, the bonding surface being bonded to the lower surface of the conductor layer; an absolute value (|???|) is 20° or less on average; and the side surface 1 has a receding portion from an end of the upper surface in the normal direction relative to the tangential line of the contour of the conductor layer as viewed in plane.
    Type: Application
    Filed: August 16, 2019
    Publication date: December 5, 2019
    Applicant: NGK INSULATORS, LTD.
    Inventors: Shingo IWASAKI, Takashi EBIGASE
  • Patent number: 10475727
    Abstract: A semiconductor device includes an electrode plate, a metallic member, and solder connecting the metallic member with the electrode plate. On a surface of the electrode plate, a first groove and a group of second grooves are provided. The first groove has first to fourth linear parts. The group of second grooves is arranged within a range surrounded by the first groove, and has end portions on an outer periphery side that are connected with the first groove. The group of second grooves includes first to fourth sets. Each of the sets includes a plurality of second grooves connected with the first to fourth linear parts. When the metallic member is seen in a lamination direction of the electrode plate and the metallic member, an outer peripheral edge of a region of the metallic member, the region being connected with the solder, goes across the first to fourth sets.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: November 12, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Satoshi Takahagi, Syou Funano, Takuya Kadoguchi, Yuji Hanaki, Shingo Iwasaki, Takanori Kawashima
  • Publication number: 20190279961
    Abstract: A semiconductor device may include a first semiconductor chip, a second semiconductor chip, an encapsulant encapsulating the first and second semiconductor chips, a first signal terminal extending over inside and outside of the encapsulant and connected to the first semiconductor chip inside the encapsulant, and a second signal terminal extending over the inside and the outside of the encapsulant and connected to the second semiconductor chip inside the encapsulant. The first and second signal terminals may protrude from the encapsulant in a same direction. The first signal terminal may include, inside the encapsulant, a section where the first signal terminal extends farther away from the second signal terminal along a direction toward the first semiconductor chip. The second signal terminal may include, inside the encapsulant, a section where the second signal terminal extends farther away from the first signal terminal along a direction toward the second semiconductor chip.
    Type: Application
    Filed: February 6, 2019
    Publication date: September 12, 2019
    Applicant: Toyota Jidosha Kabushiki Kaisha
    Inventors: Shingo IWASAKI, Kaisei Satou, Yuri Imai
  • Patent number: 10396008
    Abstract: A semiconductor device includes a first metal plate and a second metal plate which interpose a first semiconductor element therebetween, the first metal plate and the second metal plate being bonded to the first semiconductor element with first soldered portions; and includes a third metal plate and a fourth metal plate which interpose a second semiconductor element therebetween, the third metal plate and the fourth metal plate being bonded to the second semiconductor element with second soldered portions. A first joint provided at an edge of the first metal plate and a second joint provided at an edge of the fourth metal plate are bonded with a third soldered portion. A total sum of thicknesses of the first soldered portions is different from a thickness of the third soldered portion, a solidifying point of the thinner one is higher than a solidifying point of the thicker one.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: August 27, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Satoshi Takahagi, Takuya Kadoguchi, Yuji Hanaki, Syou Funano, Shingo Iwasaki, Takanori Kawashima
  • Patent number: 10283429
    Abstract: A semiconductor device includes: a semiconductor element; a heat sink including a first surface and a second surface, the semiconductor element being joined to the first surface, the second surface being a surface on an opposite side of the first surface; and a package that is in contact with the semiconductor element and the first surface of the heat sink, the package including a recess portion in an outer face, wherein the heat sink includes a thick portion, and a thin portion having a thickness that is smaller than that of the thick portion, and the thin portion is located on a line connecting an outer face of the semiconductor element and the recess portion in a shortest distance.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: May 7, 2019
    Assignees: Toyota Jidosha Kabushiki Kaisha, Denso Corporation
    Inventors: Shingo Iwasaki, Tomomi Okumura
  • Publication number: 20190027381
    Abstract: A method of manufacturing a semiconductor device that includes a resin package sealing a semiconductor element and a pair of metal plates interposing the semiconductor element therebetween, in which each of the pair of metal plates is exposed at corresponding one of both surfaces of the resin package is disclosed. The method may include preparing an assembly in which the semiconductor element is connected to the pair of metal plates; setting the assembly in a cavity of a mold, wherein one metal plate is in contact with a bottom surface of the cavity and a space is provided above the other metal plate; forming the resin package by injecting a molten resin into the cavity so as to cover an upper side of the other metal plate, stopping the injecting of the molten resin with a part of the space on an upper side of the cavity unfilled.
    Type: Application
    Filed: July 17, 2018
    Publication date: January 24, 2019
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takuya KADOGUCHI, Yuuji HANAKI, Atsuko YAMANAKA, Shou FUNANO, Satoshi TAKAHAGI, Shingo IWASAKI
  • Patent number: 10103091
    Abstract: A semiconductor device may include: a first and a second semiconductor elements each including electrodes on both surfaces thereof; a first and a second metal plates which interpose the first semiconductor element, the metal plates respectively being bonded to the first semiconductor element via first soldered portions; and a third and a fourth metal plates which interpose the second semiconductor element, the metal plates respectively being bonded to the second semiconductor element via second soldered portions; wherein a first joint is provided at the first metal plate, a second joint is provided at the fourth metal plate, the joints are bonded via a third soldered portion, and a solidifying point of the first soldered portions is higher than a solidifying point of the third soldered portion, and a solidifying point of the second soldered portions is higher than the solidifying point of the third soldered portion.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: October 16, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Satoshi Takahagi, Syou Funano, Takuya Kadoguchi, Yuji Hanaki, Shingo Iwasaki, Takanori Kawashima
  • Publication number: 20180277462
    Abstract: A semiconductor device includes an electrode plate, a metallic member, and solder connecting the metallic member with the electrode plate. On a surface of the electrode plate, a first groove and a group of second grooves are provided. The first groove has first to fourth linear parts. The group of second grooves is arranged within a range surrounded by the first groove, and has end portions on an outer periphery side that are connected with the first groove. The group of second grooves includes first to fourth sets. Each of the sets includes a plurality of second grooves connected with the first to fourth linear parts. When the metallic member is seen in a lamination direction of the electrode plate and the metallic member, an outer peripheral edge of a region of the metallic member, the region being connected with the solder, goes across the first to fourth sets.
    Type: Application
    Filed: March 16, 2018
    Publication date: September 27, 2018
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Satoshi TAKAHAGI, Syou FUNANO, Takuya KADOGUCHI, Yuji HANAKI, Shingo IWASAKI, Takanori KAWASHIMA
  • Publication number: 20180261532
    Abstract: A semiconductor device may include: a first and a second semiconductor elements each including electrodes on both surfaces thereof; a first and a second metal plates which interpose the first semiconductor element, the metal plates respectively being bonded to the first semiconductor element via first soldered portions; and a third and a fourth metal plates which interpose the second semiconductor element, the metal plates respectively being bonded to the second semiconductor element via second soldered portions; wherein a first joint is provided at the first metal plate, a second joint is provided at the fourth metal plate, the joints are bonded via a third soldered portion, and a solidifying point of the first soldered portions is higher than a solidifying point of the third soldered portion, and a solidifying point of the second soldered portions is higher than the solidifying point of the third soldered portion.
    Type: Application
    Filed: January 11, 2018
    Publication date: September 13, 2018
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Satoshi TAKAHAGI, Syou FUNANO, Takuya KADOGUCHI, Yuji HANAKI, Shingo IWASAKI, Takanori KAWASHIMA
  • Publication number: 20180218960
    Abstract: A semiconductor device includes a first metal plate and a second metal plate which interpose a first semiconductor element therebetween, the first metal plate and the second metal plate being bonded to the first semiconductor element with first soldered portions; and includes a third metal plate and a fourth metal plate which interpose a second semiconductor element therebetween, the third metal plate and the fourth metal plate being bonded to the second semiconductor element with second soldered portions. A first joint provided at an edge of the first metal plate and a second joint provided at an edge of the fourth metal plate are bonded with a third soldered portion. A total sum of thicknesses of the first soldered portions is different from a thickness of the third soldered portion, a solidifying point of the thinner one is higher than a solidifying point of the thicker one.
    Type: Application
    Filed: December 27, 2017
    Publication date: August 2, 2018
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Satoshi TAKAHAGI, Takuya KADOGUCHI, Yuji HANAKI, Syou FUNANO, Shingo IWASAKI, Takanori KAWASHIMA
  • Patent number: 9997066
    Abstract: In an optical fiber network for transmitting optical signals in a robot having three or more joints connecting a plurality of links in series such that the links include two end links located at either end and intermediate links provided between the two end links, and the links connected by the joints are moveable relative to each other, a plurality of optical transceiver modules are provided on the links such that at least one optical transceiver module is provided on each link; and a plurality of optical fiber cables connect the optical transceiver modules in a ring; wherein at least one end of each optical fiber cable connecting the optical transceiver modules provided on different links is connected to one of the optical transceiver modules provided on the intermediate links.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: June 12, 2018
    Assignee: Honda Motor Co., Ltd.
    Inventors: Ryusuke Ishizaki, Shingo Iwasaki
  • Patent number: 9983369
    Abstract: An articulate joint mechanism includes a first link (L1, A1, M1, U1), a second link (L2, A2, M2, U2), a coupling (KR, KR1, ER, ER1, ER2, MR, UR) mechanically connecting the first link with the second link in a mutually moveable manner at least with one degree of freedom, and an optical fiber cable (11, 21, 31, 41) extending from the first link to the second link via the coupling, the optical fiber cable including a fiber cable core (F1, F2, F3, F4) and a sheath (C1, C2, C3, C4) surrounding the fiber cable core.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: May 29, 2018
    Assignee: Honda Motor Co., Ltd.
    Inventors: Shingo Iwasaki, Ryusuke Ishizaki
  • Patent number: 9951740
    Abstract: An internal combustion engine includes a combustion chamber, a fuel injector injecting fuel into the combustion chamber, a cylinder, a piston having a crown and reciprocating in the cylinder, the crown being exposed to the combustion chamber, and an ignition delay enhancer prolonging an ignition delay of a fuel-air mixture in the combustion chamber. A ceramic member is disposed on at least a fuel injection port, to which fuel is injected from the fuel injector, of the crown of the piston.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: April 24, 2018
    Assignee: NGK Insulators, Ltd.
    Inventors: Shingo Iwasaki, Masahiro Kida, Yoshihiro Yamamoto, Tomonori Urushihara