Patents by Inventor Shingo Kamitani

Shingo Kamitani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105735
    Abstract: In an array substrate, a plurality of wiring lines include a first wiring line located between a first pixel electrode and a second pixel electrode in a first direction, and a second wiring line located between a third pixel electrode and a fourth pixel electrode in the first direction. A plurality of switching elements include a first switching element and a second switching element. A plurality of common electrodes include a first common electrode overlapping the first pixel electrode, the second pixel electrode, the third pixel electrode, the first wiring line, and a first semiconductor portion, and a second common electrode overlapping the fourth pixel electrode and the second wiring line. Further, there is provided a first overlapping portion that is disposed overlapping a second semiconductor portion and has the same potential as that of any of the plurality of common electrodes.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 28, 2024
    Inventors: Hikaru YOSHINO, Shingo KAMITANI, Junichi MORINAGA
  • Patent number: 11112895
    Abstract: Provided is an active matrix substrate in which parasitic capacitance can be reduced and the display quality can be improved is provided, a touch-panel-equipped display device including the same, and a liquid crystal display device including the same. An active matrix substrate 1 includes a plurality of pixel electrodes 31; a plurality of counter electrodes provided so as to be opposed to the pixel electrodes 31, respectively, capacitors being formed between the counter electrodes 21 and the pixel electrodes 31; a conductive layer provided on a side opposite to the counter electrodes 21 with respect to the pixel electrodes 31; a first insulating layer 461; and a second insulating layer 462. The first insulating layer 461 is arranged between the pixel electrodes 31 and the conductive layer, and the second insulating layer 462 is arranged between the pixel electrodes 31 and the counter electrodes 21.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: September 7, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masakatsu Tominaga, Kuniko Maeno, Shingo Kamitani, Yoshihito Hara
  • Patent number: 11061289
    Abstract: A liquid crystal display device includes a first substrate, a second substrate, and a liquid crystal layer supported between the first substrate and the second substrate, wherein the first substrate includes a main spacer and a sub-spacer protruding toward the liquid crystal layer, a height of the main spacer is greater than a height of the sub-spacer, the second substrate includes, on a surface facing the liquid crystal layer, an alignment film, a main pedestal portion that comes into contact with the main spacer, and a sub-pedestal portion opposite the sub-spacer, an area of a top portion of the main pedestal portion is greater than an area of a top portion of the main spacer, and an area of a top portion of the sub-pedestal portion is less than an area of a top portion of the sub-spacer.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: July 13, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Junichi Morinaga, Shingo Kamitani, Katsuya Ogawa
  • Patent number: 10895787
    Abstract: A liquid crystal panel includes an array substrate, a counter substrate, and a liquid crystal layer therebetween. The counter substrate includes a sub-pixel in-between light blocking section extending in a grid and surrounding the sub pixels, a first projection projecting from the counter substrate toward the array substrate and having a projecting end that is contacted with a part of the array substrate to define a distance between the substrates, and second projections projecting from the counter substrate toward the array substrate and having projecting ends that are spaced from the array substrate. The first projection and the second projections overlap the sub-pixel in-between light blocking section. A distance between a center line of a width dimension of the sub-pixel in-between light blocking section and a center of each second projection is smaller than a distance between the center line and a center of the first projection.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: January 19, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shingo Kamitani, Junichi Morinaga
  • Publication number: 20200341319
    Abstract: A liquid crystal display device includes a first substrate, a second substrate, and a liquid crystal layer supported between the first substrate and the second substrate, wherein the first substrate includes a main spacer and a sub-spacer protruding toward the liquid crystal layer, a height of the main spacer is greater than a height of the sub-spacer, the second substrate includes, on a surface facing the liquid crystal layer, an alignment film, a main pedestal portion that comes into contact with the main spacer, and a sub-pedestal portion opposite the sub-spacer, an area of a top portion of the main pedestal portion is greater than an area of a top portion of the main spacer, and an area of a top portion of the sub-pedestal portion is less than an area of a top portion of the sub-spacer.
    Type: Application
    Filed: April 21, 2020
    Publication date: October 29, 2020
    Inventors: JUNICHI MORINAGA, SHINGO KAMITANI, KATSUYA OGAWA
  • Publication number: 20200326576
    Abstract: A display panel includes: a pair of substrates provided opposite each other with a substrate-to-substrate distance between the substrates; a plurality of pixels arranged in a matrix, the pixels including pixel sections; inter-pixel-section light-blocking sections providing partitions between the pixel sections; spacers arranged, between the substrates, in locations over the inter-pixel-section light-blocking sections; and extended light-blocking sections provided so as to extend inward of the pixel sections from the inter-pixel-section light-blocking sections, wherein the spacers include: first spacers regulating the substrate-to-substrate distance; and second spacers and third spacers projecting from the substrate toward the substrate, the second spacers and third spacers having a projection length smaller than the substrate-to-substrate distance, the third spacers having a smaller footprint than do the second spacers.
    Type: Application
    Filed: April 8, 2020
    Publication date: October 15, 2020
    Inventors: SHINGO KAMITANI, SHINGO JOHGAN, JUNICHI MORINAGA, HIKARU YOSHINO
  • Patent number: 10795225
    Abstract: Provided is a display device in which connection defects in terminal parts can be suppressed, and a method for producing the same. An active matrix substrate 1 of a display device includes gate lines, data lines arranged so as to intersect with the gate lines, pixel electrodes, counter electrodes forming capacitors between the same and the pixel electrodes, and signal lines that are connected with the counter electrodes and supply a driving signal for touch detection. Further, the active matrix substrate 1 includes a display driving circuit that supplies a control signal to at least either the gate lines or the data lines, and a touch detection driving circuit that supplies a driving signal for touch detection. Still further, the active matrix substrate 1 includes a plurality of terminal parts Ta to which the display driving circuit and the touch detection driving circuit are connected, and the terminal parts Ta have a common layer structure.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: October 6, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yoshihito Hara, Masaki Maeda, Masakatsu Tominaga, Isao Ogasawara, Kuniko Maeno, Shingo Kamitani, Yasuhiro Mimura, Satoshi Horiuchi, Yoshihiro Asai
  • Patent number: 10775660
    Abstract: Provided is a touch-panel-equipped display device that can improve the touch sensing accuracy, without decreases in the display quality, and a method for producing the same. A touch-panel-equipped display device includes an active matrix substrate 1. The active matrix substrate 1 includes a plurality of pixel electrodes 31; a plurality of counter electrodes 21 forming capacitors between the same and the pixel electrodes 31; a plurality of touch detection lines 22; a first insulating layer 461; and a second insulating layer 462. The touch detection lines 22 are connected with any of the counter electrodes 21, and supply a driving signal for touch detection to the counter electrodes 21 connected therewith. Between each pixel electrode 31 and the corresponding one of the counter electrodes 21, the second insulating layer 462 is arranged.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: September 15, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yoshihito Hara, Masaki Maeda, Masakatsu Tominaga, Isao Ogasawara, Kuniko Maeno, Shingo Kamitani, Yasuhiro Mimura, Satoshi Horiuchi, Yoshihiro Asai
  • Patent number: 10649294
    Abstract: A display device includes a pixel electrode, a signal line, a pixel electrode, and a blocking portion. The signal line is configured to transmit a signal to the pixel electrode. The pixel electrode connecting line is disposed a predefined distance apart from the signal line and connected to the pixel electrode. The blocking portion is disposed between a connecting portion of the pixel electrode connected to the pixel electrode connecting line and the signal line to block an electric field between the connection portion and the signal line.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: May 12, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hiroto Akiyama, Shingo Kamitani
  • Publication number: 20190265531
    Abstract: Provided is a touch-panel-equipped display device that can improve the touch sensing accuracy, without decreases in the display quality, and a method for producing the same. A touch-panel-equipped display device includes an active matrix substrate 1. The active matrix substrate 1 includes a plurality of pixel electrodes 31; a plurality of counter electrodes 21 forming capacitors between the same and the pixel electrodes 31; a plurality of touch detection lines 22; a first insulating layer 461; and a second insulating layer 462. The touch detection lines 22 are connected with any of the counter electrodes 21, and supply a driving signal for touch detection to the counter electrodes 21 connected therewith. Between each pixel electrode 31 and the corresponding one of the counter electrodes 21, the second insulating layer 462 is arranged.
    Type: Application
    Filed: June 7, 2017
    Publication date: August 29, 2019
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: YOSHIHITO HARA, MASAKI MAEDA, MASAKATSU TOMINAGA, ISAO OGASAWARA, KUNIKO MAENO, SHINGO KAMITANI, YASUHIRO MIMURA, SATOSHI HORIUCHI, YOSHIHIRO ASAI
  • Publication number: 20190258105
    Abstract: Provided is a display device in which connection defects in terminal parts can be suppressed, and a method for producing the same. An active matrix substrate 1 of a display device includes gate lines, data lines arranged so as to intersect with the gate lines, pixel electrodes, counter electrodes forming capacitors between the same and the pixel electrodes, and signal lines that are connected with the counter electrodes and supply a driving signal for touch detection. Further, the active matrix substrate 1 includes a display driving circuit that supplies a control signal to at least either the gate lines or the data lines, and a touch detection driving circuit that supplies a driving signal for touch detection. Still further, the active matrix substrate 1 includes a plurality of terminal parts Ta to which the display driving circuit and the touch detection driving circuit are connected, and the terminal parts Ta have a common layer structure.
    Type: Application
    Filed: June 7, 2017
    Publication date: August 22, 2019
    Inventors: YOSHIHITO HARA, MASAKI MAEDA, MASAKATSU TOMINAGA, ISAO OGASAWARA, KUNIKO MAENO, SHINGO KAMITANI, YASUHIRO MIMURA, SATOSHI HORIUCHI, YOSHIHIRO ASAI
  • Publication number: 20190227391
    Abstract: A liquid crystal panel includes an array substrate, a counter substrate, and a liquid crystal layer therebetween. The counter substrate includes a sub-pixel in-between light blocking section extending in a grid and surrounding the sub pixels, a first projection projecting from the counter substrate toward the array substrate and having a projecting end that is contacted with a part of the array substrate to define a distance between the substrates, and second projections projecting from the counter substrate toward the array substrate and having projecting ends that are spaced from the array substrate. The first projection and the second projections overlap the sub-pixel in-between light blocking section. A distance between a center line of a width dimension of the sub-pixel in-between light blocking section and a center of each second projection is smaller than a distance between the center line and a center of the first projection.
    Type: Application
    Filed: January 15, 2019
    Publication date: July 25, 2019
    Inventors: SHINGO KAMITANI, JUNICHI MORINAGA
  • Publication number: 20190196638
    Abstract: Provided is an active matrix substrate in which parasitic capacitance can be reduced and the display quality can be improved is provided, a touch-panel-equipped display device including the same, and a liquid crystal display device including the same. An active matrix substrate 1 includes a plurality of pixel electrodes 31; a plurality of counter electrodes provided so as to be opposed to the pixel electrodes 31, respectively, capacitors being formed between the counter electrodes 21 and the pixel electrodes 31; a conductive layer provided on a side opposite to the counter electrodes 21 with respect to the pixel electrodes 31; a first insulating layer 461; and a second insulating layer 462. The first insulating layer 461 is arranged between the pixel electrodes 31 and the conductive layer, and the second insulating layer 462 is arranged between the pixel electrodes 31 and the counter electrodes 21.
    Type: Application
    Filed: June 7, 2017
    Publication date: June 27, 2019
    Inventors: MASAKATSU TOMINAGA, KUNIKO MAENO, SHINGO KAMITANI, YOSHIHITO HARA
  • Publication number: 20190137835
    Abstract: A display device includes a pixel electrode, a signal line, a pixel electrode, and a blocking portion. The signal line is configured to transmit a signal to the pixel electrode. The pixel electrode connecting line is disposed a predefined distance apart from the signal line and connected to the pixel electrode. The blocking portion is disposed between a connecting portion of the pixel electrode connected to the pixel electrode connecting line and the signal line to block an electric field between the connection portion and the signal line.
    Type: Application
    Filed: November 7, 2018
    Publication date: May 9, 2019
    Inventors: HIROTO AKIYAMA, SHINGO KAMITANI
  • Patent number: 9476579
    Abstract: A relay connector that is interposed between two substrates provided with mutually connectable connecting parts and that indirectly connects the two substrates, wherein the relay connector is provided with a first connecting part capable of mechanistically connecting to the connecting part of one of the substrates, and a second connecting part capable of mechanistically connecting to the connecting part of the other substrate.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: October 25, 2016
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Shingo Kamitani
  • Publication number: 20150049485
    Abstract: A relay connector that is interposed between two substrates provided with mutually connectable connecting parts and that indirectly connects the two substrates, wherein the relay connector is provided with a first connecting part capable of mechanistically connecting to the connecting part of one of the substrates, and a second connecting part capable of mechanistically connecting to the connecting part of the other substrate.
    Type: Application
    Filed: April 12, 2013
    Publication date: February 19, 2015
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Shingo Kamitani
  • Publication number: 20150009714
    Abstract: To provide a light source substrate in an edge-light-type light source module, with which a defect generated by contacting of a sealing member of the light source substrate coming into contact with a lightguide plate can be prevented and reliability and safety can be improved. A light source substrate has a plurality of light-emitting elements (LED elements 15) COB-mounted on a base member 11, and is used in an edge-light-type light source module. Light source substrates 30 to 90 are configured with a first protrusion that forms a dam 17 for housing the sealing member, and a second protrusion 18 that is formed higher than the first protrusion and prevents the sealing member from coming into contact with other members.
    Type: Application
    Filed: January 22, 2013
    Publication date: January 8, 2015
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masanobu Okano, Ken Sumitani, Shingo Kamitani
  • Patent number: 7280539
    Abstract: In order to perform functional packet copying to read a large amount of data of an unspecified length from a memory at high speed and to prevent the packet copying operation from affecting other packet flow, a self-synchronous transfer control circuit having a function of controlling transfer operation is used, by which the number of packet copies output from a data holding register is managed by a counter, and the number of copies represented by the copy request packet and the counter count value are compared by a comparator, to determine completion of the packet copying operation.
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: October 9, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shingo Kamitani, Tsuyoshi Muramatsu
  • Patent number: 7124280
    Abstract: An execution control apparatus of a data driven information processor includes: an instruction decoder that outputs the a number of inputs of an instruction; a waiting data storage region that stores N (N?2) waiting data and respective data valid flags in one address; a constant storage that stores constants and a constant valid flag; a constant readout unit that reads out a constant and a constant valid flag from the constant storage with the node number of an input packet as the address; a unit that calculates a hash address and selects a process for data waiting depending upon a combination of a data valid flag, a constant valid flag, and the number of instuction inputs; and a unit that performs a waiting process in response to a select signal.
    Type: Grant
    Filed: April 13, 2001
    Date of Patent: October 17, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shingo Kamitani, Kouichi Hatakeyama
  • Patent number: 7082499
    Abstract: When the cache memory unit reads the last word of a page of the cache memory, the external memory interface reads ahead data of a prescribed number of pages ahead of the relevant page. Thus, data corresponding to the access request to the external main memory is always held in the cache memory. This prevents degradation of parallel processing capability of the data driven type information processing apparatus.
    Type: Grant
    Filed: October 3, 2002
    Date of Patent: July 25, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shingo Kamitani, Tsuyoshi Muramatsu