Patents by Inventor Shinichi Nakagawa

Shinichi Nakagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170232776
    Abstract: This disclosure relates to a spindle cover comprising a non-thermoplastic polyimide, wherein the spindle cover has a wall thickness in a range from about 1 mm to about 10 mm.
    Type: Application
    Filed: October 1, 2014
    Publication date: August 17, 2017
    Applicant: E.I. Du Pont de Nemours and Company
    Inventors: Isao Fukazu, Shinichi Nakagawa, Bunichi Rai
  • Publication number: 20170013866
    Abstract: Disclosed is a method for manufacturing instant noodles using extruded noodles, with each noodle having a hole extending therethrough in a longitudinal direction, wherein the hole closes or contracts during boiling or rehydration in hot water and the hole in a cross section of the noodle is configured such that a plurality of grooves are formed rotationally symmetrically about a center of the cross section, extending in an outer radial direction from the center of the cross section of the noodle.
    Type: Application
    Filed: September 28, 2016
    Publication date: January 19, 2017
    Inventors: Mitsuru Tanaka, Tatsuo Yamaya, Takuo Nakazeko, Shinichi Nakagawa, Masahiro Oda
  • Patent number: 9396299
    Abstract: Reticle marks are arranged at a plurality of places in a kerf region of a reticle, the area of a polygon with apexes at arrangement positions of the reticle marks is calculated, and the arrangement positions of the reticle marks are decided based on results of calculation of the area of the polygon.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: July 19, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinichi Nakagawa, Nobuhiro Komine, Kazuhiro Segawa, Manabu Takakuwa, Motohiro Okada
  • Publication number: 20160043037
    Abstract: According to one embodiment, there is provided a mark comprising a first mark pattern, a second mark pattern, and an opening pattern. The first mark pattern is arranged in a lower layer of a semiconductor wafer that includes a substrate, the lower layer, an intermediate layer, and an upper layer. The second mark pattern is arranged in the upper layer. The opening pattern exposes the first mark pattern.
    Type: Application
    Filed: December 23, 2014
    Publication date: February 11, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinichi NAKAGAWA, Nobuhiro KOMINE, Yoshinori HAGIO, Kentaro KASA
  • Publication number: 20160020099
    Abstract: According to one embodiment, first, an embedment material is embedded between linear core material patterns in such a manner that a height thereof becomes lower than a height of each of the core material patterns. Then, a shrink agent is supplied and solidified on the embedment material. Subsequently, the solidified shrink agent and the embedment material are removed and a spacer film is formed on an object of processing. Then, the spacer film is etched-back and a spacer pattern is formed by removal of the core material patterns. The solidified shrink agent which is formed in such a manner that a width of the spacer pattern becomes narrow in a region corresponding to a position where the shrink agent, in a sectional surface vertical to an extended direction of the spacer pattern is supplied is removed.
    Type: Application
    Filed: December 17, 2014
    Publication date: January 21, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro SEGAWA, Nobuhiro KOMINE, Kentaro MATSUNAGA, Takehiro KONDOH, Shinichi NAKAGAWA
  • Publication number: 20150339423
    Abstract: Reticle marks are arranged at a plurality of places in a kerf region of a reticle, the area of a polygon with apexes at arrangement positions of the reticle marks is calculated, and the arrangement positions of the reticle marks are decided based on results of calculation of the area of the polygon.
    Type: Application
    Filed: September 4, 2014
    Publication date: November 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinichi Nakagawa, Nobuhiro Komine, Kazuhiro Segawa, Manabu Takakuwa, Motohiro Okada
  • Publication number: 20150234268
    Abstract: According to one embodiment, a first auxiliary pattern is arranged at a corner of a mask pattern, an arrangement position of a second auxiliary pattern is calculated based on an opening angle of a resist pattern to which the mask pattern is transferred, and the second auxiliary pattern is arranged at the arrangement position.
    Type: Application
    Filed: July 3, 2014
    Publication date: August 20, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinichi NAKAGAWA, Kazunori IIDA, Masanari KAJIWARA, Motohiro OKADA
  • Patent number: 8742730
    Abstract: A charging circuit that prevents a system abnormality caused by removal of a battery. The charging circuit includes a constant voltage charge controller which detects charge voltage and performs a constant voltage charging operation. A constant current charge controller detects charge current and performs a constant current charging operation. A controller controls the constant voltage charge controller to perform the constant voltage charging operation during a period from when the charge voltage reaches a fully charged voltage to when the charge current decreases to a charge completion current. The controller suspends charging the battery when the constant voltage charging operation is being performed and detects whether or not the battery is coupled to the charging circuit based on the charge voltage during the charging suspension.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: June 3, 2014
    Assignee: Spansion LLC
    Inventor: Shinichi Nakagawa
  • Patent number: 8598851
    Abstract: A charging circuit that prevents a system abnormality caused by removal of a battery. The charging circuit includes a constant voltage charge controller which detects charge voltage and performs a constant voltage charging operation. A constant current charge controller detects charge current and performs a constant current charging operation. A controller controls the constant voltage charge controller to perform the constant voltage charging operation during a period from when the charge voltage reaches a fully charged voltage to when the charge current decreases to a charge completion current. The controller suspends charging the battery when the constant voltage charging operation is being performed and detects whether or not the battery is coupled to the charging circuit based on the charge voltage during the charging suspension.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: December 3, 2013
    Assignee: Spansion LLC
    Inventor: Shinichi Nakagawa
  • Publication number: 20130302498
    Abstract: Disclosed is an extruded noodle having a hole extending therethrough in a longitudinal direction, wherein: the hole closes or contracts during boiling or rehydration in hot water; and the hole in a cross section of the noodle is configured such that a plurality of grooves are formed rotationally symmetrically about a center of the cross section, extending in an outer radial direction from the center of the cross section of the noodle.
    Type: Application
    Filed: December 21, 2011
    Publication date: November 14, 2013
    Applicant: NISSIN FOODS HOLDINGS CO., LTD.
    Inventors: Mitsuru Tanaka, Tatsuo Yamaya, Takuo Nakazeko, Shinichi Nakagawa, Masahiro Oda
  • Publication number: 20130111416
    Abstract: According to one embodiment, a design data optimization method includes forming an angular aperture model, in first design data including a first and a second line patterns indicating an interconnect layout, based on an angular aperture between the first line pattern in which a conversion difference prediction point is set in a vertical direction and the second line pattern, and changing a distance between the first and second line patterns or a line width of the first and second line patterns in the first design data based on the angular aperture model and optimizing the first design data to second design data including the first and second line patterns changed.
    Type: Application
    Filed: March 22, 2012
    Publication date: May 2, 2013
    Inventors: Shinichi NAKAGAWA, Chikaaki Kodama, Kouichi Nakayama, Toshiya Kotani, Fumiharu Nakajima
  • Patent number: 8324873
    Abstract: A power supply apparatus is provided which includes: a first switch provided between an inductor and a terminal to which a reference voltage is applied; a second switch provided between the inductor and an output terminal; a first comparator circuit that compares an input voltage with a first comparison voltage; a signal generating circuit that outputs a frequency signal according to an output from the first comparator circuit; and a first control circuit that controls the first and second switches based on an output from the signal generating circuit to control an electrical current flowing into the inductor.
    Type: Grant
    Filed: December 13, 2009
    Date of Patent: December 4, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shinichi Nakagawa, Masahiro Natsume, Katsuyuki Yasukouchi
  • Patent number: 7993506
    Abstract: There is provided a gas sensor, including a gas sensing film formed of an oxide semiconductor material and a gas-permeable protection layer formed of oxide particles and arranged on the gas sensing film. The oxide particles of the protection layer have an average particle size of 500 nm or smaller.
    Type: Grant
    Filed: January 16, 2008
    Date of Patent: August 9, 2011
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Yoshihiro Nakano, Shinichi Nakagawa, Yuichi Koyama, Takio Kojima
  • Patent number: 7964288
    Abstract: Disclosed is a method of manufacturing a semiconductor device, which includes exposing a photoresist using an exposing mask provided with a light-shielding pattern having two or more narrow width portions, developing the photoresist to form a plurality of stripe-shaped resist patterns, selectively etching a first conductive film using the resist pattern as a mask, forming an intermediate insulating film on the first conductive film, forming a second conductive film on the intermediate insulating film, and forming, by patterning the first conductive film, the intermediate insulating film, and the second conductive film, a flash memory cell and a structure constructed by forming a lower conductor pattern, a segment of the intermediate insulating film, and a dummy gate electrode in this stacking order.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: June 21, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shinichi Nakagawa, Itsuro Sannomiya
  • Patent number: D637945
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: May 17, 2011
    Assignee: Nissan Motor Co., Ltd.
    Inventor: Shinichi Nakagawa
  • Patent number: D638759
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: May 31, 2011
    Assignee: Nissan Motor Co., Ltd.
    Inventor: Shinichi Nakagawa
  • Patent number: D746188
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: December 29, 2015
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Shinichi Nakagawa, Yoshihiro Okada
  • Patent number: D792621
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: July 18, 2017
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Hideo Komuro, Shinichi Nakagawa
  • Patent number: D794848
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: August 15, 2017
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Hideo Komuro, Shinichi Nakagawa
  • Patent number: D794849
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: August 15, 2017
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Hideo Komuro, Shinichi Nakagawa