Patents by Inventor Shinji Ishida

Shinji Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060005371
    Abstract: A tube connecting apparatus capable of stably and reliably connecting tubes in which liquid is contained and sealed is provided. A tube connecting apparatus 1 equips a first tube-holding assembly 2 and a second tube-holding assembly 3, each holding tube 8, 9 in which blood is contained and sealed in a parallel state. A first clamp 6 and a second clamp 7, each pressing the tubes to a flat state, is provided at the first tube-holding assembly 2 and the second tube-holding assembly 3. A tube-pushing member 10 which presses the tubes to a flat state is disposed movably to and integrally with the first clamp 6 at a side of the second clamp 7. The tube connecting apparatus 1 has a cutting mechanism 4, disposed between the first clamp 6 and the second clamp 7, for melting and cutting the tubes, and has a movement mechanism which moves the first tube-holding assembly 2 and the second tube-holding assembly 3 such that end portions to be connected contact closely each other.
    Type: Application
    Filed: August 29, 2003
    Publication date: January 12, 2006
    Applicant: TERUMO KABUSHIKI KAISHA
    Inventors: Hiroaki Sano, Masaru Nagashimada, Shinji Ishida, Satoshi Yamanushi, Hideya Fujihara, Osamu Sumiya
  • Patent number: 6864021
    Abstract: The invention relates to a photomask for use in a thermal flow process in which: a photomask is prepared in which a plurality of exposure openings are formed; a resist is applied to the surface of a layer of a semiconductor integrated circuit that is to undergo processing; this resist is patterned by an exposure process through the photomask to form a plurality of openings in the resist that correspond to each of the exposure openings; and the patterned resist is then heated to cause each of the openings to shrink; wherein at least a portion of exposure openings among the plurality of exposure openings are formed in shapes that compensate for anisotropic deformation that occurs in the openings when the patterned resist is heated to cause each of the openings to shrink. Since the openings that are formed in the resist are provided in advance with shapes that compensate for the deformation that occurs when the openings shrink, these openings attain the proper shape after undergoing shrinking and deformation.
    Type: Grant
    Filed: January 13, 2003
    Date of Patent: March 8, 2005
    Assignee: NEC Electronics Corporation
    Inventors: Haruo Iwasaki, Shinji Ishida, Tsuyoshi Yoshii
  • Patent number: 6842066
    Abstract: A bias circuit which supplies a bias voltage to a first transistor comprises a second transistor formed on a same semiconductor substrate as the first transistor and having a control electrode and a first and a second main electrodes; a resistance circuit; and a first and a second level shifters. The second transistor is either a metal semiconductor field effect transistor or a high electron mobility transistor. One end of the resistance circuit is connected to a voltage supply, other end of the resistance circuit is connected to the first main electrode of the second transistor, the control electrode of the second transistor is connected to the second main electrode of the second transistor, the second main electrode of the second transistor is connected to a common voltage. A voltage at the first main electrode of the second transistor is divided by the first and second level shifters and the divided voltage is outputted as the bias voltage.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: January 11, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Ishida, Hironori Nagasawa
  • Publication number: 20040046599
    Abstract: A bias circuit which supplies a bias voltage to a first transistor comprises a second transistor formed on a same semiconductor substrate as the first transistor and having a control electrode and a first and a second main electrodes; a resistance circuit; and a first and a second level shifters. The second transistor is either a metal semiconductor field effect transistor or a high electron mobility transistor. One end of the resistance circuit is connected to a voltage supply, other end of the resistance circuit is connected to the first main electrode of the second transistor, the control electrode of the second transistor is connected to the second main electrode of the second transistor, the second main electrode of the second transistor is connected to a common voltage. A voltage at the first main electrode of the second transistor is divided by the first and second level shifters and the divided voltage is outputted as the bias voltage.
    Type: Application
    Filed: May 23, 2003
    Publication date: March 11, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinji Ishida, Hironori Nagasawa
  • Publication number: 20030124759
    Abstract: A photo mask which is used for exposure of an isolated pattern and a dense pattern for a semiconductor substrate. The photo mask includes a transparent substrate, a pair of first patterns, a first assistant pattern and a plurality of second patterns. The pair of first patterns is separated from each other by a first distance, wherein one of the first pattern is arranged at one side of the isolated pattern, and another of the first pattern is arranged at another side. The first assistant pattern is provided apart from the one of the first pattern by the first distance. In the plurality of second patterns, each of the linear patterns is sandwiched between two of the second patterns that are adjacent to each other. One of the linear patterns is separated from adjacent the other of the linear patterns by a predetermined distance. A phase of light transmitted through the one of the first pattern and a phase of light transmitted through the assistant pattern are opposite to each other.
    Type: Application
    Filed: December 20, 2002
    Publication date: July 3, 2003
    Applicant: NEC Electronics Corporation
    Inventors: Shinji Tsuboi, Shinji Ishida
  • Publication number: 20030104289
    Abstract: The invention relates to a photomask for use in a thermal flow process in which: a photomask is prepared in which a plurality of exposure openings are formed; a resist is applied to the surface of a layer of a semiconductor integrated circuit that is to undergo processing; this resist is patterned by an exposure process through the photomask to form a plurality of openings in the resist that correspond to each of the exposure openings; and the patterned resist is then heated to cause each of the openings to shrink; wherein at least a portion of exposure openings among the plurality of exposure openings are formed in shapes that compensate for anisotropic deformation that occurs in the openings when the patterned resist is heated to cause each of the openings to shrink. Since the openings that are formed in the resist are provided in advance with shapes that compensate for the deformation that occurs when the openings shrink, these openings attain the proper shape after undergoing shrinking and deformation.
    Type: Application
    Filed: January 13, 2003
    Publication date: June 5, 2003
    Inventors: Haruo Iwasaki, Shinji Ishida, Tsuyoshi Yoshii
  • Publication number: 20030104290
    Abstract: The invention relates to a photomask for use in a thermal flow process in which: a photomask is prepared in which a plurality of exposure openings are formed; a resist is applied to the surface of a layer of a semiconductor integrated circuit that is to undergo processing; this resist is patterned by an exposure process through the photomask to form a plurality of openings in the resist that correspond to each of the exposure openings; and the patterned resist is then heated to cause each of the openings to shrink; wherein at least a portion of exposure openings among the plurality of exposure openings are formed in shapes that compensate for anisotropic deformation that occurs in the openings when the patterned resist is heated to cause each of the openings to shrink. Since the openings that are formed in the resist are provided in advance with shapes that compensate for the deformation that occurs when the openings shrink, these openings attain the proper shape after undergoing shrinking and deformation.
    Type: Application
    Filed: January 13, 2003
    Publication date: June 5, 2003
    Inventors: Haruo Iwasaki, Shinji Ishida, Tsuyoshi Yoshii
  • Patent number: 6566041
    Abstract: The invention relates to a photomask for use in a thermal flow process in which: a photomask is prepared in which a plurality of exposure openings are formed; a resist is applied to the surface of a layer of a semiconductor integrated circuit that is to undergo processing; this resist is patterned by an exposure process through the photomask to form a plurality of openings in the resist that correspond to each of the exposure openings; and the patterned resist is then heated to cause each of the openings to shrink; wherein at least a portion of exposure openings among the plurality of exposure openings are formed in shapes that compensate for anisotropic deformation that occurs in the openings when the patterned resist is heated to cause each of the openings to shrink. Since the openings that are formed in the resist are provided in advance with shapes that compensate for the deformation that occurs when the openings shrink, these openings attain the proper shape after undergoing shrinking and deformation.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: May 20, 2003
    Assignee: NEC Electronics Corporation
    Inventors: Haruo Iwasaki, Shinji Ishida, Tsuyoshi Yoshii
  • Publication number: 20020058188
    Abstract: A Levenson phase shift mask has a phase shifter implemented by thin transparent portions and a non-phase shifter implemented by thick transparent portions, and the thin transparent portions are to be equal in transmittance to and 180 degrees different in phase from the thick transparent portions, wherein a dispersion of light intensity in optical images of the phase shifter and the non-phase shifter obtained by a CCD camera is analyzed to see whether or not the abnormal difference in transmittance and the abnormal phase difference take place, if the abnormal difference in transmittance or the abnormal phase difference takes place, the thin/thick transparent portions are reshaped so as to repair the Levenson phase shift mask.
    Type: Application
    Filed: November 14, 2001
    Publication date: May 16, 2002
    Applicant: NEC CORPORATION
    Inventors: Haruo Iwasaki, Shinji Ishida
  • Patent number: 6355382
    Abstract: Disclosed is a photomask in which contrast of light intensity of a pattern to be transferred (main pattern) is enhanced on an image plane while transfer of auxiliary pattern themselves is suppressed.
    Type: Grant
    Filed: December 29, 1999
    Date of Patent: March 12, 2002
    Assignee: NEC Corporation
    Inventors: Tadao Yasuzato, Shinji Ishida
  • Publication number: 20010007732
    Abstract: The invention relates to a photomask for use in a thermal flow process in which: a photomask is prepared in which a plurality of exposure openings are formed; a resist is applied to the surface of a layer of a semiconductor integrated circuit that is to undergo processing; this resist is patterned by an exposure process through the photomask to form a plurality of openings in the resist that correspond to each of the exposure openings; and the patterned resist is then heated to cause each of the openings to shrink; wherein at least a portion of exposure openings among the plurality of exposure openings are formed in shapes that compensate for anisotropic deformation that occurs in the openings when the patterned resist is heated to cause each of the openings to shrink. Since the openings that are formed in the resist are provided in advance with shapes that compensate for the deformation that occurs when the openings shrink, these openings attain the proper shape after undergoing shrinking and deformation.
    Type: Application
    Filed: January 10, 2001
    Publication date: July 12, 2001
    Applicant: NEC Corporation
    Inventors: Haruo Iwasaki, Shinji Ishida, Tsuyoshi Yoshii
  • Patent number: 6157608
    Abstract: In an optical disc, a sector is sequentially formed with a first gap field, a first guard data recording field, a data recording field composed of synchronous signal and user data, a second guard data recording field, and a second gap field, wherein the length of the first and second gap fields, and the length of the first and second guard data recording fields is changed randomly in every recording, and the changing amount of the first and second guard data recording fields is set smaller than the changing amount of the first and second guard data recording fields, thereby suppressing optical disc medium deterioration in every sector and every mark resulting from repeated recording.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: December 5, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Ishida, Shinji Kubota, Mamoru Shoji, Shinji Ishida
  • Patent number: 6150059
    Abstract: A photomask has a plurality of main holes which pass a prescribed light beam that is shone onto positions that make up a plurality of pattern parts, at locations that are opposite a plurality of pattern parts for said semiconductor device, this photomask also having a plurality of minute auxiliary holes, which pass a light beam of a degree that is not transferred at the time of exposure, these auxiliary holes being disposed between the main holes.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: November 21, 2000
    Assignee: NEC Corporation
    Inventors: Hiroyoshi Tanabe, Shinji Ishida, Tadao Yasuzato
  • Patent number: 6130867
    Abstract: In an optical disc, a sector is sequentially formed with a first gap field, a first guard data recording field, a data recording field composed of synchronous signal and user data, a second guard data recording field, and a second gap field, wherein the length of the first and second gap fields, and the length of the first and second guard data recording fields is changed randomly in every recording, and the changing amount of the first and second guard data recording fields is set smaller than the changing amount of the first and second guard data recording fields, thereby suppressing optical disc medium deterioration in every sector and every mark resulting from repeated recording.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: October 10, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Ishida, Shinji Kubota, Mamoru Shoji, Shinji Ishida
  • Patent number: 6128269
    Abstract: In an optical disc, a sector is sequentially formed with a first gap field, a first guard data recording field, a data recording field composed of synchronous signal and user data, a second guard data recording field, and a second gap field, wherein the length of the first and second gap fields, and the length of the first and second guard data recording fields is changed randomly in every recording, and the changing amount of the first and second guard data recording fields is set smaller than the changing amount of the first and second guard data recording fields, thereby suppressing optical disc medium deterioration in every sector and every mark resulting from repeated recording.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: October 3, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Ishida, Shinji Kubota, Mamoru Shoji, Shinji Ishida
  • Patent number: 6097694
    Abstract: An optical disc having a plurality of sectors, each sector sequentially comprising a field for recording guard data, a data recording field containing a synchronous signal and following user data, the guard data in the guard data recording field corresponding to a recording pattern of the synchronous signal, and the phase of the recording pattern being continuous at the boundary of the guard data recording field and the data recording field; and a recording method using such discs; and a device for formatting and recording on such discs.
    Type: Grant
    Filed: September 16, 1999
    Date of Patent: August 1, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Ishida, Shinji Kubota, Mamoru Shoji, Shinji Ishida
  • Patent number: 6034932
    Abstract: In an optical disc, a sector is sequentially formed with a first gap field, a first guard data recording field, a data recording field composed of synchronous signal and user data, a second guard data recording field, and a second gap field, wherein the length of the first and second gap fields, and the length of the first and second guard data recording fields is changed randomly in every recording, and the changing amount of the first and second guard data recording fields is set smaller than the changing amount of the first and second guard data recording fields, thereby suppressing optical disc medium deterioration in every sector and every mark resulting from repeated recording.
    Type: Grant
    Filed: October 7, 1997
    Date of Patent: March 7, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Ishida, Shinji Kubota, Mamoru Shoji, Shinji Ishida
  • Patent number: 6004699
    Abstract: A photomask used for a projection exposure equipment comprises a transparent substrate and a light intercepting film provided on the transparent substrate. The transparent substrate comprises a main pattern region and an auxiliary pattern region provided in a periphery of the main pattern region. The auxiliary pattern region is etched to a depth at which a phase difference arises between light transmitted through the main pattern and light transmitted through the auxiliary pattern. The phase difference is of substantially an integral number of times as large as 360 degrees, wherein the integral number is one selected from the group consisting of integral numbers of one or more and integral numbers of minus one or less. The light intercepting film comprises openings on the main pattern region and the auxiliary pattern region.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: December 21, 1999
    Assignee: NEC Corporation
    Inventors: Tadao Yasuzato, Shinji Ishida
  • Patent number: 5935738
    Abstract: To a projection lens system is added spherical aberration of 0.1.lambda., and the exposure is performed by using a phase-shifting mask having a phase difference of 200 degrees which is provided with a phase error of 20 degrees corresponding to the spherical aberration amount. Therefore, the focus characteristic can be more remarkably flattened as compared with the prior art in which the phase difference of the mask is set to 180 degrees and the spherical aberration of the projection lens system is set to zero, so that the depth of focus can be enlarged by about 0.2 micron and the precision of the pattern dimension of semiconductor devices manufactured by using the exposure method can be enhanced.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: August 10, 1999
    Assignee: NEC Corporation
    Inventors: Tadao Yasuzato, Shinji Ishida
  • Patent number: 5908718
    Abstract: Disclosed is a photomask, which has: a transparent substrate; and masking film which is selectively formed on the transparent substrate to provide a predetermined pattern composed of a transparent region and a masking region; wherein the transparent region comprises a first transparent region which is formed adjacent to the masking region and extends like a belt along the masking region and a second transparent region which lies sandwiching the first transparent region with the masking region, whereby a phase of exposure light through the first transparent region is advanced prior to that through the second transparent region.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: June 1, 1999
    Assignee: NEC Corporation
    Inventors: Shinji Ishida, Tadao Yasuzato