Patents by Inventor Shinji Morozumi

Shinji Morozumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4148184
    Abstract: An electronic timepiece having a main oscillator circuit including a first quartz crystal vibrator as a time standard and also having a secondary oscillator circuit including a further quartz crystal vibrator as a time standard for reducing the affect of temperature on the accuracy of the timepiece by utilizing the different temperature characteristics of the respective time standards is provided. The main oscillator circuit produces a high frequency time standard signal having a first frequency rate that is determined, at least in part, by the temperature characteristic of the first time standard, which characteristic includes an inflection peak at a specific temperature. The second oscillator circuit produces a second high frequency time standard signal having a second predetermined frequency, determined, at least in part, by the temperature characteristic of the second time standard being distinct from that of the first time standard.
    Type: Grant
    Filed: July 21, 1977
    Date of Patent: April 10, 1979
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventors: Yoshikazu Akahane, Shinji Morozumi
  • Patent number: 4124975
    Abstract: A calendar watch comprising a date module plate having seven varieties of one month date module sections on its face at the angularly spaced positions, each the section having the characters of one month dates which are sequentially arranged in seven columns in which the position of the first character is different in turn by one column from each of the other date module sections, the date module plate being rotatably mounted at the back of a dial in coaxially over-lapped relation therewith and adapted to angularly rotate upon operating a manipulating part on a watch case, the dial being provided with a window for indicating therethrough an optionally selected one of the date module sections and also provided in the vicinity of the upper end of the window with a sequence of characters showing the seven days of week from Sunday to Saturday and are positioned respectively aligned with the seven columns of each of the date module sections.
    Type: Grant
    Filed: October 27, 1976
    Date of Patent: November 14, 1978
    Assignee: Orient Watch Co., Ltd.
    Inventor: Shinji Morozumi
  • Patent number: 4112670
    Abstract: An electronic timepiece wherein the timekeeping circuitry is formed of bipolar transistors and C-MOS transistors integrated on a single integrated circuit chip substrate is provided. The electronic timepiece includes timekeeping circuitry for producing timekeeping signals and a display device for displaying time in response to the timekeeping signals. At least a portion of the timekeeping circuitry is formed of C-MOS transistors formed on an integrated circuit chip substrate, a further portion of the timekeeping circuitry being formed of bipolar transistors formed in the same integrated circuit chip substrate as the C-MOS transistors.
    Type: Grant
    Filed: March 4, 1976
    Date of Patent: September 12, 1978
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Shinji Morozumi
  • Patent number: 4068090
    Abstract: An improved hearing aid utilizing integrated field-effect transistors to reduce the size and power consumption thereof is provided. The hearing aid includes a microphone input device for producing signals representative of sound, an amplifier circuit for amplifying the signals produced by microphone input device, and a loudspeaker output device for producing sound representative of the sound sensed by the microphone input device at an amplified level. The invention is particularly characterized by a portion of at least the microphone input device, amplifier circuit and/or microphone output device being formed of MOS field-effect transistors.
    Type: Grant
    Filed: July 1, 1976
    Date of Patent: January 10, 1978
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventors: Hidetoshi Komatsu, Mutsuto Tezuka, Shinji Morozumi
  • Patent number: 4063114
    Abstract: A dynamic divider circuit for dividing a clock signal by n-1 where n is an odd integer is provided. The divider circuit includes n -series connected C-MOS inverter circuits, the output of the last of the series-connected inverter circuits being coupled to the input of the first of the series-connected inverter circuits to define a closed loop. n-1 inverter circuits include first switching circuits coupled thereto, the remaining inverter circuit having a second switching circuit coupled thereto, each of the switching circuits being adapted to receive the clock pulse to be divided and produce at the output of each of the C-MOS inverter circuits the divided clock signal.
    Type: Grant
    Filed: July 8, 1975
    Date of Patent: December 13, 1977
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Shinji Morozumi
  • Patent number: 3939642
    Abstract: A semiconductor integrated circuit especially suitable for use in electronic timepieces to improve the operation thereof is provided. An integrated circuit chip including complementary coupled P-channel and N-channel MOS field effect transistors having insulation placed therebetween by forming same spaced on an insulating substrate. The insulation effects reduced current consumption to thereby enhance the life of the battery in an electronic timepiece.
    Type: Grant
    Filed: January 2, 1974
    Date of Patent: February 24, 1976
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Shinji Morozumi
  • Patent number: 3934400
    Abstract: A chronographic electronic timepiece adapted to display elapsed time wherein the time displayed is rounded off to the nearest half period is provided. Chronographic divider stages adapted to apply signals representative of elapsed time to associated display elements include a binary divider stage adapted to produce elapsed time signal having a period which is the longest time period not displayed by said display elements. A rounding off circuit is provided for advancing the period counted by the binary divider stage in order to advance the count thereof by half a period to effect a rounding off of the time displayed by the display elements.
    Type: Grant
    Filed: May 13, 1974
    Date of Patent: January 27, 1976
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventors: Izuhiko Nishimura, Shinji Morozumi
  • Patent number: 3935546
    Abstract: A monolithic integrated quartz crystal oscillator circuit having a resistance between the inverter output and the quartz crystal vibrator in order to stabilize the frequency characteristics thereof. An inverter including complementary coupled N-channel and P-channel MOS field effect transistors, and an output resistance at the drain connected terminals thereof, are monolithically integrated into a single chip. The resistance at the output terminal of the complementary coupled inverter effects a stabilization of the frequency of the quartz crystal oscillator circuit during changes in the supply voltage.
    Type: Grant
    Filed: December 12, 1973
    Date of Patent: January 27, 1976
    Assignee: Kabushiki Kaisha Seikosha
    Inventors: Shinji Morozumi, Mitsuharu Kodaira