Patents by Inventor Shinji Ota

Shinji Ota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210210821
    Abstract: A power supply device has; a battery stacked body where a plural sheets of battery cells each having a positive electrode terminal and a negative electrode terminal at one surface thereof are stacked; and a plurality of bus bars which connect the electrode terminals in the battery cells adjacently disposed. Each of the bus bars partially has a thin area whose thickness is thinner than a thickness of the other area, and an open window formed in the dun area, and opening a portion thereof. The thin area is formed in an oval shape elongated in the battery cell stacking direction, and the open window extends in a direction along the length of the oval shape. This configuration allows the thin area, above and below the length side of the oval shaped thin area, to be secured as a joining area for laser welding or the like.
    Type: Application
    Filed: January 12, 2017
    Publication date: July 8, 2021
    Applicant: SANYO Electric Co., Ltd.
    Inventors: Wataru Okada, Shinji Ota, Tetsuya Shiizaki
  • Publication number: 20210203040
    Abstract: A plurality of battery cells each having a positive electrode terminal and a negative electrode terminal; and a bus bar which connects the electrode terminals facing each other in the battery cells adjacently disposed among the plurality of battery cells.
    Type: Application
    Filed: January 12, 2017
    Publication date: July 1, 2021
    Applicant: SANYO Electric Co., Ltd.
    Inventors: Wataru Okada, Shinji Ota, Yoshiaki Ueta
  • Publication number: 20210050582
    Abstract: There is provided a battery system including parallel-connected bus bars each connecting the plurality of prismatic battery cells in parallel, and a safety mechanism configured to be capable of interrupting a current path of prismatic battery cells connected in parallel by the parallel-connected bus bars, where the sealing plate of one of the prismatic battery cells convexly deforms due to a rise in an internal pressure of this prismatic battery cell when an abnormality occurs, the sealing plate that has convexly deformed comes into contact with the parallel-connected bus bars to form external short circuitry between the electrode terminals that are positive and negative of one prismatic battery cell connected in parallel to the prismatic battery cell with the abnormality, and external short circuitry activates the safety mechanism that interrupts a current flowing into the prismatic battery cell with the abnormality.
    Type: Application
    Filed: November 15, 2018
    Publication date: February 18, 2021
    Applicant: SANYO Electric Co., Ltd.
    Inventors: Naotake Yoshida, Kazuhiro Harazuka, Nobuo Iwatsuki, Shinji Ota
  • Publication number: 20200343508
    Abstract: A short circuit current interruption method of a battery system including: stacking a plurality of prismatic battery cells and connecting the plurality of prismatic battery cells with a parallel connection bus bar in parallel to form a battery block, wherein a sealing plate of the prismatic battery cell is a plate material having flexibility that deforms when an internal pressure rises due to an internal short circuit, and when a rise in the internal pressure due to the internal short circuit of the prismatic battery cell causes deformation, the deformation of the sealing plate is detected, and when an amount of deformation exceeds a setting value, the short circuit current of the battery connected in parallel with the internally short circuited battery is interrupted.
    Type: Application
    Filed: November 15, 2018
    Publication date: October 29, 2020
    Applicant: SANYO Electric Co., Ltd.
    Inventors: Naotake Yoshida, Kazuhiro Harazuka, Nobuo Iwatsuki, Shinji Ota
  • Patent number: 10509714
    Abstract: An object of the present invention is to provide an information processing apparatus capable of performing a performance evaluation easily without using a specific communication protocol.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: December 17, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Norio Ikeda, Mitsuo Shimotani, Shinji Ota
  • Publication number: 20180024906
    Abstract: An object of the present invention is to provide an information processing apparatus capable of performing a performance evaluation easily without using a specific communication protocol.
    Type: Application
    Filed: March 9, 2015
    Publication date: January 25, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Norio IKEDA, Mitsuo SHIMOTANI, Shinji OTA
  • Patent number: 9101023
    Abstract: A light-emitting element driving circuit controls the luminance of light-emitting elements by using a PWM signal. A display device includes the driving circuit and multiple light-emitting elements. The driving circuit includes a control circuit that generates a control signal by using a divided signal based on an input PWM signal, and a light-emitting element driving unit that drive the light-emitting elements by using the control signal. The control signal includes a larger number of frequency components in comparison with frequency components of the input PWM signal.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: August 4, 2015
    Assignee: NLT TECHNOLOGIES, LTD.
    Inventor: Shinji Ota
  • Patent number: 8797250
    Abstract: A liquid crystal display device is provided which is capable of reducing EMI (ElectraMagnetic Interference) noises while simultaneously responding to requirements for the high-speed transmission of image data, miniaturization and thinning of a signal processing board. A timing controller outputs, in accordance with an input data signal and input clock signal, a data line driving circuit controlling signal, internal data signal, internal clock signal to a data line driving circuit and outputs a scanning line driving circuit controlling signal to a scanning line driving circuit. The timing controller has a clock signal frequency setting mode in which a frequency of each of clock signals is set to a different value and the clock signals are supplied to the data line driving circuits and other data line driving circuits in one region and another region.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: August 5, 2014
    Assignee: NLT Technologies, Ltd.
    Inventor: Shinji Ota
  • Publication number: 20140125243
    Abstract: Provided are a light-emitting element driving circuit for controlling luminance of light-emitting elements by using a PWM signal, and a display device including the light-emitting element driving circuit and plural light-emitting elements. The light-emitting element driving circuit includes: a control circuit configured to generate a control signal based on an input PWM signal in which ON-periods alternate with OFF-periods to form pulses; and a light-emitting element driving unit configured to drive the plurality of light-emitting elements by using the control signal. The control signal includes alternating first periods and second periods, where the first periods and the second periods correspond to the ON-periods and the OFF-periods of the input PWM signal, respectively. Each of the first periods includes an ON-period, and each of the second period includes an ON-period. The control signal includes a larger number of frequency components in comparison with frequency components of the input PWM signal.
    Type: Application
    Filed: November 5, 2013
    Publication date: May 8, 2014
    Applicant: NLT Technologies, Ltd.
    Inventor: Shinji OTA
  • Patent number: 8531013
    Abstract: Disclosed is a semiconductor device including a printed-circuit board which includes a plurality of first electrodes, a plurality of second electrodes and a semiconductor chip on which a plurality of first connection pads are aligned in a first line being disposed along an outer circumference side of a top surface and a plurality of second connection pads are aligned in a second line being disposed inside of and apart from the first line, when the semiconductor chip is seen from above, and any of the plurality of first connection pads are used for a power voltage terminal and a system reset terminal of the semiconductor device.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: September 10, 2013
    Assignee: Casio Computer Co., Ltd.
    Inventors: Teiji Shindo, Shinji Ota
  • Publication number: 20130095370
    Abstract: A battery assembly production method is provided that enables the reduction in mechanical stress caused in at least one cell. A battery assembly produced by this method is also provided. The method includes a first welding step of resistance-welding a connection member 5A to a cell 4b, and a second welding step of welding the connection member 5A to a cell 4a subsequent to the first welding step. In at least the second welding step out of the first and second welding steps, an end surface of the connection member 5A, which rises from an outer side surface of the cell 4a when the connection member 5A is brought into contact with the outer side surface, is melted and welded to the cell 4a without pressing the connection member 5A.
    Type: Application
    Filed: June 1, 2011
    Publication date: April 18, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Shinji Ota, Shinsuke Fukuda
  • Publication number: 20120135300
    Abstract: The present invention provides a battery storage case capable of achieving easier insertion of an adhesive projection into an adhesion groove and ensuring adhesion sealability, and a battery pack having this battery storage case. The battery storage case includes: first and second cases 4 and 3 for sandwiching and storing a battery 2 therebetween in a predetermined sandwiching direction; an adhesive projection 10 provided in the first case 4; and an adhesion groove 7 provided in the second case 3, wherein the width of the adhesion groove 7 is set to be greater than the thickness of the adhesive projection 10, and the first case 4 and the second case 3 can be adhered to each other in a state that a clearance K1 on the outer circumference side of the adhesive projection 10 is different from a clearance K2 on the inner circumference side of the adhesive projection 10 over the entire circumference of an axis parallel to the sandwiching direction.
    Type: Application
    Filed: January 14, 2011
    Publication date: May 31, 2012
    Inventor: Shinji Ota
  • Publication number: 20120129043
    Abstract: To provide a method for producing an assembled battery with which electric resistance welding can be performed more efficiently and flexibility in cell layout can be increased. The method includes a step of preparing a lead plate 5A for connecting a cell 4A and a cell 4B, and a lead plate 5B for connecting the cell 4B and a cell 4C; a step of causing the lead plates 5A and 5B to contact against the cell 4B with one end of the lead plate 5A and one end of the lead plate 5B being spaced apart from each other with a predetermined plate gap therebetween; and a step of electric resistance welding the lead plates 5A and 5B to the cell 4B by causing electrodes to contact against the one end of the lead plate 5A and the one end of the lead plate 5B from the side opposite to the cell 4B and applying electric current between the electrodes.
    Type: Application
    Filed: July 11, 2011
    Publication date: May 24, 2012
    Inventors: Shinsuke Fukuda, Shinji Ota
  • Publication number: 20120129017
    Abstract: A battery pack and a manufacturing method thereof enabling the streamlining of assembly work are provided. This battery pack comprises a printed circuit board 6 including wiring, lead plates 7, 10 that are fixed to the printed circuit board 6 and that electrically connect the wiring of the printed circuit board 6 and both electrodes 4, 5 of a battery 2, and a screw 12 that presses the lead plates 7, 10 so as to maintain a state of electrically connecting of the lead plates 7, 10 to both electrodes 4, 5 of the battery 2 by being screwed into the battery 2.
    Type: Application
    Filed: January 18, 2011
    Publication date: May 24, 2012
    Applicant: PANASONIC CORPORATION
    Inventor: Shinji Ota
  • Publication number: 20120121969
    Abstract: A thin-wall portion can be formed while securing fire retardancy and restrictions on shapes of a battery pack case can be removed. A battery pack case includes a first case component 21 and a second case component 22 having a region coupled to the first case component 21. A space for housing a battery is formed by coupling the first case component 21 and the second case component 22 with each other. The first case component 21 and the second case component 22 respectively include a first resin portion 25 constituted by a fire-retardant resin film and a second resin portion 26 in which, while retaining a predetermined region of the first resin portion 25, resin is integrally molded at a region of the first resin portion 25 which differs from the predetermined region.
    Type: Application
    Filed: July 20, 2010
    Publication date: May 17, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Takashi Takemura, Setsuo Tagawa, Shinji Ota
  • Patent number: 8107117
    Abstract: An information processing device includes: a memory that stores function identifiers assigned to functions built into the information processing device, and function identifiers assigned to functions not built into the information processing device; a display controller that causes a display unit to display the function identifiers stored in the memory; a manipulation unit that accepts manipulation for specifying one of the function identifiers displayed by the display controller; and a transmission unit that transmits, if the one of the function identifiers which has been specified by the manipulation is assigned to one of the functions not built into the information processing device, the specified one of the information identifiers or an information item indicating one of the functions to which is assigned one of the information identifiers which has been specified by the manipulation, to a predetermined device.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: January 31, 2012
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Masahiko Harada, Shinji Ota, Toru Hada, Kohei Tanaka, Goro Noda, Atsushi Takeshita
  • Publication number: 20110304031
    Abstract: Disclosed is a semiconductor device including a printed-circuit board which includes a plurality of first electrodes, a plurality of second electrodes and a semiconductor chip on which a plurality of first connection pads are aligned in a first line being disposed along an outer circumference side of a top surface and a plurality of second connection pads are aligned in a second line being disposed inside of and apart from the first line, when the semiconductor chip is seen from above, and any of the plurality of first connection pads are used for a power voltage terminal and a system reset terminal of the semiconductor device.
    Type: Application
    Filed: June 10, 2011
    Publication date: December 15, 2011
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Teiji SHINDO, Shinji Ota
  • Patent number: 8032769
    Abstract: The controlling apparatus is provided with: a memory that stores application software; a setting part that sets an operational manner related to power consumption of an apparatus running the application software, corresponding to the application software stored in the memory; and a controller that controls the power consumption of the apparatus according to the operational manner set by the setting part.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: October 4, 2011
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Goro Noda, Kouhei Hashimoto, Shinji Ota, Masahiko Harada, Toru Hada, Kohei Tanaka, Atsushi Takeshita
  • Publication number: 20100253672
    Abstract: A liquid crystal display device is provided which is capable of reducing EMI (ElectraMagnetic Interference) noises while simultaneously responding to requirements for the high-speed transmission of image data, miniaturization and thinning of a signal processing board. A timing controller outputs, in accordance with an input data signal and input clock signal, a data line driving circuit controlling signal, internal data signal, internal clock signal to a data line driving circuit and outputs a scanning line driving circuit controlling signal to a scanning line driving circuit. The timing controller has a clock signal frequency setting mode in which a frequency of each of clock signals is set to a different value and the clock signals are supplied to the data line driving circuits and other data line driving circuits in one region and another region.
    Type: Application
    Filed: April 1, 2010
    Publication date: October 7, 2010
    Applicant: NEC LCD TECHNOLOGIES, LTD.
    Inventor: Shinji OTA
  • Patent number: 7622219
    Abstract: A battery pack (10) includes: a battery (1); a circuit substrate (5) having a charge/discharge safety circuit and arranged on one end face (3) of the battery; and an end case (6) in which an external connection terminal (7) is set. In this battery pack, the circuit substrate (5) is arranged inside the end case (6), and the end case (6) is secured to the battery by screws (12) with a screw head (12a) extending through and engaging with the end case (6) at both ends and tips of the screw (12) being engaged into the end face (3) at both ends of the battery (1). This achieves a compact battery pack with a reduced connection resistance, while achieving both high reliability and productivity.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: November 24, 2009
    Assignee: Panasonic Corporation
    Inventors: Shinji Ota, Katsuyuki Shirasawa, Toshio Yamashitafuji, Takeshi Ishimaru, Kenjin Masumoto, Hiroaki Imanishi