Abstract: Provided is a liquid crystal display device including a liquid crystal panel including in the following order an active matrix substrate, a liquid crystal layer, and a counter substrate. The active matrix substrate includes in the following order a first electrode and a second electrode including a first linear electrode portion extending in a first direction. The counter substrate includes a third electrode including second linear electrode portions extending in a second direction crossing the first direction, and a fourth electrode including an island-shaped electrode portion as a floating electrode. The island-shaped electrode portion is disposed between the second linear electrode portions in a plan view, overlaps an optical aperture of one of two pixels adjacent to each other along the second direction, and does not overlap an optical aperture of the other of the two pixels.

Abstract: A semiconductor device includes: first and second power transistors connected in parallel with each other and having different saturated currents; and a gate driver driving the first and second power transistors with individual gate voltages, respectively, the gate driver includes a drive circuit receiving an input signal and outputting a drive signal, a first amplifier amplifying the drive signal in accordance with first power voltage and supplying the amplified drive signal to a gate of the first power transistor, and a second amplifier amplifying the drive signal in accordance with second power voltage different from the first power voltage and supplying the amplified drive signal to a gate of the second power transistor.

Abstract: A semiconductor device includes: first and second power transistors connected in parallel with each other and having different saturated currents; and a gate driver driving the first and second power transistors with individual gate voltages, respectively, the gate driver includes a drive circuit receiving an input signal and outputting a drive signal, a first amplifier amplifying the drive signal in accordance with first power voltage and supplying the amplified drive signal to a gate of the first power transistor, and a second amplifier amplifying the drive signal in accordance with second power voltage different from the first power voltage and supplying the amplified drive signal to a gate of the second power transistor.

Abstract: A motor drive system includes: an inverter that drives a motor; a current detector that detects and outputs the first signal that is a current value of a current flowing through the inverter; a first low-pass filter that removes a noise frequency component from the first signal and outputs a second signal that is a current value after the noise frequency component has been removed; a demagnetization current determiner that compares a demagnetization current threshold with the second signal, and outputs a demagnetization protection signal when the second signal takes a value larger than the demagnetization current threshold; and a short circuit determiner that compares a third signal with a short circuit and outputs an anomaly signal for stopping the inverter when the third signal takes a value larger than or equal to the short circuit threshold.

Abstract: A semiconductor package includes: a plurality of die pads; a plurality of semiconductor chips provided on the plurality of die pads respectively; a plurality of lead terminals connected to the plurality of semiconductor chips respectively; and a package sealing the plurality of die pads, the plurality of semiconductor chips, and the plurality of lead terminals, the plurality of die pads and the plurality of lead terminals are exposed from a lower surface of the package, and on the lower surface of the package, grooves are provided among the die pads adjacent to one another and among the lead terminals adjacent to one another.

Abstract: A semiconductor device includes: a die pad having a conductive property; a semiconductor chip; a back surface electrode formed on a back surface of the semiconductor chip; an Ag bonding material containing 50 to 85% Ag and bonding the back surface electrode and the die pad; a terminal connected to the semiconductor chip; and sealing resin having an insulating property and covering the die pad, the semiconductor chip, the Ag bonding material, and a part of the terminal, wherein a distal end of the terminal protruding from the sealing resin includes a substrate bonding surface, a metal burr protrudes from a peripheral portion on a lower surface of the back surface electrode contacting the Ag bonding material, and a thickness of the Ag bonding material is larger than a height in an up-down direction of the metal burr by 2 µm or more.

Abstract: A semiconductor device includes: a first terminal inputting a first voltage from outside; a drive unit using the first voltage as a power supply voltage and outputting a drive signal; a switching device driven by the drive signal; a second terminal separated from the first terminal and inputting a second voltage from outside; a comparator using a voltage generated from the second voltage as a power supply voltage and outputting an output signal when a voltage generated from the first voltage is less than or equal to a reference potential; and a shut-off switch shutting off a transmission of the drive signal to the switching device from the drive unit in response to the output signal.

Abstract: A motor drive system includes: an inverter that drives a motor; a current detector that detects and outputs the first signal that is a current value of a current flowing through the inverter; a first low-pass filter that removes a noise frequency component from the first signal and outputs a second signal that is a current value after the noise frequency component has been removed; a demagnetization current determiner that compares a demagnetization current threshold with the second signal, and outputs a demagnetization protection signal when the second signal takes a value larger than the demagnetization current threshold; and a short circuit determiner that compares a third signal with a short circuit and outputs an anomaly signal for stopping the inverter when the third signal takes a value larger than or equal to the short circuit threshold.

Abstract: A semiconductor package includes: a plurality of die pads; a plurality of semiconductor chips provided on the plurality of die pads respectively; a plurality of lead terminals connected to the plurality of semiconductor chips respectively; and a package sealing the plurality of die pads, the plurality of semiconductor chips, and the plurality of lead terminals, the plurality of die pads and the plurality of lead terminals are exposed from a lower surface of the package, and on the lower surface of the package, grooves are provided among the die pads adjacent to one another and among the lead terminals adjacent to one another.

Abstract: A semiconductor module includes: an insulating heat dissipation sheet; a semiconductor device provided on the heat dissipation sheet; a lead frame including a lead terminal and a die pad which are formed integrally; a wire connecting the lead frame to the semiconductor device and constituting a main current path; and a mold resin scaling the heat dissipation sheet, the semiconductor device, the lead frame and the wire, wherein the lead terminal is led out from the mold resin, the heat dissipation sheet is in direct contact with an undersurface of the die pad, and the wire is bonded to the die pad directly above a contact part provided between the die pad and the heat dissipation sheet.

Abstract: A semiconductor device includes: first and second power transistors connected in parallel with each other and having different saturated currents; and a gate driver driving the first and second power transistors with individual gate voltages, respectively, the gate driver includes a drive circuit receiving an input signal and outputting a drive signal, a first amplifier amplifying the drive signal in accordance with first power voltage and supplying the amplified drive signal to a gate of the first power transistor, and a second amplifier amplifying the drive signal in accordance with second power voltage different from the first power voltage and supplying the amplified drive signal to a gate of the second power transistor.

Abstract: Provided is a technique for reducing the size and cost of a semiconductor device. A semiconductor device includes an IGBT module having an IGBT, and a MOSFET module having a MOSFET whose operational property is different from that of the IGBT, the MOSFET module being connected to the IGBT module in parallel. The semiconductor device is capable of selectively executing an operation mode in which switching timing in the IGBT module and switching timing in the MOSFET module are non-identical.

Abstract: To provide a technique to complement overcurrent protection and short circuit protection. An LVIC includes an overcurrent detector configured to detect whether or not a first current flowing through a load and a semiconductor switching element is abnormal and a short-circuit detector configured to detect whether or not a second current flowing not through the load but through the semiconductor switching element is abnormal. The LVIC interrupts the semiconductor switching element based on a detection result of the overcurrent detector and a detection result of the short-circuit detector.

Abstract: Provided is a drive device capable of suppressing an overshoot of source potential of a switching element even when a resistance value of a shunt resistance for detecting current of the switching element is large. A drive device driving a lower side switching element of an inverter circuit includes a drive circuit generating a drive signal being input to a gate of the lower side switching element and an overcurrent detection circuit detecting overcurrent flowing in the lower side switching element. The overcurrent detection circuit detects overcurrent based on voltage occurring in a shunt resistance connected to a source of the lower side switching element. The drive circuit applies potential of a connection node of the source of the lower side switching element and the shunt resistance as reference potential, and generates a drive signal of the lower side switching element.

Abstract: A semiconductor module includes: an insulating heat dissipation sheet; a semiconductor device provided on the heat dissipation sheet; a lead frame including a lead terminal and a die pad which are formed integrally; a wire connecting the lead frame to the semiconductor device and constituting a main current path; and a mold resin scaling the heat dissipation sheet, the semiconductor device, the lead frame and the wire, wherein the lead terminal is led out from the mold resin, the heat dissipation sheet is in direct contact with an undersurface of the die pad, and the wire is bonded to the die pad directly above a contact part provided between the die pad and the heat dissipation sheet.

Abstract: A surge protective device of the present invention includes an insulating tube 2, a pair of sealing electrodes 3 for closing openings on both ends of the insulating tube so as to seal a discharge control gas inside the tube, wherein the pair of sealing electrodes has a pair of convex electrode portions 5 projecting inwardly so as to face to each other, and at least one projecting part 2a projecting inwardly in a radial direction and extending in a circumferential direction is formed on the inner circumferential surface of the insulating tube.

Abstract: Provided is an ink for a 3D printing system having excellent pseudoplasticity. The ink for a 3D printing system includes: silk nanofibers; and a natural polymer and/or a synthetic polymer.

Abstract: A gate driver includes a first transistor and a second transistor connected in series between a first and a second power supply line, connection nodes thereof are output nodes of the gate driver, the first and second transistors being configured to operate in a complementary manner, a power supply circuit for applying an offset voltage to a source of the transistor, and a switching circuit for performing switching control to apply the offset voltage output from the power supply circuit to the source of the transistor or to apply the second potential to the source of the transistor. The switching circuit is configured to switch so as to apply the offset voltage to the source of the transistor in accordance with a timing of turning off the gate of the transistor and to apply the second potential to the source in accordance with a timing of turning on the gate.

Abstract: The present technique relates to a protection circuit for a MOSFET and a protection circuit system including the protection circuit all of which can reduce losses in the main current and increase in the manufacturing costs for ensuring a sense area. The protection circuit includes: a first MOSFET for power through which a main current flows; an IGBT which is connected in parallel to the first MOSFET and through which a current diverted from the main current flows; a sense resistor connected in series with the IGBT; and a first control circuit that controls a gate voltage of the first MOSFET based on a value of a voltage to be applied to the sense resistor, wherein a ratio of the diverted current flowing through the IGBT to the main current flowing through the first MOSFET in current value ranges from 0.018% to 0.022%.

Abstract: A semiconductor device includes: parasitic inductances connected to respective power transistors; and a drive circuit connected to connection points at which the power transistors are connected to the respective parasitic inductances, and driving the power transistors. The drive circuit insulates reference potentials of the power transistors at the connection points from each other.